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Model Checking Contest 2020
10th edition, Paris, France, June 23, 2020
Execution of r186-oct2-158987939200574
Last Updated
Jun 28, 2020

About the Execution of ITS-LoLa for SharedMemory-PT-000050

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15741.920 3600000.00 21353.00 113.10 TTTFFTFTTFTFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2020-input.r186-oct2-158987939200574.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2020-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool itslola
Input is SharedMemory-PT-000050, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r186-oct2-158987939200574
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 13M
-rw-r--r-- 1 mcc users 518K Apr 27 15:14 CTLCardinality.txt
-rw-r--r-- 1 mcc users 1.3M Apr 27 15:14 CTLCardinality.xml
-rw-r--r-- 1 mcc users 385K Apr 27 15:14 CTLFireability.txt
-rw-r--r-- 1 mcc users 1.2M Apr 27 15:14 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Apr 27 15:14 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K Apr 27 15:14 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 28K Apr 27 15:14 LTLCardinality.txt
-rw-r--r-- 1 mcc users 107K Apr 28 14:02 LTLCardinality.xml
-rw-r--r-- 1 mcc users 769K Apr 27 15:14 LTLFireability.txt
-rw-r--r-- 1 mcc users 2.3M Apr 28 14:02 LTLFireability.xml
-rw-r--r-- 1 mcc users 114K Apr 27 15:14 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 296K Apr 27 15:14 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 434K Apr 27 15:14 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 1.3M Apr 27 15:14 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 56K Apr 27 15:14 UpperBounds.txt
-rw-r--r-- 1 mcc users 113K Apr 27 15:14 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Apr 27 15:14 equiv_col
-rw-r--r-- 1 mcc users 7 Apr 27 15:14 instance
-rw-r--r-- 1 mcc users 6 Apr 27 15:14 iscolored
-rw-r--r-- 1 mcc users 4.0M Apr 27 15:14 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-00
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-01
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-02
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-03
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-04
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-05
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-06
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-07
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-08
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-09
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-10
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-11
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-12
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-13
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-14
FORMULA_NAME SharedMemory-PT-000050-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1591251599333

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
[2020-06-04 06:20:01] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -timeout, 3600, -rebuildPNML]
[2020-06-04 06:20:01] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2020-06-04 06:20:01] [INFO ] Load time of PNML (sax parser for PT used): 235 ms
[2020-06-04 06:20:01] [INFO ] Transformed 2651 places.
[2020-06-04 06:20:01] [INFO ] Transformed 5050 transitions.
[2020-06-04 06:20:01] [INFO ] Found NUPN structural information;
[2020-06-04 06:20:01] [INFO ] Parsed PT model containing 2651 places and 5050 transitions in 340 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 99 ms.
Working with output stream class java.io.PrintStream
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 0 resets, run finished after 966 ms. (steps per millisecond=10 ) properties seen :[1, 0, 1, 0, 0, 0, 0, 1, 1, 0]
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-11 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-10 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-04 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-01 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 0 resets, run finished after 37 ms. (steps per millisecond=270 ) properties seen :[0, 0, 0, 0, 0, 0]
Incomplete Best-First random walk after 10001 steps, including 0 resets, run finished after 30 ms. (steps per millisecond=333 ) properties seen :[0, 0, 0, 0, 0, 0]
Incomplete Best-First random walk after 10001 steps, including 0 resets, run finished after 282 ms. (steps per millisecond=35 ) properties seen :[0, 0, 0, 0, 0, 0]
Incomplete Best-First random walk after 10001 steps, including 0 resets, run finished after 314 ms. (steps per millisecond=31 ) properties seen :[0, 0, 0, 0, 0, 0]
Incomplete Best-First random walk after 10001 steps, including 0 resets, run finished after 26 ms. (steps per millisecond=384 ) properties seen :[0, 0, 0, 0, 1, 0]
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-09 FALSE TECHNIQUES TOPOLOGICAL BESTFIRST_WALK
Incomplete Best-First random walk after 10000 steps, including 0 resets, run finished after 24 ms. (steps per millisecond=416 ) properties seen :[0, 0, 0, 0, 0]
// Phase 1: matrix 5050 rows 2651 cols
[2020-06-04 06:20:03] [INFO ] Computed 101 place invariants in 244 ms
[2020-06-04 06:20:04] [INFO ] [Real]Absence check using 101 positive place invariants in 42 ms returned unsat
[2020-06-04 06:20:04] [INFO ] [Real]Absence check using 101 positive place invariants in 119 ms returned unsat
[2020-06-04 06:20:05] [INFO ] [Real]Absence check using 101 positive place invariants in 77 ms returned unsat
[2020-06-04 06:20:05] [INFO ] [Real]Absence check using 101 positive place invariants in 100 ms returned unsat
[2020-06-04 06:20:06] [INFO ] [Real]Absence check using 101 positive place invariants in 201 ms returned sat
[2020-06-04 06:20:06] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-06-04 06:20:10] [INFO ] [Real]Absence check using state equation in 4545 ms returned (error "Failed to check-sat")
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-07 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-06 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-05 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-03 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Support contains 2 out of 2651 places. Attempting structural reductions.
Starting structural reductions, iteration 0 : 2651/2651 places, 5050/5050 transitions.
Performed 2448 Post agglomeration using F-continuation condition.Transition count delta: 2448
Iterating post reduction 0 with 2448 rules applied. Total rules applied 2448 place count 2651 transition count 2602
Discarding 144 places :
Also discarding 142 output transitions
Drop transitions removed 142 transitions
Remove reverse transitions (loop back) rule discarded transition End_Own_Acc_12_12 and 144 places that fell out of Prefix Of Interest.
Drop transitions removed 2354 transitions
Ensure Unique test removed 92 transitions
Reduce isomorphic transitions removed 2446 transitions.
Graph (trivial) has 6 edges and 11 vertex of which 4 / 11 are part of one of the 2 SCC in 2 ms
Free SCC test removed 2 places
Iterating post reduction 1 with 2448 rules applied. Total rules applied 4896 place count 9 transition count 14
Drop transitions removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 2 with 4 rules applied. Total rules applied 4900 place count 9 transition count 10
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 4900 place count 9 transition count 8
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 4904 place count 7 transition count 8
Drop transitions removed 4 transitions
Reduce isomorphic transitions removed 4 transitions.
Iterating post reduction 3 with 4 rules applied. Total rules applied 4908 place count 7 transition count 4
Ensure Unique test removed 2 places
Iterating post reduction 4 with 2 rules applied. Total rules applied 4910 place count 5 transition count 4
Applied a total of 4910 rules in 712 ms. Remains 5 /2651 variables (removed 2646) and now considering 4/5050 (removed 5046) transitions.
Finished structural reductions, in 1 iterations. Remains : 5/2651 places, 4/5050 transitions.
Finished random walk after 10 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=10 )
FORMULA SharedMemory-PT-000050-ReachabilityCardinality-12 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
All properties solved without resorting to model-checking.

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SharedMemory-PT-000050"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itslola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itslola"
echo " Input is SharedMemory-PT-000050, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r186-oct2-158987939200574"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SharedMemory-PT-000050.tgz
mv SharedMemory-PT-000050 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;