Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2020-input.r185-oct2-158987930900026.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2020-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...........................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool itslola
Input is GlobalResAllocation-COL-10, examination is ReachabilityDeadlock
Time confinement is 1800 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r185-oct2-158987930900026
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 200K
-rw-r--r-- 1 mcc users 4.2K Apr 27 15:14 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K Apr 27 15:14 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Apr 27 15:14 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K Apr 27 15:14 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Apr 27 15:14 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 4.0K Apr 27 15:14 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 28 14:01 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 27 15:14 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 28 14:01 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Apr 27 15:14 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K Apr 27 15:14 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Apr 27 15:14 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K Apr 27 15:14 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Apr 27 15:14 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Apr 27 15:14 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Apr 27 15:14 equiv_pt
-rw-r--r-- 1 mcc users 3 Apr 27 15:14 instance
-rw-r--r-- 1 mcc users 5 Apr 27 15:14 iscolored
-rw-r--r-- 1 mcc users 29K Apr 27 15:14 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

FORMULA_NAME ReachabilityDeadlock

=== Now, execution of the tool begins

BK_START 1591280896552

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
[2020-06-04 14:28:18] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -timeout, 1800, -rebuildPNML]
[2020-06-04 14:28:18] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2020-06-04 14:28:18] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
SLF4J: Failed to load class "org.slf4j.impl.StaticLoggerBinder".
SLF4J: Defaulting to no-operation (NOP) logger implementation
SLF4J: See http://www.slf4j.org/codes.html#StaticLoggerBinder for further details.
[2020-06-04 14:28:19] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 558 ms
[2020-06-04 14:28:19] [INFO ] sort/places :
Proc->processes,prin,prreleased,
Res->resources,
PR->incriticals,

[2020-06-04 14:28:19] [INFO ] r2 symmetric to r1 in transition enter2
[2020-06-04 14:28:19] [INFO ] r3 symmetric to r2 in transition enter3
[2020-06-04 14:28:19] [INFO ] r2 symmetric to r1 in transition enter3
[2020-06-04 14:28:19] [INFO ] r4 symmetric to r3 in transition enter4
[2020-06-04 14:28:19] [INFO ] r3 symmetric to r2 in transition enter4
[2020-06-04 14:28:19] [INFO ] r2 symmetric to r1 in transition enter4
[2020-06-04 14:28:19] [INFO ] r2 symmetric to r1 in transition release2
[2020-06-04 14:28:19] [INFO ] Imported 5 HL places and 7 HL transitions for a total of 250 PT places and 1688410.0 transition bindings in 17 ms.
[2020-06-04 14:28:19] [INFO ] Computed order based on color domains.
[2020-06-04 14:28:20] [INFO ] Unfolded HLPN to a Petri net with 250 places and 108560 transitions in 552 ms.
[2020-06-04 14:28:20] [INFO ] Unfolded HLPN properties in 0 ms.
Parsed 1 properties from file /home/mcc/execution/ReachabilityDeadlock.xml in 852 ms.
Working with output stream class java.io.PrintStream
Built sparse matrix representations for Structural reductions in 40 ms.247192KB memory used
Starting structural reductions, iteration 0 : 250/250 places, 108560/108560 transitions.
Reduce isomorphic (modulo) transitions removed 0 transitions.
Iterating post reduction 0 with 400 rules applied. Total rules applied 400 place count 250 transition count 108360
Applied a total of 400 rules in 19241 ms. Remains 250 /250 variables (removed 0) and now considering 108360/108560 (removed 200) transitions.
// Phase 1: matrix 108360 rows 250 cols
[2020-06-04 14:28:42] [INFO ] Computed 40 place invariants in 2978 ms
[2020-06-04 14:29:13] [INFO ] Performed 14154/108360 'is it Dead' test of which 3303 returned DEAD in 30 seconds.
[2020-06-04 14:29:42] [INFO ] Dead Transitions with SMT raised an exceptionSMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream closed (and (>= s0 1) (>= s11 1) (>= s12 2) (>= s14 1))") after 63127 ms
Found 4240 dead transitions using SMT.
Drop transitions removed 4240 transitions
Dead transitions reduction (with SMT) triggered by suspicious arc values removed 4240 transitions :[17741, 17739, 17738, 17737, 17736, 17735, 17734, 17733, 17732, 17731, 17730, 17729, 17728, 17727, 17726, 17725, 17724, 17723, 17722, 17721, 17719, 17718, 17717, 17716, 17715, 17714, 17713, 17712, 17711, 17710, 17709, 17708, 17707, 17706, 17705, 17704, 17703, 17702, 17701, 17700, 17699, 17698, 17697, 17696, 17695, 17694, 17693, 17692, 17691, 17690, 17689, 17688, 17687, 17686, 17685, 17684, 17683, 17682, 17681, 17680, 17679, 17660, 17642, 17625, 17609, 17594, 17580, 17567, 17555, 17544, 17534, 17525, 17517, 17510, 17504, 17499, 17495, 17492, 17490, 17489, 17488, 17487, 17486, 17485, 17484, 17483, 17482, 17481, 17480, 17479, 17478, 17477, 17476, 17475, 17474, 17473, 17472, 17471, 17470, 17452, 17435, 17419, 17404, 17390, 17377, 17365, 17354, 17344, 17335, 17327, 17320, 17314, 17309, 17305, 17302, 17300, 17299, 17298, 17297, 17296, 17295, 17294, 17293, 17292, 17291, 17290, 17289, 17288, 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13355, 13354, 13344, 13335, 13327, 13320, 13314, 13309, 13305, 13302, 13300, 13299, 13298, 13297, 13296, 13295, 13294, 13293, 13292, 13291, 13290, 13289, 13280, 13272, 13265, 13259, 13254, 13250, 13247, 13245, 13244, 13243, 13242, 13241, 13240, 13239, 13238, 13237, 13236, 13235, 13227, 13220, 13214, 13209, 13205, 13202, 13200, 13199, 13198, 13197, 13196, 13195, 13194, 13193, 13192, 13191, 13184, 13178, 13173, 13169, 13166, 13164, 13163, 13162, 13161, 13160, 13159, 13158, 13157, 13156, 13150, 13145, 13141, 13138, 13136, 13135, 13134, 13133, 13132, 13131, 13130, 13129, 13124, 13120, 13117, 13115, 13114, 13113, 13112, 13111, 13110, 13109, 13105, 13102, 13100, 13099, 13098, 13097, 13096, 13095, 13092, 13090, 13089, 13088, 13087, 13086, 13084, 13083, 13082, 13081, 13080, 13079, 13078, 13077, 13076, 13075, 13074, 13073, 13072, 13071, 13070, 13069, 13068, 13067, 13066, 13065, 13064, 13063, 13062, 13061, 13060, 13059, 13040, 13022, 13005, 12989, 12974, 12960, 12947, 12935, 12924, 12914, 12905, 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9449, 9443, 9438, 9434, 9431, 9429, 9428, 9427, 9426, 9425, 9424, 9423, 9422, 9421, 9420, 9419, 9418, 9417, 9416, 9415, 9414, 9413, 9412, 9411, 9395, 9380, 9366, 9353, 9341, 9330, 9320, 9311, 9303, 9296, 9290, 9285, 9281, 9278, 9276, 9275, 9274, 9273, 9272, 9271, 9270, 9269, 9268, 9267, 9266, 9265, 9264, 9263, 9262, 9261, 9260, 9259, 9244, 9230, 9217, 9205, 9194, 9184, 9175, 9167, 9160, 9154, 9149, 9145, 9142, 9140, 9139, 9138, 9137, 9136, 9135, 9134, 9133, 9132, 9131, 9130, 9129, 9128, 9127, 9126, 9125, 9124, 9110, 9097, 9085, 9074, 9064, 9055, 9047, 9040, 9034, 9029, 9025, 9022, 9020, 9019, 9018, 9017, 9016, 9015, 9014, 9013, 9012, 9011, 9010, 9009, 9008, 9007, 9006, 9005, 8992, 8980, 8969, 8959, 8950, 8942, 8935, 8929, 8924, 8920, 8917, 8915, 8914, 8913, 8912, 8911, 8910, 8909, 8908, 8907, 8906, 8905, 8904, 8903, 8902, 8901, 8889, 8878, 8868, 8859, 8851, 8844, 8838, 8833, 8829, 8826, 8824, 8823, 8822, 8821, 8820, 8819, 8818, 8817, 8816, 8815, 8814, 8813, 8812, 8811, 8800, 8790, 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3840, 3839, 3838, 3837, 3836, 3835, 3834, 3833, 3832, 3831, 3830, 3829, 3828, 3827, 3826, 3825, 3824, 3823, 3822, 3821, 3820, 3819, 3800, 3782, 3765, 3749, 3734, 3720, 3707, 3695, 3684, 3674, 3665, 3657, 3650, 3644, 3639, 3635, 3632, 3630, 3629, 3628, 3627, 3626, 3625, 3624, 3623, 3622, 3621, 3620, 3619, 3618, 3617, 3616, 3615, 3614, 3613, 3612, 3611, 3610, 3592, 3575, 3559, 3544, 3530, 3517, 3505, 3494, 3484, 3475, 3467, 3460, 3454, 3449, 3445, 3442, 3440, 3439, 3438, 3437, 3436, 3435, 3434, 3433, 3432, 3431, 3430, 3429, 3428, 3427, 3426, 3425, 3424, 3423, 3422, 3421, 3404, 3388, 3373, 3359, 3346, 3334, 3323, 3313, 3304, 3296, 3289, 3283, 3278, 3274, 3271, 3269, 3268, 3267, 3266, 3265, 3264, 3263, 3262, 3261, 3260, 3259, 3258, 3257, 3256, 3255, 3254, 3253, 3252, 3251, 3235, 3220, 3206, 3193, 3181, 3170, 3160, 3151, 3143, 3136, 3130, 3125, 3121, 3118, 3116, 3115, 3114, 3113, 3112, 3111, 3110, 3109, 3108, 3107, 3106, 3105, 3104, 3103, 3102, 3101, 3100, 3099, 3084, 3070, 3057, 3045, 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2434, 2429, 2425, 2422, 2420, 2419, 2418, 2417, 2416, 2415, 2414, 2413, 2412, 2411, 2404, 2398, 2393, 2389, 2386, 2384, 2383, 2382, 2381, 2380, 2379, 2378, 2377, 2376, 2370, 2365, 2361, 2358, 2356, 2355, 2354, 2353, 2352, 2351, 2350, 2349, 2344, 2340, 2337, 2335, 2334, 2333, 2332, 2331, 2330, 2329, 2325, 2322, 2320, 2319, 2318, 2317, 2316, 2315, 2312, 2310, 2309, 2308, 2307, 2306, 2304, 2303, 2302, 2301, 2300, 2299, 2279, 2260, 2242, 2225, 2209, 2194, 2180, 2167, 2155, 2144, 2134, 2125, 2117, 2110, 2104, 2099, 2095, 2092, 2090, 2089, 2069, 2050, 2032, 2015, 1999, 1984, 1970, 1957, 1945, 1934, 1924, 1915, 1907, 1900, 1894, 1889, 1885, 1882, 1880, 1879, 1859, 1840, 1822, 1805, 1789, 1774, 1760, 1747, 1735, 1724, 1714, 1705, 1697, 1690, 1684, 1679, 1675, 1672, 1670, 1669, 1649, 1630, 1612, 1595, 1579, 1564, 1550, 1537, 1525, 1514, 1504, 1495, 1487, 1480, 1474, 1469, 1465, 1462, 1460, 1459, 1439, 1420, 1402, 1385, 1369, 1354, 1340, 1327, 1315, 1304, 1294, 1285, 1277, 1270, 1264, 1259, 1255, 1252, 1250, 1249, 1229, 1210, 1192, 1175, 1159, 1144, 1130, 1117, 1105, 1094, 1084, 1075, 1067, 1060, 1054, 1049, 1045, 1042, 1040, 1039, 1019, 1000, 982, 965, 949, 934, 920, 907, 895, 884, 874, 865, 857, 850, 844, 839, 835, 832, 830, 829, 809, 790, 772, 755, 739, 724, 710, 697, 685, 674, 664, 655, 647, 640, 634, 629, 625, 622, 620, 619, 599, 580, 562, 545, 529, 514, 500, 487, 475, 464, 454, 445, 437, 430, 424, 419, 415, 412, 410, 409, 389, 370, 352, 335, 319, 304, 290, 277, 265, 254, 244, 235, 227, 220, 214, 209, 205, 202, 200]
Starting structural reductions, iteration 1 : 250/250 places, 104120/108560 transitions.
Applied a total of 0 rules in 12729 ms. Remains 250 /250 variables (removed 0) and now considering 104120/104120 (removed 0) transitions.
Finished structural reductions, in 2 iterations. Remains : 250/250 places, 104120/108560 transitions.
Interrupted Parikh directed walk after 33586 steps, including 0 resets, run timeout after 30001 ms. (steps per millisecond=1 )
// Phase 1: matrix 104120 rows 250 cols
[2020-06-04 14:30:29] [INFO ] Computed 40 place invariants in 2805 ms
[2020-06-04 14:31:39] [INFO ] [Real]Absence check using 25 positive place invariants in 187 ms returned sat
[2020-06-04 14:31:39] [INFO ] [Real]Absence check using 25 positive and 15 generalized place invariants in 160 ms returned sat
[2020-06-04 14:31:39] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-06-04 14:32:15] [INFO ] [Real]Absence check using state equation in 36498 ms returned sat
[2020-06-04 14:32:18] [INFO ] Solution in real domain found non-integer solution.
[2020-06-04 14:34:36] [INFO ] [Nat]Absence check using 25 positive place invariants in 194 ms returned sat
[2020-06-04 14:34:36] [INFO ] [Nat]Absence check using 25 positive and 15 generalized place invariants in 127 ms returned unsat
FORMULA ReachabilityDeadlock FALSE TECHNIQUES TOPOLOGICAL SAT_SMT STRUCTURAL_REDUCTION

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="GlobalResAllocation-COL-10"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itslola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="1800"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itslola"
echo " Input is GlobalResAllocation-COL-10, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r185-oct2-158987930900026"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/GlobalResAllocation-COL-10.tgz
mv GlobalResAllocation-COL-10 execution
cd execution
if [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "UpperBounds" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] || [ "ReachabilityDeadlock" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityDeadlock"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;