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Model Checking Contest 2020
10th edition, Paris, France, June 23, 2020
Execution of r182-oct2-158987913400108
Last Updated
Jun 28, 2020

About the Execution of ITS-LoLa for BART-PT-040

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15788.800 3600000.00 3698253.00 10501.60 TF?FF??FTTTFF?F? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2020-input.r182-oct2-158987913400108.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2020-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...........................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool itslola
Input is BART-PT-040, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r182-oct2-158987913400108
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 19M
-rw-r--r-- 1 mcc users 4.4K Apr 15 13:43 CTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Apr 15 13:43 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.6K Apr 15 13:35 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 15 13:35 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 24 05:37 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K Mar 24 05:37 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 945K Apr 8 14:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 2.5M Apr 28 14:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.5M Apr 8 14:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 3.7M Apr 28 14:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.3K Apr 15 13:28 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K Apr 15 13:28 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.8K Apr 15 13:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 15 13:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 15 13:29 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 15 13:29 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 24 05:37 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 24 05:37 instance
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 iscolored
-rw-r--r-- 1 mcc users 9.5M Mar 24 05:37 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BART-PT-040-CTLFireability-00
FORMULA_NAME BART-PT-040-CTLFireability-01
FORMULA_NAME BART-PT-040-CTLFireability-02
FORMULA_NAME BART-PT-040-CTLFireability-03
FORMULA_NAME BART-PT-040-CTLFireability-04
FORMULA_NAME BART-PT-040-CTLFireability-05
FORMULA_NAME BART-PT-040-CTLFireability-06
FORMULA_NAME BART-PT-040-CTLFireability-07
FORMULA_NAME BART-PT-040-CTLFireability-08
FORMULA_NAME BART-PT-040-CTLFireability-09
FORMULA_NAME BART-PT-040-CTLFireability-10
FORMULA_NAME BART-PT-040-CTLFireability-11
FORMULA_NAME BART-PT-040-CTLFireability-12
FORMULA_NAME BART-PT-040-CTLFireability-13
FORMULA_NAME BART-PT-040-CTLFireability-14
FORMULA_NAME BART-PT-040-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1591128000388

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
[2020-06-02 20:00:01] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -timeout, 3600, -rebuildPNML]
[2020-06-02 20:00:01] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2020-06-02 20:00:02] [INFO ] Load time of PNML (sax parser for PT used): 357 ms
[2020-06-02 20:00:02] [INFO ] Transformed 5490 places.
[2020-06-02 20:00:02] [INFO ] Transformed 8080 transitions.
[2020-06-02 20:00:02] [INFO ] Found NUPN structural information;
[2020-06-02 20:00:02] [INFO ] Parsed PT model containing 5490 places and 8080 transitions in 443 ms.
Reduce places removed 210 places and 0 transitions.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 66 ms.
Incomplete random walk after 100000 steps, including 0 resets, run finished after 733 ms. (steps per millisecond=136 ) properties seen :[1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1]
// Phase 1: matrix 8080 rows 5280 cols
[2020-06-02 20:00:03] [INFO ] Computed 40 place invariants in 110 ms
[2020-06-02 20:00:04] [INFO ] [Real]Absence check using 40 positive place invariants in 222 ms returned unsat
[2020-06-02 20:00:04] [INFO ] [Real]Absence check using 40 positive place invariants in 321 ms returned sat
[2020-06-02 20:00:04] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-06-02 20:00:24] [INFO ] [Real]Absence check using state equation in 19164 ms returned (error "Solver has unexpectedly terminated")
[2020-06-02 20:00:24] [INFO ] [Real]Absence check using 40 positive place invariants in 235 ms returned sat
[2020-06-02 20:00:24] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-06-02 20:00:44] [INFO ] SMT solver returned unknown. Retrying;
[2020-06-02 20:00:44] [INFO ] [Real]Absence check using state equation in 19384 ms returned (error "Failed to check-sat")
Successfully simplified 1 atomic propositions for a total of 1 simplifications.
[2020-06-02 20:00:44] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2020-06-02 20:00:44] [INFO ] Flatten gal took : 320 ms
[2020-06-02 20:00:44] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2020-06-02 20:00:44] [INFO ] Flatten gal took : 212 ms
FORMULA BART-PT-040-CTLFireability-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2020-06-02 20:00:44] [INFO ] Export to MCC properties in file /home/mcc/execution/CTLFireability.sr.xml took 6 ms.
[2020-06-02 20:00:44] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml took 49 ms.
info: Time: 3600 - MCC
vrfy: Checking CTLFireability @ BART-PT-040 @ 3570 seconds

FORMULA BART-PT-040-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-040-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-040-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-040-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-040-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-040-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-040-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-040-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-040-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-040-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA BART-PT-040-CTLFireability-02 CANNOT_COMPUTE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16427332 kB
MemFree: 8145276 kB
After kill :
MemTotal: 16427332 kB
MemFree: 16316412 kB

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BART-PT-040"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itslola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itslola"
echo " Input is BART-PT-040, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r182-oct2-158987913400108"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BART-PT-040.tgz
mv BART-PT-040 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;