fond
Model Checking Contest 2020
10th edition, Paris, France, June 23, 2020
Execution of r181-ebro-158987906800371
Last Updated
Jun 28, 2020

About the Execution of ITS-LoLa for DLCround-PT-12a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15756.820 1800000.00 10347.00 78.60 F normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2020-input.r181-ebro-158987906800371.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2020-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.......................
=====================================================================
Generated by BenchKit 2-4028
Executing tool itslola
Input is DLCround-PT-12a, examination is ReachabilityDeadlock
Time confinement is 1800 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r181-ebro-158987906800371
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.1M
-rw-r--r-- 1 mcc users 3.3K Mar 30 20:46 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K Mar 30 20:46 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Mar 29 10:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K Mar 29 10:58 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 24 05:37 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 3.6K Apr 8 14:51 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Apr 28 14:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Apr 8 14:51 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 28 14:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.2K Mar 28 06:35 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K Mar 28 06:35 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Mar 27 00:56 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K Mar 27 00:56 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 28 14:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 28 14:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 24 05:37 instance
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 iscolored
-rw-r--r-- 1 mcc users 871K Mar 24 05:37 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

FORMULA_NAME ReachabilityDeadlock

=== Now, execution of the tool begins

BK_START 1591283783139

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
[2020-06-04 15:16:26] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -timeout, 1800, -rebuildPNML]
[2020-06-04 15:16:26] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2020-06-04 15:16:26] [INFO ] Load time of PNML (sax parser for PT used): 403 ms
[2020-06-04 15:16:26] [INFO ] Transformed 419 places.
[2020-06-04 15:16:26] [INFO ] Transformed 3407 transitions.
[2020-06-04 15:16:26] [INFO ] Found NUPN structural information;
[2020-06-04 15:16:26] [INFO ] Parsed PT model containing 419 places and 3407 transitions in 513 ms.
Ensure Unique test removed 315 transitions
Reduce redundant transitions removed 315 transitions.
Parsed 1 properties from file /home/mcc/execution/ReachabilityDeadlock.xml in 60 ms.
Working with output stream class java.io.PrintStream
Built sparse matrix representations for Structural reductions in 14 ms.12496KB memory used
Starting structural reductions, iteration 0 : 419/419 places, 3092/3092 transitions.
Graph (trivial) has 231 edges and 419 vertex of which 60 / 419 are part of one of the 17 SCC in 10 ms
Free SCC test removed 43 places
Ensure Unique test removed 541 transitions
Reduce isomorphic transitions removed 541 transitions.
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Iterating post reduction 0 with 545 rules applied. Total rules applied 546 place count 376 transition count 2547
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 1 with 4 rules applied. Total rules applied 550 place count 372 transition count 2547
Performed 17 Post agglomeration using F-continuation condition.Transition count delta: 17
Deduced a syphon composed of 17 places in 3 ms
Reduce places removed 17 places and 0 transitions.
Iterating global reduction 2 with 34 rules applied. Total rules applied 584 place count 355 transition count 2530
Ensure Unique test removed 260 transitions
Reduce isomorphic transitions removed 260 transitions.
Iterating post reduction 2 with 260 rules applied. Total rules applied 844 place count 355 transition count 2270
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -44
Deduced a syphon composed of 4 places in 2 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 3 with 8 rules applied. Total rules applied 852 place count 351 transition count 2314
Drop transitions removed 1144 transitions
Redundant transition composition rules discarded 1144 transitions
Iterating global reduction 3 with 1144 rules applied. Total rules applied 1996 place count 351 transition count 1170
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 3 with 1 rules applied. Total rules applied 1997 place count 350 transition count 1169
Reduce places removed 260 places and 0 transitions.
Ensure Unique test removed 972 transitions
Reduce isomorphic transitions removed 972 transitions.
Graph (trivial) has 197 edges and 90 vertex of which 90 / 90 are part of one of the 17 SCC in 1 ms
Free SCC test removed 73 places
Iterating post reduction 3 with 1233 rules applied. Total rules applied 3230 place count 17 transition count 197
Reduce places removed 17 places and 0 transitions.
Ensure Unique test removed 196 transitions
Reduce isomorphic transitions removed 196 transitions.
FORMULA ReachabilityDeadlock FALSE TECHNIQUES TOPOLOGICAL STRUCTURAL_REDUCTION

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-12a"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itslola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="1800"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itslola"
echo " Input is DLCround-PT-12a, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r181-ebro-158987906800371"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-12a.tgz
mv DLCround-PT-12a execution
cd execution
if [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "UpperBounds" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] || [ "ReachabilityDeadlock" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityDeadlock"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;