fond
Model Checking Contest 2020
10th edition, Paris, France, June 23, 2020
Execution of r180-ebro-158987900200420
Last Updated
Jun 28, 2020

About the Execution of ITS-LoLa for DLCflexbar-PT-7a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15742.210 3600000.00 3959883.00 1618.80 TF?T?TFFFFTFTFT? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2020-input.r180-ebro-158987900200420.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2020-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool itslola
Input is DLCflexbar-PT-7a, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r180-ebro-158987900200420
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 6.4M
-rw-r--r-- 1 mcc users 3.8K Mar 30 13:15 CTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Mar 30 13:15 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Mar 29 03:19 CTLFireability.txt
-rw-r--r-- 1 mcc users 20K Mar 29 03:19 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 24 05:37 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K Mar 24 05:37 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.0K Apr 8 14:50 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Apr 28 14:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Apr 8 14:50 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Apr 28 14:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Mar 27 18:03 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K Mar 27 18:03 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Mar 26 16:49 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K Mar 26 16:49 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 28 14:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Mar 28 14:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 24 05:37 instance
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 iscolored
-rw-r--r-- 1 mcc users 6.2M Mar 24 05:37 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCflexbar-PT-7a-CTLFireability-00
FORMULA_NAME DLCflexbar-PT-7a-CTLFireability-01
FORMULA_NAME DLCflexbar-PT-7a-CTLFireability-02
FORMULA_NAME DLCflexbar-PT-7a-CTLFireability-03
FORMULA_NAME DLCflexbar-PT-7a-CTLFireability-04
FORMULA_NAME DLCflexbar-PT-7a-CTLFireability-05
FORMULA_NAME DLCflexbar-PT-7a-CTLFireability-06
FORMULA_NAME DLCflexbar-PT-7a-CTLFireability-07
FORMULA_NAME DLCflexbar-PT-7a-CTLFireability-08
FORMULA_NAME DLCflexbar-PT-7a-CTLFireability-09
FORMULA_NAME DLCflexbar-PT-7a-CTLFireability-10
FORMULA_NAME DLCflexbar-PT-7a-CTLFireability-11
FORMULA_NAME DLCflexbar-PT-7a-CTLFireability-12
FORMULA_NAME DLCflexbar-PT-7a-CTLFireability-13
FORMULA_NAME DLCflexbar-PT-7a-CTLFireability-14
FORMULA_NAME DLCflexbar-PT-7a-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1591222243709

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
[2020-06-03 22:10:47] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -timeout, 3600, -rebuildPNML]
[2020-06-03 22:10:47] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2020-06-03 22:10:48] [INFO ] Load time of PNML (sax parser for PT used): 1229 ms
[2020-06-03 22:10:48] [INFO ] Transformed 2913 places.
[2020-06-03 22:10:48] [INFO ] Transformed 23319 transitions.
[2020-06-03 22:10:48] [INFO ] Found NUPN structural information;
[2020-06-03 22:10:48] [INFO ] Parsed PT model containing 2913 places and 23319 transitions in 1449 ms.
Ensure Unique test removed 2519 transitions
Reduce redundant transitions removed 2519 transitions.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 347 ms.
Incomplete random walk after 100000 steps, including 0 resets, run finished after 10619 ms. (steps per millisecond=9 ) properties seen :[1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2020-06-03 22:10:59] [INFO ] Flow matrix only has 1246 transitions (discarded 19554 similar events)
// Phase 1: matrix 1246 rows 2913 cols
[2020-06-03 22:10:59] [INFO ] Computed 2171 place invariants in 100 ms
[2020-06-03 22:11:07] [INFO ] [Real]Absence check using 2171 positive place invariants in 6735 ms returned sat
[2020-06-03 22:11:07] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-06-03 22:11:19] [INFO ] [Real]Absence check using state equation in 12411 ms returned (error "Solver has unexpectedly terminated")
[2020-06-03 22:11:23] [INFO ] Flatten gal took : 2702 ms
[2020-06-03 22:11:25] [INFO ] Flatten gal took : 2206 ms
[2020-06-03 22:11:25] [INFO ] Export to MCC properties in file /home/mcc/execution/CTLFireability.sr.xml took 33 ms.
[2020-06-03 22:11:25] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml took 285 ms.
info: Time: 3600 - MCC
vrfy: Checking CTLFireability @ DLCflexbar-PT-7a @ 3570 seconds

FORMULA DLCflexbar-PT-7a-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-7a-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-7a-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-7a-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-7a-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-7a-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-7a-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-7a-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-7a-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-7a-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-7a-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-7a-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCflexbar-PT-7a-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16427456 kB
MemFree: 9803396 kB
After kill :
MemTotal: 16427456 kB
MemFree: 10167340 kB

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCflexbar-PT-7a"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itslola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itslola"
echo " Input is DLCflexbar-PT-7a, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r180-ebro-158987900200420"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCflexbar-PT-7a.tgz
mv DLCflexbar-PT-7a execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;