fond
Model Checking Contest 2020
10th edition, Paris, France, June 23, 2020
Execution of r170-smll-158987815600220
Last Updated
Jun 28, 2020

About the Execution of ITS-LoLa for FamilyReunion-PT-L00020M0002C001P001G001

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15742.390 3600000.00 3664510.00 9974.60 ???TTT?FF??TFT?F normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2020-input.r170-smll-158987815600220.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2020-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.....................
=====================================================================
Generated by BenchKit 2-4028
Executing tool itslola
Input is FamilyReunion-PT-L00020M0002C001P001G001, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r170-smll-158987815600220
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.9M
-rw-r--r-- 1 mcc users 11K Apr 1 20:24 CTLCardinality.txt
-rw-r--r-- 1 mcc users 43K Apr 1 20:24 CTLCardinality.xml
-rw-r--r-- 1 mcc users 40K Apr 1 13:51 CTLFireability.txt
-rw-r--r-- 1 mcc users 110K Apr 1 13:51 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 24 05:37 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Mar 24 05:37 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 19K Apr 8 14:53 LTLCardinality.txt
-rw-r--r-- 1 mcc users 90K Apr 28 14:01 LTLCardinality.xml
-rw-r--r-- 1 mcc users 32K Apr 8 14:53 LTLFireability.txt
-rw-r--r-- 1 mcc users 94K Apr 28 14:01 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Apr 1 10:51 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 55K Apr 1 10:51 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 35K Apr 1 06:35 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 98K Apr 1 06:35 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 3.9K Apr 1 13:18 UpperBounds.txt
-rw-r--r-- 1 mcc users 9.5K Apr 1 13:18 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 24 05:37 equiv_col
-rw-r--r-- 1 mcc users 24 Mar 24 05:37 instance
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 iscolored
-rw-r--r-- 1 mcc users 1.3M Mar 24 05:37 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-00
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-01
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-02
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-03
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-04
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-05
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-06
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-07
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-08
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-09
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-10
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-11
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-12
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-13
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-14
FORMULA_NAME FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1591288551570

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
[2020-06-04 16:35:53] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -timeout, 3600, -rebuildPNML]
[2020-06-04 16:35:54] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2020-06-04 16:35:54] [INFO ] Load time of PNML (sax parser for PT used): 343 ms
[2020-06-04 16:35:54] [INFO ] Transformed 3271 places.
[2020-06-04 16:35:54] [INFO ] Transformed 2753 transitions.
[2020-06-04 16:35:54] [INFO ] Parsed PT model containing 3271 places and 2753 transitions in 488 ms.
Reduce places removed 11 places and 0 transitions.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 199 ms.
Incomplete random walk after 100000 steps, including 82 resets, run finished after 2056 ms. (steps per millisecond=48 ) properties seen :[1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 0, 1, 1, 1]
// Phase 1: matrix 2753 rows 3260 cols
[2020-06-04 16:35:57] [INFO ] Computed 748 place invariants in 433 ms
[2020-06-04 16:35:58] [INFO ] [Real]Absence check using 61 positive place invariants in 277 ms returned sat
[2020-06-04 16:36:00] [INFO ] [Real]Absence check using 61 positive and 687 generalized place invariants in 2134 ms returned sat
[2020-06-04 16:36:00] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-06-04 16:36:17] [INFO ] SMT solver returned unknown. Retrying;
[2020-06-04 16:36:17] [INFO ] [Real]Absence check using state equation in 16943 ms returned (error "Failed to check-sat")
[2020-06-04 16:36:18] [INFO ] [Real]Absence check using 61 positive place invariants in 239 ms returned sat
[2020-06-04 16:36:20] [INFO ] [Real]Absence check using 61 positive and 687 generalized place invariants in 2157 ms returned sat
[2020-06-04 16:36:20] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-06-04 16:36:37] [INFO ] SMT solver returned unknown. Retrying;
[2020-06-04 16:36:37] [INFO ] [Real]Absence check using state equation in 17024 ms returned (error "Failed to check-sat")
[2020-06-04 16:36:38] [INFO ] [Real]Absence check using 61 positive place invariants in 244 ms returned sat
[2020-06-04 16:36:40] [INFO ] [Real]Absence check using 61 positive and 687 generalized place invariants in 2681 ms returned sat
[2020-06-04 16:36:40] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-06-04 16:36:57] [INFO ] SMT solver returned unknown. Retrying;
[2020-06-04 16:36:57] [INFO ] [Real]Absence check using state equation in 16605 ms returned unknown
[2020-06-04 16:36:58] [INFO ] [Real]Absence check using 61 positive place invariants in 217 ms returned sat
[2020-06-04 16:37:00] [INFO ] [Real]Absence check using 61 positive and 687 generalized place invariants in 1865 ms returned sat
[2020-06-04 16:37:00] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-06-04 16:37:17] [INFO ] SMT solver returned unknown. Retrying;
[2020-06-04 16:37:17] [INFO ] [Real]Absence check using state equation in 17365 ms returned unknown
[2020-06-04 16:37:18] [INFO ] [Real]Absence check using 61 positive place invariants in 218 ms returned sat
[2020-06-04 16:37:19] [INFO ] [Real]Absence check using 61 positive and 687 generalized place invariants in 1977 ms returned sat
[2020-06-04 16:37:19] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-06-04 16:37:37] [INFO ] SMT solver returned unknown. Retrying;
[2020-06-04 16:37:37] [INFO ] [Real]Absence check using state equation in 17420 ms returned unknown
[2020-06-04 16:37:38] [INFO ] [Real]Absence check using 61 positive place invariants in 307 ms returned sat
[2020-06-04 16:37:39] [INFO ] [Real]Absence check using 61 positive and 687 generalized place invariants in 1306 ms returned unsat
Successfully simplified 1 atomic propositions for a total of 1 simplifications.
[2020-06-04 16:37:40] [INFO ] Flatten gal took : 340 ms
[2020-06-04 16:37:40] [INFO ] Flatten gal took : 177 ms
[2020-06-04 16:37:40] [INFO ] Export to MCC properties in file /home/mcc/execution/CTLFireability.sr.xml took 25 ms.
[2020-06-04 16:37:40] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml took 34 ms.
info: Time: 3600 - MCC
vrfy: Checking CTLFireability @ FamilyReunion-PT-L00020M0002C001P001G001 @ 3570 seconds

FORMULA FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA FamilyReunion-PT-L00020M0002C001P001G001-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16427332 kB
MemFree: 15039820 kB
After kill :
MemTotal: 16427332 kB
MemFree: 16134876 kB

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-PT-L00020M0002C001P001G001"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itslola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itslola"
echo " Input is FamilyReunion-PT-L00020M0002C001P001G001, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r170-smll-158987815600220"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-PT-L00020M0002C001P001G001.tgz
mv FamilyReunion-PT-L00020M0002C001P001G001 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;