Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2020-input.r166-smll-158987787100004.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2020-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool itslola
Input is ARMCacheCoherence-PT-none, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r166-smll-158987787100004
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 14M
-rw-r--r-- 1 mcc users 3.4K Mar 25 09:43 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K Mar 25 09:43 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Mar 25 09:36 CTLFireability.txt
-rw-r--r-- 1 mcc users 20K Mar 25 09:36 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 24 05:37 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K Mar 24 05:37 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K Apr 8 14:40 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 28 14:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Apr 8 14:41 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Apr 28 14:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Mar 25 09:02 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K Mar 25 09:02 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Mar 25 08:56 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K Mar 25 08:56 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Mar 25 09:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Mar 25 09:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 24 05:37 instance
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 iscolored
-rw-r--r-- 1 mcc users 14M Mar 24 05:37 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-00
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-01
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-02
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-03
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-04
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-05
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-06
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-07
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-08
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-09
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-10
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-11
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-12
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-13
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-14
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1591124736672

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
[2020-06-02 19:05:39] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -timeout, 3600, -rebuildPNML]
[2020-06-02 19:05:39] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2020-06-02 19:05:40] [INFO ] Load time of PNML (sax parser for PT used): 1174 ms
[2020-06-02 19:05:40] [INFO ] Transformed 87 places.
[2020-06-02 19:05:41] [INFO ] Transformed 33676 transitions.
[2020-06-02 19:05:41] [INFO ] Found NUPN structural information;
[2020-06-02 19:05:41] [INFO ] Parsed PT model containing 87 places and 33676 transitions in 1406 ms.
Ensure Unique test removed 32425 transitions
Reduce redundant transitions removed 32425 transitions.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 340 ms.
Incomplete random walk after 100000 steps, including 83 resets, run finished after 1386 ms. (steps per millisecond=72 ) properties seen :[0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 1, 1, 1, 1, 0, 1, 1, 0]
[2020-06-02 19:05:42] [INFO ] Flow matrix only has 500 transitions (discarded 751 similar events)
// Phase 1: matrix 500 rows 87 cols
[2020-06-02 19:05:42] [INFO ] Computed 12 place invariants in 27 ms
[2020-06-02 19:05:43] [INFO ] [Real]Absence check using 12 positive place invariants in 35 ms returned sat
[2020-06-02 19:05:43] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-06-02 19:05:43] [INFO ] [Real]Absence check using state equation in 330 ms returned sat
[2020-06-02 19:05:43] [INFO ] State equation strengthened by 192 read => feed constraints.
[2020-06-02 19:05:44] [INFO ] [Real]Added 192 Read/Feed constraints in 388 ms returned sat
[2020-06-02 19:05:44] [INFO ] Solution in real domain found non-integer solution.
[2020-06-02 19:05:44] [INFO ] [Nat]Absence check using 12 positive place invariants in 23 ms returned sat
[2020-06-02 19:05:44] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2020-06-02 19:05:44] [INFO ] [Nat]Absence check using state equation in 306 ms returned sat
[2020-06-02 19:05:44] [INFO ] [Nat]Added 192 Read/Feed constraints in 396 ms returned sat
[2020-06-02 19:05:45] [INFO ] Computed and/alt/rep : 1250/122617/499 causal constraints in 429 ms.
[2020-06-02 19:05:54] [INFO ] Added : 75 causal constraints over 15 iterations in 9247 ms. Result :unknown
[2020-06-02 19:05:54] [INFO ] [Real]Absence check using 12 positive place invariants in 8 ms returned unsat
[2020-06-02 19:05:54] [INFO ] [Real]Absence check using 12 positive place invariants in 7 ms returned unsat
[2020-06-02 19:05:54] [INFO ] [Real]Absence check using 12 positive place invariants in 7 ms returned unsat
[2020-06-02 19:05:54] [INFO ] [Real]Absence check using 12 positive place invariants in 7 ms returned unsat
[2020-06-02 19:05:54] [INFO ] [Real]Absence check using 12 positive place invariants in 9 ms returned unsat
[2020-06-02 19:05:54] [INFO ] [Real]Absence check using 12 positive place invariants in 6 ms returned unsat
[2020-06-02 19:05:54] [INFO ] [Real]Absence check using 12 positive place invariants in 6 ms returned unsat
[2020-06-02 19:05:54] [INFO ] [Real]Absence check using 12 positive place invariants in 7 ms returned unsat
[2020-06-02 19:05:54] [INFO ] [Real]Absence check using 12 positive place invariants in 9 ms returned unsat
[2020-06-02 19:05:54] [INFO ] [Real]Absence check using 12 positive place invariants in 7 ms returned unsat
[2020-06-02 19:05:54] [INFO ] [Real]Absence check using 12 positive place invariants in 10 ms returned unsat
[2020-06-02 19:05:54] [INFO ] [Real]Absence check using 12 positive place invariants in 7 ms returned unsat
[2020-06-02 19:05:54] [INFO ] [Real]Absence check using 12 positive place invariants in 6 ms returned unsat
[2020-06-02 19:05:54] [INFO ] [Real]Absence check using 12 positive place invariants in 12 ms returned unsat
Successfully simplified 14 atomic propositions for a total of 14 simplifications.
[2020-06-02 19:05:55] [INFO ] Initial state reduction rules for CTL removed 4 formulas.
[2020-06-02 19:05:55] [INFO ] Flatten gal took : 258 ms
[2020-06-02 19:05:55] [INFO ] Initial state reduction rules for CTL removed 4 formulas.
[2020-06-02 19:05:55] [INFO ] Flatten gal took : 136 ms
FORMULA ARMCacheCoherence-PT-none-CTLFireability-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-CTLFireability-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-CTLFireability-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-CTLFireability-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2020-06-02 19:05:55] [INFO ] Export to MCC properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2020-06-02 19:05:55] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml took 15 ms.
info: Time: 3600 - MCC
vrfy: Checking CTLFireability @ ARMCacheCoherence-PT-none @ 3570 seconds

FORMULA ARMCacheCoherence-PT-none-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ARMCacheCoherence-PT-none-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16427364 kB
MemFree: 137700 kB
After kill :
MemTotal: 16427364 kB
MemFree: 149540 kB

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ARMCacheCoherence-PT-none"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itslola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itslola"
echo " Input is ARMCacheCoherence-PT-none, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r166-smll-158987787100004"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ARMCacheCoherence-PT-none.tgz
mv ARMCacheCoherence-PT-none execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;