fond
Model Checking Contest 2020
10th edition, Paris, France, June 23, 2020
Execution of r057-ebro-158902566900266
Last Updated
Jun 28, 2020

About the Execution of ITS-Tools for DLCflexbar-PT-7b

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15742.980 1800000.00 3190885.00 5138.60 [undef] Time out reached

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2020-input.r057-ebro-158902566900266.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2020-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
............................
=====================================================================
Generated by BenchKit 2-4028
Executing tool itstools
Input is DLCflexbar-PT-7b, examination is ReachabilityDeadlock
Time confinement is 1800 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r057-ebro-158902566900266
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 14M
-rw-r--r-- 1 mcc users 3.6K Mar 30 13:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K Mar 30 13:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Mar 29 03:19 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K Mar 29 03:19 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 24 05:37 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 3.4K Apr 8 14:50 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Apr 28 14:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 8 14:50 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 28 14:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K Mar 27 18:04 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K Mar 27 18:04 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Mar 26 16:49 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K Mar 26 16:49 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 28 14:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Mar 28 14:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 24 05:37 instance
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 iscolored
-rw-r--r-- 1 mcc users 14M Mar 24 05:37 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

FORMULA_NAME ReachabilityDeadlock

=== Now, execution of the tool begins

BK_START 1589745112132

[2020-05-17 19:51:55] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt, -timeout, 1800]
[2020-05-17 19:51:55] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2020-05-17 19:51:57] [INFO ] Load time of PNML (sax parser for PT used): 1887 ms
[2020-05-17 19:51:59] [INFO ] Transformed 35101 places.
[2020-05-17 19:51:59] [INFO ] Transformed 55507 transitions.
[2020-05-17 19:51:59] [INFO ] Found NUPN structural information;
[2020-05-17 19:52:04] [INFO ] Parsed PT model containing 35101 places and 55507 transitions in 9403 ms.
Parsed 1 properties from file /home/mcc/execution/ReachabilityDeadlock.xml in 10610 ms.
Working with output stream class java.io.PrintStream
Built sparse matrix representations for Structural reductions in 56 ms.1445080KB memory used
Starting structural reductions, iteration 0 : 35101/35101 places, 55507/55507 transitions.
Graph (trivial) has 31611 edges and 35101 vertex of which 2264 / 35101 are part of one of the 146 SCC in 160 ms
Free SCC test removed 2118 places
Ensure Unique test removed 2246 transitions
Reduce isomorphic transitions removed 2246 transitions.
Performed 15436 Post agglomeration using F-continuation condition.Transition count delta: 15436
Iterating post reduction 0 with 17682 rules applied. Total rules applied 17683 place count 32983 transition count 37825
Reduce places removed 15436 places and 0 transitions.
Ensure Unique test removed 357 transitions
Reduce isomorphic transitions removed 357 transitions.
Performed 348 Post agglomeration using F-continuation condition.Transition count delta: 348
Iterating post reduction 1 with 16141 rules applied. Total rules applied 33824 place count 17547 transition count 37120
Reduce places removed 348 places and 0 transitions.
Ensure Unique test removed 110 transitions
Reduce isomorphic transitions removed 110 transitions.
Performed 110 Post agglomeration using F-continuation condition.Transition count delta: 110
Iterating post reduction 2 with 568 rules applied. Total rules applied 34392 place count 17199 transition count 36900
Reduce places removed 110 places and 0 transitions.
Iterating post reduction 3 with 110 rules applied. Total rules applied 34502 place count 17089 transition count 36900
Performed 110 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 110 Pre rules applied. Total rules applied 34502 place count 17089 transition count 36790
Deduced a syphon composed of 110 places in 7708 ms
Reduce places removed 110 places and 0 transitions.
Iterating global reduction 4 with 220 rules applied. Total rules applied 34722 place count 16979 transition count 36790
Symmetric choice reduction at 4 with 4854 rule applications. Total rules 39576 place count 16979 transition count 36790
Deduced a syphon composed of 4854 places in 7609 ms
Reduce places removed 4854 places and 4854 transitions.
Iterating global reduction 4 with 9708 rules applied. Total rules applied 49284 place count 12125 transition count 31936
Performed 2052 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 4 with 2052 Pre rules applied. Total rules applied 49284 place count 12125 transition count 29884
Deduced a syphon composed of 2052 places in 5525 ms
Reduce places removed 2052 places and 0 transitions.
Iterating global reduction 4 with 4104 rules applied. Total rules applied 53388 place count 10073 transition count 29884
Symmetric choice reduction at 4 with 283 rule applications. Total rules 53671 place count 10073 transition count 29884
Deduced a syphon composed of 283 places in 5140 ms
Reduce places removed 283 places and 9414 transitions.
Iterating global reduction 4 with 566 rules applied. Total rules applied 54237 place count 9790 transition count 20470
Ensure Unique test removed 238 transitions
Reduce isomorphic transitions removed 238 transitions.
Iterating post reduction 4 with 238 rules applied. Total rules applied 54475 place count 9790 transition count 20232
Performed 2562 Post agglomeration using F-continuation condition with reduction of 9 identical transitions.
Deduced a syphon composed of 2562 places in 15 ms
Reduce places removed 2562 places and 0 transitions.
Iterating global reduction 5 with 5124 rules applied. Total rules applied 59599 place count 7228 transition count 17661
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Iterating post reduction 5 with 9 rules applied. Total rules applied 59608 place count 7228 transition count 17652
Renaming transitions due to excessive name length > 1024 char.
Performed 101 Post agglomeration using F-continuation condition.Transition count delta: -808
Deduced a syphon composed of 101 places in 17 ms
Reduce places removed 101 places and 0 transitions.
Iterating global reduction 6 with 202 rules applied. Total rules applied 59810 place count 7127 transition count 18460
Ensure Unique test removed 50 transitions
Reduce isomorphic transitions removed 50 transitions.
Iterating post reduction 6 with 50 rules applied. Total rules applied 59860 place count 7127 transition count 18410
Performed 101 Post agglomeration using F-continuation condition.Transition count delta: -1158
Deduced a syphon composed of 101 places in 17 ms
Reduce places removed 101 places and 0 transitions.
Iterating global reduction 7 with 202 rules applied. Total rules applied 60062 place count 7026 transition count 19568
Ensure Unique test removed 26 transitions
Reduce isomorphic transitions removed 26 transitions.
Iterating post reduction 7 with 26 rules applied. Total rules applied 60088 place count 7026 transition count 19542
Performed 98 Post agglomeration using F-continuation condition.Transition count delta: -971
Deduced a syphon composed of 98 places in 15 ms
Reduce places removed 98 places and 0 transitions.
Iterating global reduction 8 with 196 rules applied. Total rules applied 60284 place count 6928 transition count 20513
Ensure Unique test removed 34 transitions
Reduce isomorphic transitions removed 34 transitions.
Iterating post reduction 8 with 34 rules applied. Total rules applied 60318 place count 6928 transition count 20479
Performed 34 Post agglomeration using F-continuation condition.Transition count delta: -510
Deduced a syphon composed of 34 places in 39 ms
Reduce places removed 34 places and 0 transitions.
Iterating global reduction 9 with 68 rules applied. Total rules applied 60386 place count 6894 transition count 20989
Applied a total of 60386 rules in 69681 ms. Remains 6894 /35101 variables (removed 28207) and now considering 20989/55507 (removed 34518) transitions.
Finished structural reductions, in 1 iterations. Remains : 6894/35101 places, 20989/55507 transitions.
Interrupted Parikh directed walk after 284742 steps, including 0 resets, run timeout after 30001 ms. (steps per millisecond=9 )
[2020-05-17 19:53:55] [INFO ] Flow matrix only has 19842 transitions (discarded 1147 similar events)
// Phase 1: matrix 19842 rows 6894 cols
[2020-05-17 19:53:55] [INFO ] Computed 2171 place invariants in 412 ms
[2020-05-17 19:55:43] [INFO ] [Real]Absence check using 2171 positive place invariants in 34961 ms returned sat
[2020-05-17 19:55:43] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-05-17 19:58:56] [INFO ] SMT solver returned unknown. Retrying;
[2020-05-17 19:58:56] [INFO ] [Real]Absence check using state equation in 193048 ms returned (error "Failed to check-sat")
Interrupted Parikh directed walk after 62097 steps, including 0 resets, run timeout after 31573 ms. (steps per millisecond=1 )
Interrupted Parikh directed walk after 300019 steps, including 0 resets, run timeout after 30001 ms. (steps per millisecond=10 )
Interrupted Parikh directed walk after 62023 steps, including 0 resets, run timeout after 31054 ms. (steps per millisecond=1 )
Interrupted Parikh directed walk after 301566 steps, including 0 resets, run timeout after 30001 ms. (steps per millisecond=10 )
[2020-05-17 20:01:03] [INFO ] Flatten gal took : 3394 ms
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
[2020-05-17 20:01:08] [INFO ] Applying decomposition
[2020-05-17 20:01:10] [INFO ] Input system was already deterministic with 55507 transitions.
[2020-05-17 20:01:10] [INFO ] Too many transitions (55507) to apply POR reductions. Disabling POR matrices.
[2020-05-17 20:01:12] [INFO ] Flatten gal took : 4081 ms
[2020-05-17 20:01:18] [INFO ] Built C files in 12438ms conformant to PINS in folder :/home/mcc/execution
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202005100927/bin/convert-linux64, -i, /tmp/graph13164514005680024580.txt, -o, /tmp/graph13164514005680024580.bin, -w, /tmp/graph13164514005680024580.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202005100927/bin/louvain-linux64, /tmp/graph13164514005680024580.bin, -l, -1, -v, -w, /tmp/graph13164514005680024580.weights, -q, 0, -e, 0.001], workingDir=null]
[2020-05-17 20:01:21] [INFO ] Decomposing Gal with order
[2020-05-17 20:02:24] [INFO ] Rewriting arrays to variables to allow decomposition.
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution] killed by timeout after 400 SECONDS
java.lang.RuntimeException: Compilation or link of executable timed out.java.util.concurrent.TimeoutException: Subprocess running CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution] killed by timeout after 400 SECONDS
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:80)
at java.base/java.lang.Thread.run(Thread.java:834)
[2020-05-17 20:12:37] [INFO ] Removed a total of 44285 redundant transitions.
[2020-05-17 20:12:39] [INFO ] Flatten gal took : 5303 ms
[2020-05-17 20:12:42] [INFO ] Fuse similar labels procedure discarded/fused a total of 400 labels/synchronizations in 1996 ms.
[2020-05-17 20:12:43] [INFO ] Time to serialize gal into /home/mcc/execution/ReachabilityDeadlock.pnml.gal : 882 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityDeadlock.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityDeadlock.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
built 2186 ordering constraints for composite.
built 90 ordering constraints for composite.
built 78 ordering constraints for composite.
built 86 ordering constraints for composite.
built 66 ordering constraints for composite.
built 66 ordering constraints for composite.
built 65 ordering constraints for composite.
built 66 ordering constraints for composite.
built 140 ordering constraints for composite.
built 65 ordering constraints for composite.
built 66 ordering constraints for composite.
built 83 ordering constraints for composite.
built 67 ordering constraints for composite.
built 141 ordering constraints for composite.
built 67 ordering constraints for composite.
built 66 ordering constraints for composite.
built 66 ordering constraints for composite.
built 66 ordering constraints for composite.
built 64 ordering constraints for composite.
built 65 ordering constraints for composite.
built 66 ordering constraints for composite.
built 67 ordering constraints for composite.
built 65 ordering constraints for composite.
built 71 ordering constraints for composite.
built 66 ordering constraints for composite.
built 62 ordering constraints for composite.
built 66 ordering constraints for composite.
built 65 ordering constraints for composite.
built 141 ordering constraints for composite.
built 65 ordering constraints for composite.
built 67 ordering constraints for composite.
built 65 ordering constraints for composite.
built 64 ordering constraints for composite.
built 73 ordering constraints for composite.
built 65 ordering constraints for composite.
built 65 ordering constraints for composite.
built 69 ordering constraints for composite.
built 66 ordering constraints for composite.
built 68 ordering constraints for composite.
built 68 ordering constraints for composite.
built 65 ordering constraints for composite.
built 67 ordering constraints for composite.
built 66 ordering constraints for composite.
built 64 ordering constraints for composite.
built 66 ordering constraints for composite.
built 142 ordering constraints for composite.
built 63 ordering constraints for composite.
built 795 ordering constraints for composite.
built 72 ordering constraints for composite.
built 141 ordering constraints for composite.
built 65 ordering constraints for composite.
built 140 ordering constraints for composite.
built 1768 ordering constraints for composite.
built 1748 ordering constraints for composite.
built 66 ordering constraints for composite.
built 64 ordering constraints for composite.
built 822 ordering constraints for composite.
built 66 ordering constraints for composite.
built 67 ordering constraints for composite.
built 784 ordering constraints for composite.
built 1784 ordering constraints for composite.
built 65 ordering constraints for composite.
built 798 ordering constraints for composite.
built 83 ordering constraints for composite.
built 1756 ordering constraints for composite.
built 1748 ordering constraints for composite.
built 65 ordering constraints for composite.
built 66 ordering constraints for composite.
built 817 ordering constraints for composite.
built 1743 ordering constraints for composite.
built 816 ordering constraints for composite.
built 66 ordering constraints for composite.
built 1804 ordering constraints for composite.
built 763 ordering constraints for composite.
built 140 ordering constraints for composite.
built 816 ordering constraints for composite.
built 66 ordering constraints for composite.
built 1732 ordering constraints for composite.
built 65 ordering constraints for composite.
built 799 ordering constraints for composite.
built 142 ordering constraints for composite.
built 65 ordering constraints for composite.
built 64 ordering constraints for composite.
built 1757 ordering constraints for composite.
built 66 ordering constraints for composite.
built 67 ordering constraints for composite.
built 66 ordering constraints for composite.
built 65 ordering constraints for composite.
built 142 ordering constraints for composite.
built 65 ordering constraints for composite.
built 139 ordering constraints for composite.
built 139 ordering constraints for composite.
built 139 ordering constraints for composite.
built 140 ordering constraints for composite.
built 91 ordering constraints for composite.
built 139 ordering constraints for composite.
built 66 ordering constraints for composite.
built 68 ordering constraints for composite.
built 109 ordering constraints for composite.
built 65 ordering constraints for composite.
built 65 ordering constraints for composite.
built 65 ordering constraints for composite.
built 66 ordering constraints for composite.
built 65 ordering constraints for composite.
built 66 ordering constraints for composite.
built 139 ordering constraints for composite.
built 66 ordering constraints for composite.
built 63 ordering constraints for composite.
built 65 ordering constraints for composite.
built 141 ordering constraints for composite.
built 67 ordering constraints for composite.
built 64 ordering constraints for composite.
built 69 ordering constraints for composite.
built 64 ordering constraints for composite.
built 75 ordering constraints for composite.
built 66 ordering constraints for composite.
built 63 ordering constraints for composite.
built 64 ordering constraints for composite.
built 66 ordering constraints for composite.
built 66 ordering constraints for composite.
built 65 ordering constraints for composite.
built 64 ordering constraints for composite.
built 70 ordering constraints for composite.
built 142 ordering constraints for composite.
built 65 ordering constraints for composite.
built 66 ordering constraints for composite.
built 66 ordering constraints for composite.
built 66 ordering constraints for composite.
built 13 ordering constraints for composite.
built 40 ordering constraints for composite.
built 35 ordering constraints for composite.
built 23 ordering constraints for composite.
built 16 ordering constraints for composite.
built 7 ordering constraints for composite.
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built 10 ordering constraints for composite.
built 6 ordering constraints for composite.
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built 3 ordering constraints for composite.
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built 5 ordering constraints for composite.
built 5 ordering constraints for composite.
built 6 ordering constraints for composite.
built 4 ordering constraints for composite.
built 13 ordering constraints for composite.
built 4 ordering constraints for composite.
built 4 ordering constraints for composite.
built 3 ordering constraints for composite.
built 4 ordering constraints for composite.
built 3 ordering constraints for composite.
built 5 ordering constraints for composite.
built 3 ordering constraints for composite.
built 8 ordering constraints for composite.
built 6 ordering constraints for composite.
built 5 ordering constraints for composite.
built 5 ordering constraints for composite.
built 5 ordering constraints for composite.
built 7 ordering constraints for composite.
built 4 ordering constraints for composite.
built 4 ordering constraints for composite.
built 5 ordering constraints for composite.
built 12 ordering constraints for composite.
built 4 ordering constraints for composite.
built 4 ordering constraints for composite.
built 4 ordering constraints for composite.
built 4 ordering constraints for composite.
built 3 ordering constraints for composite.
built 4 ordering constraints for composite.
built 7 ordering constraints for composite.
built 4 ordering constraints for composite.
built 6 ordering constraints for composite.
built 3 ordering constraints for composite.
built 8 ordering constraints for composite.
built 6 ordering constraints for composite.
built 8 ordering constraints for composite.
built 4 ordering constraints for composite.
built 6 ordering constraints for composite.
built 3 ordering constraints for composite.
built 3 ordering constraints for composite.
built 3 ordering constraints for composite.

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityDeadlock = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityDeadlock -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -timeout 1800
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityDeadlock -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -timeout 1800 -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss128m -Xms40m -Xmx16000m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCflexbar-PT-7b"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="1800"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itstools"
echo " Input is DLCflexbar-PT-7b, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r057-ebro-158902566900266"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCflexbar-PT-7b.tgz
mv DLCflexbar-PT-7b execution
cd execution
if [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "UpperBounds" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] || [ "ReachabilityDeadlock" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityDeadlock.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityDeadlock"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;