About the Execution of ITS-Tools for CircularTrains-PT-768
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 15742.350 | 3600000.00 | 3658723.00 | 23257.10 | FT???????F?T??T? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2020-input.r036-smll-158901930600098.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2020-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool itstools
Input is CircularTrains-PT-768, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r036-smll-158901930600098
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 768K
-rw-r--r-- 1 mcc users 3.4K Mar 30 01:02 CTLCardinality.txt
-rw-r--r-- 1 mcc users 17K Mar 30 01:02 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Mar 28 15:19 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K Mar 28 15:19 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 24 05:37 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K Mar 24 05:37 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Apr 8 14:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 28 14:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 8 14:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Apr 28 14:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 27 08:14 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K Mar 27 08:14 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Mar 26 07:37 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K Mar 26 07:37 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Mar 28 14:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Mar 28 14:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 24 05:37 instance
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 iscolored
-rw-r--r-- 1 mcc users 591K Mar 24 05:37 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME CircularTrains-PT-768-00
FORMULA_NAME CircularTrains-PT-768-01
FORMULA_NAME CircularTrains-PT-768-02
FORMULA_NAME CircularTrains-PT-768-03
FORMULA_NAME CircularTrains-PT-768-04
FORMULA_NAME CircularTrains-PT-768-05
FORMULA_NAME CircularTrains-PT-768-06
FORMULA_NAME CircularTrains-PT-768-07
FORMULA_NAME CircularTrains-PT-768-08
FORMULA_NAME CircularTrains-PT-768-09
FORMULA_NAME CircularTrains-PT-768-10
FORMULA_NAME CircularTrains-PT-768-11
FORMULA_NAME CircularTrains-PT-768-12
FORMULA_NAME CircularTrains-PT-768-13
FORMULA_NAME CircularTrains-PT-768-14
FORMULA_NAME CircularTrains-PT-768-15
=== Now, execution of the tool begins
BK_START 1589685982750
[2020-05-17 03:26:24] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2020-05-17 03:26:24] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2020-05-17 03:26:25] [INFO ] Load time of PNML (sax parser for PT used): 179 ms
[2020-05-17 03:26:25] [INFO ] Transformed 1536 places.
[2020-05-17 03:26:25] [INFO ] Transformed 768 transitions.
[2020-05-17 03:26:25] [INFO ] Parsed PT model containing 1536 places and 768 transitions in 246 ms.
Parsed 16 properties from file /home/mcc/execution/LTLFireability.xml in 28 ms.
Working with output stream class java.io.PrintStream
Finished random walk after 909 steps, including 0 resets, run visited all 42 properties in 100 ms. (steps per millisecond=9 )
[2020-05-17 03:26:25] [INFO ] Initial state reduction rules for CTL removed 5 formulas.
[2020-05-17 03:26:25] [INFO ] Flatten gal took : 200 ms
FORMULA CircularTrains-PT-768-14 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA CircularTrains-PT-768-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA CircularTrains-PT-768-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA CircularTrains-PT-768-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA CircularTrains-PT-768-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2020-05-17 03:26:25] [INFO ] Flatten gal took : 96 ms
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
[2020-05-17 03:26:26] [INFO ] Applying decomposition
[2020-05-17 03:26:26] [INFO ] Flatten gal took : 84 ms
[2020-05-17 03:26:26] [INFO ] Input system was already deterministic with 768 transitions.
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202005100927/bin/convert-linux64, -i, /tmp/graph3828094829965623291.txt, -o, /tmp/graph3828094829965623291.bin, -w, /tmp/graph3828094829965623291.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202005100927/bin/louvain-linux64, /tmp/graph3828094829965623291.bin, -l, -1, -v, -w, /tmp/graph3828094829965623291.weights, -q, 0, -e, 0.001], workingDir=null]
[2020-05-17 03:26:26] [INFO ] Decomposing Gal with order
[2020-05-17 03:26:26] [INFO ] Rewriting arrays to variables to allow decomposition.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 768 rows 1536 cols
[2020-05-17 03:26:27] [INFO ] Flatten gal took : 267 ms
[2020-05-17 03:26:27] [INFO ] Fuse similar labels procedure discarded/fused a total of 0 labels/synchronizations in 16 ms.
[2020-05-17 03:26:27] [INFO ] Computed 769 place invariants in 275 ms
inv : F509 + Section_509 + Section_510 = 2
inv : Section_324 + Section_323 + F323 = 2
inv : Section_502 - F500 + Section_499 + F499 + F501 = 0
inv : Section_30 + F29 + Section_29 = 2
inv : F573 + Section_574 + Section_573 = 1
inv : Section_593 + F592 + Section_592 = 1
inv : F87 + Section_87 + Section_88 = 1
inv : Section_185 + F184 + Section_184 = 1
inv : F748 - Section_745 - F747 + F746 - F745 + Section_749 = 1
inv : F714 - F713 + Section_712 + F712 + Section_715 = 0
inv : F298 + Section_299 - F297 - Section_297 = 0
inv : F627 + Section_627 + Section_628 = 1
inv : F331 + Section_332 + Section_331 = 1
inv : F513 + F515 - F512 - Section_512 - F516 - Section_517 - F514 = -1
inv : Section_89 + F88 + Section_88 = 1
inv : Section_455 + Section_454 + F454 = 1
inv : Section_430 - F428 - Section_428 + F429 = -1
inv : Section_500 + Section_499 + F499 = 1
inv : F144 + Section_145 - Section_143 - F143 = -1
inv : F218 - F217 + Section_219 + Section_216 + F216 = 2
inv : Section_206 + Section_205 + F205 = 1
inv : Section_445 + Section_444 + F444 = 1
inv : Section_453 + F452 - F451 - Section_451 = 1
inv : Section_255 + F254 + Section_254 = 2
inv : Section_531 + F533 - F532 + F531 + Section_534 = 2
inv : F629 + Section_630 + Section_629 = 2
inv : F540 + Section_541 + Section_540 = 1
inv : Section_21 + Section_20 + F20 = 2
inv : F462 - F461 + F460 + Section_460 + Section_463 = 0
inv : Section_515 + F515 - F516 - Section_517 = 1
inv : F377 - Section_376 - F376 + Section_378 = 1
inv : F760 + Section_760 + Section_761 = 1
inv : F481 - Section_480 + Section_482 - F480 = 0
inv : F646 + Section_647 - F645 - Section_645 = 0
inv : Section_730 + Section_729 + F729 = 1
inv : Section_162 - F163 - Section_164 + F162 = 0
inv : Section_556 + F555 + Section_555 = 1
inv : F76 + Section_76 + Section_77 = 1
inv : F355 + F353 + Section_353 - F354 + Section_356 = 2
inv : Section_477 + F476 + Section_476 = 2
inv : F468 + Section_468 - F469 - Section_470 = 0
inv : Section_245 + Section_244 + F244 = 1
inv : F736 + Section_736 + Section_737 = 1
inv : Section_197 + Section_196 + F196 = 1
inv : F70 - Section_72 + Section_70 - F71 = -1
inv : F412 + Section_413 - Section_411 - F411 = 0
inv : Section_636 + Section_637 + F636 = 1
inv : F726 - Section_728 + Section_726 - F727 = 0
inv : F215 + Section_216 - Section_214 - F214 = 1
inv : F64 - Section_63 - F63 + Section_65 = 0
inv : Section_371 + F370 + Section_370 = 1
inv : Section_488 + F488 - Section_490 - F489 = 1
inv : Section_369 + Section_370 + F369 = 1
inv : Section_522 + F522 + Section_523 = 1
inv : Section_701 - F697 + F700 - F699 - Section_697 + F698 = 1
inv : Section_51 - Section_49 - F49 + F50 = 1
inv : F413 + Section_413 + Section_414 = 2
inv : Section_337 - F335 - Section_335 + F336 = -1
inv : F443 + Section_444 - F442 + Section_441 + F441 = 2
inv : F131 - F130 - Section_133 + Section_129 - F132 + F129 = 1
inv : Section_170 + Section_169 + F169 = 1
inv : Section_569 + F568 - Section_567 - F567 = 0
inv : F637 + Section_637 + Section_638 = 1
inv : F607 + Section_608 + Section_607 = 1
inv : F547 - F546 + Section_548 - F544 + F545 - Section_544 = 1
inv : Section_131 + F130 - Section_129 - F129 = 0
inv : Section_691 - F689 + F686 - F685 - F687 + F690 + Section_684 + F688 + F684 = 1
inv : Section_659 - Section_657 - F657 + F658 = 0
inv : F625 - Section_624 - F624 + Section_626 = 0
inv : F666 + Section_666 - Section_668 - F667 = 0
inv : Section_210 - Section_208 + F209 - F208 = 1
inv : Section_419 - F417 + F418 - Section_417 = 0
inv : Section_394 + F394 + Section_395 = 1
inv : Section_601 + Section_598 + F600 - F599 + F598 = 0
inv : Section_462 + F461 - F460 - Section_460 = 1
inv : Section_639 + F638 + Section_638 = 2
inv : F340 - F339 + Section_341 + Section_338 + F338 = 2
inv : Section_207 + F206 - Section_205 - F205 = 1
inv : Section_424 + F423 + Section_423 = 1
inv : Section_34 + F34 + Section_35 = 1
inv : Section_25 + Section_24 + F24 = 1
inv : Section_308 + F307 + Section_307 = 1
inv : F406 - F407 + F408 + Section_409 + Section_406 = 0
inv : F528 - F533 + F532 - F529 + F530 - F531 + Section_528 - Section_534 = 0
inv : F478 + Section_478 + Section_479 = 1
inv : Section_339 + Section_338 + F338 = 2
inv : F86 + Section_87 + Section_86 = 2
inv : F526 + Section_527 + Section_526 = 1
inv : Section_163 + F163 + Section_164 = 1
inv : Section_75 + Section_76 + F75 = 1
inv : F117 + Section_118 - Section_116 - F116 = -1
inv : Section_95 + Section_427 + Section_413 - F309 - F536 - F328 + Section_60 - F346 - F96 - F43 - F616 - F217 + Section_219 + Section_627 - F732 - F641 - F34 - F394 - F384 - Section_376 + Section_332 - F741 - F664 + Section_456 - F247 + Section_631 - F522 - F370 - F422 - F488 - F575 - F464 + Section_33 - F248 + Section_250 + Section_228 + Section_351 - F200 + Section_202 - F692 - F711 + Section_87 + Section_679 - F254 + Section_403 - F461 + Section_603 + Section_306 - F91 + Section_720 - F743 - F600 + Section_381 + Section_90 - F669 - Section_584 + Section_630 + Section_738 + Section_278 - F344 - F686 - F420 - F511 + Section_127 + Section_695 - F297 - F257 - F379 - F581 - F199 + Section_492 - F167 - F263 + Section_367 + Section_151 - F118 - F313 - F130 + Section_509 + Section_609 + Section_447 + Section_694 - F587 - F299 + Section_647 - F100 + Section_259 - F474 + Section_550 - F339 - F358 + Section_79 - F459 - F445 + Section_164 - F533 + Section_675 - F486 - F148 - F106 - F29 - F206 - F653 + Section_663 - F1 + Section_405 + Section_45 - F472 - F534 - F187 - F706 + Section_150 - F497 - F109 + Section_363 - F546 - F396 + Section_602 - F241 - F162 + Section_216 - F15 + Section_708 + Section_678 + Section_506 - F747 - F184 + Section_468 - F762 + Section_478 + Section_541 + Section_428 + Section_391 - F750 - F307 - F68 - F612 - F77 - F622 - F54 - F139 + Section_3 + Section_341 - F333 + Section_731 + Section_608 - F326 + Section_26 - F457 - F518 + Section_10 - F452 - F500 - F220 - F288 - F718 + Section_560 - F436 + Section_357 - F681 - F360 + Section_666 - F476 - F226 + Section_586 - F123 - F251 - F178 - Section_329 - F84 + Section_574 - F212 - F700 - F568 - F282 - F155 - F690 - F47 - F579 - F63 - F8 - F596 - F512 + Section_145 - F31 + Section_754 + Section_222 + Section_246 - F235 - F75 + Section_493 + Section_366 - F466 + Section_322 + Section_756 - F320 + Section_335 - F272 + Section_49 - F553 + Section_683 - F244 - F24 + Section_229 - F645 - Section_72 - F739 + Section_177 - F175 + Section_494 - F182 - F593 - F570 - F529 + Section_540 - F734 - F544 + Section_404 - Section_512 - F563 - F269 + Section_372 - F633 + Section_527 - F431 - F72 + Section_191 + Section_619 - F565 - F314 - F189 + Section_323 - F27 + Section_640 - F88 - F114 - F484 + Section_416 + Section_725 - F688 - Section_5 + Section_70 - F13 + Section_768 - F702 - F671 + Section_440 - F659 + Section_19 - Section_432 - F223 + Section_524 + Section_410 + Section_399 - F556 - F624 - F66 + Section_316 + Section_40 + Section_759 - F551 - F36 - F548 - F389 - F469 - F291 - F107 - F256 - F232 - F392 - F757 - F128 - F382 - F267 - F591 - F196 + Section_604 + Section_262 + Section_61 - F418 - F638 + Section_499 + Section_463 - F454 - F329 - F210 - F713 - F354 - F93 + Section_205 + Section_505 - F577 + Section_152 + Section_74 + Section_198 - F157 - F438 + Section_356 - F507 - F134 - F301 + Section_652 - F407 + Section_607 - F180 + Section_58 - F531 - F173 + Section_572 + Section_275 - F657 - Section_310 - F386 - F745 - F648 - Section_401 - F598 + Section_479 - F22 - F342 - F347 - F673 - F716 - F160 - F214 - F676 - F260 - F169 + Section_760 + Section_450 - F203 - F364 - F293 + Section_338 + Section_136 - F643 + Section_726 - F490 - F650 - F102 - F610 + Section_482 - F81 - F376 - Section_370 + Section_628 + Section_444 + Section_766 + Section_471 - F442 + Section_7 + Section_724 - Section_248 - F369 - F516 - F764 + Section_378 - F286 - F125 - F194 + Section_281 - F558 + Section_697 - F361 + Section_83 + Section_767 + Section_441 + Section_398 + Section_53 - F237 - F5 + Section_388 + Section_186 + Section_434 - F698 - F542 - F722 - F589 - F141 + Section_451 + Section_59 + Section_567 - F265 + Section_573 - F11 + Section_618 - F279 - F71 + Section_253 - F667 - F116 - F429 - F704 + Section_606 - F171 - Section_347 - F4 + Section_528 - F165 + Section_635 - F120 - F303 + Section_605 - F208 - F401 - F584 - F352 - F525 - F432 - F132 + Section_312 + Section_761 - F317 + Section_680 + Section_632 + Section_504 + Section_696 - F495 - F310 - Section_107 - F561 - F98 - Section_200 - F295 + Section_736 - F324 + Section_417 - Section_534 - F636 - F655 - F41 - F349 - F448 + Section_319 + Section_510 - F752 - F375 - F514 - F502 - F661 + Section_483 - F480 + Section_113 + Section_243 - F56 - F583 + Section_755 + Section_555 + Section_86 + Section_159 - F104 + Section_52 - Section_314 + Section_290 - F111 + Section_62 - F538 + Section_629 - F373 - F20 - F153 + Section_595 + Section_122 - F17 - F411 - F520 + Section_271 + Section_737 + Section_305 - F146 - F284 - F425 + Section_274 + Section_65 - F729 - F38 - F336 - F50 - F276 + Section_331 + Section_234 + Section_409 + Section_46 - F400 + Section_225 + Section_626 + Section_721 - F192 - F684 - Section_257 - F143 - F620 + Section_749 - F239 + Section_435 + Section_406 - F423 + Section_715 - F137 - F727 - F230 - Section_423 - F709 - F414 - F614 + Section_80 - Section_361 + Section_368 = -143
inv : Section_396 + F395 + Section_395 = 2
inv : F225 + Section_226 + Section_225 = 1
inv : F634 - F633 - Section_633 + Section_635 = 0
inv : F571 - F570 + Section_572 - Section_570 = 0
inv : Section_66 + F65 + Section_65 = 2
inv : F261 + Section_262 - F260 - Section_260 = -1
inv : Section_576 + F575 - Section_574 - F574 = 1
inv : Section_475 + F474 - Section_473 - F473 = -1
inv : Section_530 - F533 + F532 + F530 - F531 - Section_534 = 0
inv : Section_727 + Section_728 + F727 = 1
inv : F492 + Section_492 + Section_493 = 1
inv : F738 + Section_738 - Section_740 - F739 = 0
inv : F586 - F587 + Section_586 - Section_588 = -1
inv : Section_318 - F316 - Section_316 + F317 = 1
inv : Section_565 + F564 + Section_564 = 1
inv : F97 - Section_99 + Section_97 - F98 = -1
inv : F242 - F241 - Section_241 + Section_243 = 1
inv : F368 - Section_370 - F369 + Section_368 = 1
inv : F694 + Section_695 + Section_694 = 1
inv : F728 + Section_728 + Section_729 = 2
inv : Section_461 + F460 + Section_460 = 1
inv : Section_571 + F570 + Section_570 = 1
inv : F566 - F565 + F564 + Section_567 + Section_564 = 2
inv : F433 - Section_432 + Section_434 - F432 = 0
inv : Section_744 + F743 + Section_743 = 2
inv : F185 - F184 - Section_184 + Section_186 = 1
inv : Section_121 + F120 + Section_120 = 1
inv : Section_408 + F408 + Section_409 = 1
inv : Section_622 + F621 + Section_619 + F619 - F620 = 0
inv : F233 - Section_232 - F232 + Section_234 = 1
inv : F701 + F697 - F700 + F699 + Section_697 - F698 + Section_702 = 1
inv : F569 - F568 + Section_567 + Section_570 + F567 = 2
inv : F147 + Section_148 - Section_146 - F146 = -1
inv : F362 + Section_363 - F361 - Section_361 = 1
inv : Section_32 + F31 + Section_31 = 1
inv : Section_549 + Section_548 + F548 = 2
inv : Section_137 + Section_138 + F137 = 2
inv : F318 + F316 + Section_316 - F317 + Section_319 = 0
inv : F510 - F511 - Section_512 + Section_510 = 0
inv : F166 - F167 + Section_166 - Section_168 = -1
inv : Section_568 + Section_567 + F567 = 1
inv : Section_201 + F200 + Section_200 = 2
inv : Section_154 + Section_153 + F153 = 1
inv : Section_581 + F581 + Section_582 = 2
inv : Section_553 + F553 - F554 - Section_555 = -1
inv : Section_134 - F135 + F134 - Section_136 = 1
inv : Section_264 + F263 - Section_262 - F262 = 1
inv : F300 - Section_299 - F299 + Section_301 = -1
inv : F397 - F396 + F395 + Section_395 + Section_398 = 2
inv : F654 - Section_656 + Section_654 - F655 = 0
inv : Section_382 + F381 + Section_381 = 1
inv : Section_217 + Section_216 + F216 = 1
inv : F415 - Section_414 + Section_416 - F414 = 0
inv : F402 + Section_403 - Section_401 - F401 = -1
inv : Section_648 + Section_647 + F647 = 2
inv : Section_96 + F96 + Section_97 = 1
inv : Section_433 + Section_432 + F432 = 1
inv : Section_344 + Section_341 + F343 - F342 + F341 = 2
inv : Section_358 + F358 + Section_359 = 1
inv : F73 - Section_72 - F72 + Section_74 = 0
inv : Section_379 + Section_378 + F378 = 1
inv : Section_345 + F344 - Section_341 - F343 + F342 - F341 = 0
inv : F211 - Section_208 + F209 + Section_212 - F210 - F208 = 1
inv : Section_365 - Section_363 - F363 + F364 = 0
inv : F319 + Section_320 + Section_319 = 1
inv : F154 + Section_155 - Section_153 - F153 = 0
inv : Section_495 + F497 - F496 + F495 + Section_498 = 2
inv : F668 + Section_669 + Section_668 = 2
inv : Section_279 + Section_278 + F278 = 2
inv : F113 + Section_114 + Section_113 = 2
inv : F16 - Section_15 + Section_17 - F15 = 0
inv : Section_286 - Section_284 + F285 - F284 = -1
inv : Section_350 - F348 + F347 + Section_347 + F349 = 2
inv : Section_611 - Section_609 - F609 + F610 = 0
inv : F308 - F309 - F307 - Section_310 - Section_307 = 0
inv : F559 + Section_560 - Section_558 - F558 = 0
inv : Section_115 + F114 + Section_114 = 1
inv : Section_753 + Section_752 + F752 = 2
inv : F456 + Section_456 + Section_457 = 1
inv : Section_71 + Section_72 + F71 = 2
inv : F585 - Section_584 + Section_586 - F584 = -1
inv : Section_67 + F66 - F65 - Section_65 = -1
inv : Section_660 + Section_657 + F659 + F657 - F658 = 2
inv : Section_362 + F361 + Section_361 = 1
inv : F306 + Section_306 + Section_307 = 1
inv : Section_385 + Section_384 + F384 = 1
inv : Section_375 + Section_376 + F375 = 1
inv : F221 + Section_219 + F219 - F220 + Section_222 = 2
inv : F164 + Section_164 - Section_166 - F165 = 1
inv : F83 + Section_84 + Section_83 = 2
inv : Section_156 + F155 + Section_155 = 2
inv : Section_646 + F645 + Section_645 = 1
inv : F296 + Section_297 - Section_295 - F295 = 1
inv : Section_220 + Section_219 + F219 = 1
inv : Section_82 + F81 - F80 - Section_80 = -1
inv : F28 + Section_26 - F27 + F26 + Section_29 = 2
inv : Section_714 + F713 - Section_712 - F712 = 1
inv : Section_380 + F379 - Section_378 - F378 = 0
inv : Section_746 + Section_745 + F745 = 1
inv : F198 - F199 + Section_198 - Section_200 = 0
inv : F156 + Section_157 - F155 - Section_155 = -1
inv : Section_218 + F217 - Section_216 - F216 = 0
inv : F613 + F611 + Section_609 - F612 - Section_615 + F609 - F610 - F614 = 0
inv : Section_14 + F13 + Section_13 = 1
inv : Section_240 + Section_239 + F239 = 2
inv : F294 + Section_294 + Section_295 = 1
inv : Section_472 + F472 + Section_473 = 1
inv : Section_98 + Section_99 + F98 = 2
inv : Section_142 + F141 + Section_141 = 1
inv : F245 - Section_244 + Section_246 - F244 = 1
inv : F435 - F436 + F437 + Section_438 + Section_435 = 2
inv : Section_688 - F686 + F685 + F687 - Section_684 - F684 = -1
inv : Section_703 + F702 + Section_702 = 1
inv : F651 - Section_650 + Section_652 - F650 = -1
inv : F683 + Section_683 + Section_684 = 2
inv : F753 - Section_752 + Section_754 - F752 = -1
inv : Section_741 + F741 + Section_742 = 1
inv : F44 + Section_45 + Section_44 = 2
inv : F449 + F447 + Section_447 + Section_450 - F448 = 2
inv : F723 + F721 + Section_724 - F722 + Section_721 = 0
inv : Section_249 + F248 + Section_248 = 2
inv : F246 - F247 + Section_246 - Section_248 = 0
inv : F455 + Section_456 - Section_454 - F454 = 1
inv : Section_685 + Section_684 + F684 = 1
inv : Section_733 + F732 - Section_731 - F731 = -1
inv : Section_73 + Section_72 + F72 = 1
inv : F615 - F616 + F617 + Section_615 + Section_618 = 2
inv : Section_27 + Section_26 + F26 = 2
inv : Section_289 + F288 + Section_288 = 1
inv : F322 + Section_322 + Section_323 = 1
inv : F549 + Section_550 - Section_548 - F548 = -1
inv : F234 + Section_235 + Section_234 = 1
inv : Section_224 + Section_223 + F223 = 1
inv : F249 - F248 + Section_250 - Section_248 = -1
inv : Section_723 - F721 + F722 - Section_721 = 1
inv : Section_333 + Section_332 + F332 = 2
inv : Section_587 + F587 + Section_588 = 2
inv : F740 - F741 + Section_740 - Section_742 = 1
inv : F705 + Section_706 + F703 - F702 - F704 - Section_702 = -1
inv : Section_183 - F181 + F178 - Section_177 + F182 + F180 - F177 - F179 = 0
inv : F644 - Section_643 - F643 + Section_645 = 1
inv : F122 + Section_123 + Section_122 = 2
inv : F656 + Section_656 + Section_657 = 2
inv : Section_258 + F257 + Section_257 = 2
inv : F498 + Section_499 + Section_498 = 1
inv : F720 + Section_720 + Section_721 = 1
inv : Section_18 + Section_17 + F17 = 2
inv : F696 + Section_697 + Section_696 = 1
inv : F62 + Section_63 + Section_62 = 2
inv : F465 - F464 + Section_466 + Section_463 + F463 = 0
inv : Section_364 + Section_363 + F363 = 1
inv : F290 + Section_291 + Section_290 = 2
inv : F630 + Section_631 + Section_630 = 1
inv : Section_511 + F511 + Section_512 = 1
inv : Section_119 + F118 + Section_118 = 1
inv : F287 - Section_284 + F285 - F286 + Section_288 - F284 = 0
inv : Section_748 + Section_745 + F747 - F746 + F745 = 0
inv : Section_705 - F703 + F702 + F704 + Section_702 = 2
inv : Section_285 + Section_284 + F284 = 2
inv : F37 + F39 + Section_40 - F36 + Section_35 - F38 + F35 = 1
inv : Section_261 + F260 + Section_260 = 2
inv : Section_390 + F389 + Section_389 = 2
inv : Section_763 + F762 - F761 - Section_761 = -1
inv : Section_48 + F47 + Section_47 = 2
inv : Section_282 + Section_281 + F281 = 2
inv : F730 + Section_731 - Section_729 - F729 = 0
inv : Section_507 + Section_508 + F507 = 1
inv : Section_514 - F515 + F516 + Section_517 + F514 = 0
inv : Section_513 + F512 + Section_512 = 2
inv : F390 + Section_391 - F389 - Section_389 = -1
inv : Section_161 + Section_160 + F160 = 1
inv : Section_452 + F451 + Section_451 = 1
inv : Section_190 + F189 + Section_189 = 1
inv : Section_383 - F381 - Section_381 + F382 = 0
inv : F398 + Section_399 + Section_398 = 2
inv : F524 + Section_524 - Section_526 - F525 = 1
inv : Section_562 - F560 - Section_560 + F561 = -1
inv : F94 - Section_427 - Section_413 + F309 + F536 + F328 - Section_60 + F346 + F96 + F43 + F616 + F217 - Section_219 - Section_627 + F732 + F641 + F34 + F394 + F384 + Section_376 - Section_332 + F741 + F664 - Section_456 + F247 - Section_631 + F522 + F370 + F422 + F488 + F575 + F464 - Section_33 + F248 - Section_250 - Section_228 - Section_351 + F200 - Section_202 + F692 + F711 - Section_87 - Section_679 + F254 - Section_403 + F461 - Section_603 - Section_306 + F91 - Section_720 + F743 + F600 - Section_381 - Section_90 + F669 + Section_584 - Section_630 - Section_738 - Section_278 + F344 + F686 + F420 + F511 - Section_127 - Section_695 + F297 + F257 + F379 + F581 + F199 - Section_492 + F167 + F263 - Section_367 - Section_151 + F118 + F313 + F130 - Section_509 - Section_609 - Section_447 - Section_694 + F587 + F299 - Section_647 + F100 - Section_259 + F474 - Section_550 + F339 + F358 - Section_79 + F459 + F445 - Section_164 + F533 - Section_675 + F486 + F148 + F106 + F29 + F206 + F653 - Section_663 + F1 - Section_405 - Section_45 + F472 + F534 + F187 + F706 - Section_150 + F497 + F109 - Section_363 + F546 + F396 - Section_602 + F241 + F162 - Section_216 + F15 - Section_708 - Section_678 - Section_506 + F747 + F184 - Section_468 + F762 - Section_478 - Section_541 - Section_428 - Section_391 + F750 + F307 + F68 + F612 + F77 + F622 + F54 + F139 - Section_3 - Section_341 + F333 - Section_731 - Section_608 + F326 - Section_26 + F457 + F518 - Section_10 + F452 + F500 + F220 + F288 + F718 - Section_560 + F436 - Section_357 + F681 + F360 - Section_666 + F476 + F226 - Section_586 + F123 + F251 + F178 + Section_329 + F84 - Section_574 + F212 + F700 + F568 + F282 + F155 + F690 + F47 + F579 + F63 + F8 + F596 + F512 - Section_145 + F31 - Section_754 - Section_222 - Section_246 + F235 + F75 - Section_493 - Section_366 + F466 - Section_322 - Section_756 + F320 - Section_335 + F272 - Section_49 + F553 - Section_683 + F244 + F24 - Section_229 + F645 + Section_72 + F739 - Section_177 + F175 - Section_494 + F182 + F593 + F570 + F529 - Section_540 + F734 + F544 - Section_404 + Section_512 + F563 + F269 - Section_372 + F633 - Section_527 + F431 + F72 - Section_191 - Section_619 + F565 + F314 + F189 - Section_323 + F27 - Section_640 + F88 + F114 + F484 - Section_416 - Section_725 + F688 + Section_5 - Section_70 + F13 - Section_768 + F702 + F671 - Section_440 + F659 - Section_19 + Section_432 + F223 - Section_524 - Section_410 - Section_399 + F556 + F624 + F66 - Section_316 - Section_40 - Section_759 + F551 + F36 + F548 + F389 + F469 + F291 + F107 + F256 + F232 + F392 + F757 + F128 + F382 + F267 + F591 + F196 - Section_604 - Section_262 - Section_61 + F418 + F638 - Section_499 - Section_463 + F454 + F329 + F210 + F713 + F354 - Section_205 - Section_505 + F577 - Section_152 - Section_74 - Section_198 + F157 + F438 - Section_356 + F507 + F134 + F301 - Section_652 + F407 - Section_607 + F180 - Section_58 + F531 + F173 - Section_572 - Section_275 + F657 + Section_310 + F386 + F745 + F648 + Section_401 + F598 - Section_479 + F22 + F342 + F347 + F673 + F716 + F160 + F214 + F676 + F260 + F169 - Section_760 - Section_450 + F203 + F364 + F293 - Section_338 - Section_136 + F643 - Section_726 + F490 + F650 + F102 + F610 - Section_482 + F81 + F376 + Section_370 - Section_628 - Section_444 - Section_766 - Section_471 + F442 - Section_7 - Section_724 + Section_248 + F369 + F516 + F764 - Section_378 + F286 + F125 + F194 - Section_281 + F558 - Section_697 + F361 - Section_83 - Section_767 - Section_441 - Section_398 - Section_53 + F237 + F5 - Section_388 - Section_186 - Section_434 + F698 + F542 + F722 + F589 + F141 - Section_451 - Section_59 - Section_567 + F265 - Section_573 + F11 - Section_618 + F279 + F71 - Section_253 + F667 + F116 + F429 + F704 - Section_606 + F171 + Section_347 + F4 - Section_528 + F165 - Section_635 + F120 + F303 - Section_605 + F208 + F401 + F584 + F352 + F525 + F432 + F132 - Section_312 + Section_92 - Section_761 + F317 - Section_680 - Section_632 - Section_504 - Section_696 + F495 + F310 + Section_107 + F561 + F98 + Section_200 + F295 - Section_736 + F324 - Section_417 + Section_534 + F636 + F655 + F41 + F349 + F448 - Section_319 - Section_510 + F752 + F375 + F514 + F502 + F661 - Section_483 + F480 - Section_113 - Section_243 + F56 + F583 - Section_755 - Section_555 - Section_86 - Section_159 + F104 - Section_52 + Section_314 - Section_290 + F111 - Section_62 + F538 - Section_629 + F373 + F20 + F153 - Section_595 - Section_122 + F17 + F411 + F520 - Section_271 - Section_737 - Section_305 + F146 + F284 + F425 - Section_274 - Section_65 + F729 + F92 + F38 + F336 + F50 + F276 - Section_331 - Section_234 - Section_409 - Section_46 + F400 - Section_225 - Section_626 - Section_721 + F192 + F684 + Section_257 + F143 + F620 - Section_749 + F239 - Section_435 - Section_406 + F423 - Section_715 + F137 + F727 + F230 + Section_423 + F709 + F414 + F614 - Section_80 + Section_361 - Section_368 = 145
inv : F608 + Section_609 + Section_608 = 2
inv : F623 + Section_624 - F622 + F621 + Section_619 + F619 - F620 = 1
inv : F58 + Section_58 + Section_59 = 1
inv : F350 + Section_351 + F348 - F347 - Section_347 - F349 = 0
inv : Section_11 + Section_10 + F10 = 1
inv : F635 - Section_637 + Section_635 - F636 = 1
inv : F30 - F29 + Section_31 - Section_29 = -1
inv : Section_674 + F673 + Section_673 = 1
inv : F258 - F257 + Section_259 - Section_257 = -1
inv : Section_670 + F669 + Section_669 = 1
inv : F471 - F472 - Section_473 + Section_471 = 0
inv : Section_655 + Section_656 + F655 = 1
inv : Section_653 + F653 + Section_654 = 2
inv : F133 + F135 + Section_133 - F134 + Section_136 = 0
inv : Section_566 + F565 - F564 - Section_564 = 0
inv : Section_535 + F534 + Section_534 = 1
inv : F446 + Section_447 - F445 + Section_444 + F444 = 2
inv : F405 + Section_405 + Section_406 = 1
inv : Section_280 - Section_278 - F278 + F279 = -1
inv : F562 + F560 + Section_560 - F563 - F561 - Section_564 = 0
inv : Section_693 + Section_694 + F693 = 1
inv : F159 + Section_160 + Section_159 = 1
inv : F426 + Section_427 + F424 - F425 - F423 - Section_423 = -1
inv : F578 - Section_577 - F577 + Section_579 = 1
inv : F674 + Section_675 - F673 - Section_673 = 1
inv : F55 + Section_56 - F54 + Section_53 + F53 = 2
inv : Section_613 - F611 - Section_609 + F612 - F609 + F610 = -1
inv : Section_81 + F80 + Section_80 = 2
inv : F742 + Section_743 + Section_742 = 1
inv : F475 - F474 + Section_476 + Section_473 + F473 = 2
inv : Section_247 + F247 + Section_248 = 1
inv : Section_686 + F685 - Section_684 - F684 = 0
inv : Section_315 + F314 + Section_314 = 2
inv : Section_644 + Section_643 + F643 = 1
inv : Section_327 + F326 + Section_326 = 2
inv : F388 + Section_388 + Section_389 = 1
inv : Section_425 + F424 - F423 - Section_423 = 0
inv : F222 + Section_223 + Section_222 = 1
inv : F45 + Section_45 + Section_46 = 1
inv : Section_101 + Section_100 + F100 = 1
inv : F337 + F335 + Section_335 + Section_338 - F336 = 2
inv : F606 + Section_607 + Section_606 = 1
inv : F273 - Section_272 - F272 + Section_274 = -1
inv : Section_317 + F316 + Section_316 = 1
inv : Section_732 + Section_731 + F731 = 2
inv : Section_520 - F518 + F517 + Section_517 + F519 = 0
inv : F311 - Section_310 + Section_312 - F310 = 1
inv : Section_174 + F173 + Section_173 = 2
inv : F557 - F556 + Section_558 + F555 + Section_555 = 2
inv : Section_616 + F616 - F617 - Section_618 = -1
inv : Section_692 + F692 - Section_694 - F693 = 1
inv : Section_612 + F611 + Section_609 + F609 - F610 = 2
inv : Section_199 + F199 + Section_200 = 1
inv : Section_465 + F464 - Section_463 - F463 = 1
inv : Section_422 + F422 + Section_423 = 2
inv : F359 - F360 + Section_359 - Section_361 = 1
inv : F186 + Section_187 + Section_186 = 1
inv : F744 - F743 + Section_745 - Section_743 = -1
inv : Section_194 + F194 + Section_195 = 2
inv : Section_711 + F711 + Section_712 = 1
inv : F59 + Section_60 + Section_59 = 2
inv : Section_620 + Section_619 + F619 = 1
inv : Section_268 - Section_266 - F266 + F267 = -1
inv : Section_360 + F360 + Section_361 = 1
inv : Section_311 + Section_310 + F310 = 1
inv : Section_717 + F716 - F715 - Section_715 = 1
inv : F289 - F288 - Section_288 + Section_290 = 0
inv : F439 + Section_440 - F438 - Section_438 = 0
inv : F403 + Section_403 + Section_404 = 1
inv : Section_521 + F518 - F517 - Section_517 - F519 + F520 = 1
inv : Section_50 + Section_49 + F49 = 1
inv : F255 - F254 - Section_254 - F256 - Section_257 = -2
inv : Section_617 + F617 + Section_618 = 2
inv : F334 + Section_332 + F332 - F333 + Section_335 = 2
inv : Section_54 + Section_53 + F53 = 2
inv : F145 + Section_145 + Section_146 = 1
inv : Section_485 - F483 + F484 - Section_483 = 0
inv : F138 + Section_139 + Section_138 = 1
inv : Section_39 + F39 + Section_40 = 1
inv : F604 + Section_604 + Section_605 = 1
inv : Section_532 - F533 + F532 - Section_534 = -1
inv : F737 + Section_738 + Section_737 = 2
inv : F543 + Section_541 - F542 + F541 + Section_544 = 0
inv : F365 + Section_363 + Section_366 + F363 - F364 = 2
inv : Section_651 + Section_650 + F650 = 2
inv : F243 + Section_244 + Section_243 = 1
inv : F149 - Section_148 - F148 + Section_150 = 1
inv : Section_300 + Section_299 + F299 = 2
inv : F759 + Section_759 + Section_760 = 1
inv : Section_446 + F445 - Section_444 - F444 = 0
inv : F504 + Section_505 + Section_504 = 1
inv : Section_474 + Section_473 + F473 = 2
inv : Section_765 - F763 + F762 - F761 + F764 - Section_761 = 0
inv : F505 + Section_506 + Section_505 = 1
inv : Section_105 - F106 + F105 - Section_107 = 0
inv : F356 + Section_357 + Section_356 = 2
inv : F670 - F669 - Section_669 - F671 + F672 + Section_673 = -1
inv : F440 + Section_440 + Section_441 = 2
inv : Section_85 + F84 + Section_84 = 1
inv : F535 + Section_536 - F534 - Section_534 = 0
inv : F61 + Section_61 + Section_62 = 1
inv : Section_215 + Section_214 + F214 = 1
inv : Section_12 - Section_10 - F10 + F11 = 1
inv : Section_374 + Section_373 + F373 = 1
inv : Section_481 + Section_480 + F480 = 1
inv : Section_698 + F697 + Section_697 = 1
inv : F458 - F459 - F457 - Section_460 - Section_457 = 0
inv : F18 - Section_17 + Section_19 - F17 = -1
inv : Section_658 + Section_657 + F657 = 1
inv : Section_302 + F301 + Section_301 = 1
inv : Section_533 + F533 + Section_534 = 2
inv : Section_554 + F554 + Section_555 = 2
inv : Section_230 + Section_229 + F229 = 1
inv : F467 + Section_468 - Section_466 - F466 = 1
inv : F640 + Section_641 + Section_640 = 1
inv : Section_287 + Section_284 - F285 + F286 + F284 = 2
inv : Section_352 + Section_353 + F352 = 1
inv : F190 + Section_191 - F189 - Section_189 = 0
inv : F695 + Section_695 + Section_696 = 2
inv : F537 - F536 - Section_536 - Section_539 - F538 = -2
inv : F580 - F581 - F579 - Section_579 - Section_582 = -2
inv : F202 + Section_202 + Section_203 = 1
inv : F765 + F763 - F762 + F761 + Section_766 - F764 + Section_761 = 1
inv : F231 + Section_229 + Section_232 + F229 - F230 = 0
inv : Section_431 + F431 + Section_432 = 2
inv : F48 - F47 + Section_49 - Section_47 = -1
inv : F90 - F91 + Section_90 - Section_92 = 0
inv : F224 - Section_223 - F223 + Section_225 = 1
inv : Section_437 + F437 + Section_438 = 2
inv : F67 - F66 + F65 + Section_68 + Section_65 = 2
inv : F3 + Section_3 - Section_5 - F4 = 0
inv : Section_193 - Section_191 - F191 + F192 = -1
inv : Section_589 + Section_590 + F589 = 1
inv : F576 - F575 + Section_574 + Section_577 + F574 = 0
inv : F434 + Section_434 + Section_435 = 2
inv : Section_37 + F36 - Section_35 - F35 = -1
inv : Section_94 + F93 - Section_92 - F92 = -1
inv : Section_91 + F91 + Section_92 = 1
inv : Section_489 + Section_490 + F489 = 1
inv : F366 + Section_367 + Section_366 = 1
inv : F707 - Section_706 - F706 + Section_708 = 1
inv : Section_690 + F689 - F686 + F685 + F687 - Section_684 - F688 - F684 = 0
inv : Section_6 + Section_5 + F5 = 2
inv : Section_547 + F546 + F544 - F545 + Section_544 = 0
inv : Section_762 + F761 + Section_761 = 2
inv : F371 - F370 + Section_372 - Section_370 = 1
inv : Section_128 + F128 + Section_129 = 2
inv : F491 - Section_490 + Section_492 - F490 = 1
inv : F508 + Section_509 + Section_508 = 1
inv : Section_104 + F106 - F105 + Section_107 + F104 = 2
inv : Section_677 - F675 - Section_675 + F676 = 0
inv : F357 - F358 + Section_357 - Section_359 = 0
inv : Section_4 + Section_5 + F4 = 1
inv : F60 + Section_60 + Section_61 = 1
inv : Section_764 + F763 - F762 + F761 + Section_761 = 2
inv : F399 + Section_399 - Section_401 - F400 = 0
inv : F151 + Section_151 + Section_152 = 1
inv : Section_597 + Section_596 + F596 = 2
inv : F470 + Section_470 + Section_471 = 2
inv : Section_421 + F420 - F417 - F419 + F418 - Section_417 = -1
inv : Section_426 - F424 + F425 + F423 + Section_423 = 2
inv : Section_158 + Section_157 + F157 = 1
inv : Section_135 + F135 + Section_136 = 1
inv : F207 + Section_208 - F206 + Section_205 + F205 = 0
inv : Section_165 + Section_166 + F165 = 1
inv : F176 + Section_177 - F175 - Section_175 = 1
inv : Section_110 + Section_109 + F109 = 1
inv : Section_469 + F469 + Section_470 = 1
inv : F628 + Section_628 + Section_629 = 1
inv : Section_343 - Section_341 + F342 - F341 = -1
inv : F312 - F313 + Section_312 - Section_314 = 0
inv : Section_16 + Section_15 + F15 = 1
inv : F74 - Section_76 - F75 + Section_74 = 1
inv : Section_349 + F348 - F347 - Section_347 = -1
inv : Section_464 + Section_463 + F463 = 1
inv : Section_334 - Section_332 - F332 + F333 = -1
inv : F253 + Section_254 + Section_253 = 1
inv : F679 + Section_679 + Section_680 = 1
inv : F601 - Section_598 - F600 + Section_602 + F599 - F598 = 1
inv : F503 - F500 + Section_499 + F499 + F501 + Section_504 - F502 = 1
inv : Section_181 + F178 - Section_177 + F180 - F177 - F179 = -1
inv : F6 - Section_5 + Section_7 - F5 = -1
inv : F174 + Section_175 - F173 - Section_173 = -1
inv : Section_124 + F123 + Section_123 = 1
inv : F385 - Section_384 - F384 + Section_386 = 0
inv : Section_664 + F664 + Section_665 = 1
inv : F213 - F212 + Section_214 - Section_212 = -1
inv : F193 + Section_191 + F191 - F194 - Section_195 - F192 = 0
inv : Section_355 - F353 - Section_353 + F354 = -1
inv : Section_557 + F556 - F555 - Section_555 = 0
inv : Section_132 + Section_133 + F132 = 1
inv : Section_265 + Section_266 + F265 = 1
inv : F170 - Section_169 + F172 - F169 - F171 + Section_173 = 1
inv : Section_176 + F175 + Section_175 = 1
inv : F665 + Section_666 + Section_665 = 2
inv : Section_28 - Section_26 + F27 - F26 = -1
inv : Section_689 + F686 - F685 - F687 + Section_684 + F688 + F684 = 2
inv : F304 + Section_304 + Section_305 = 1
inv : F315 - F314 + Section_316 - Section_314 = -1
inv : Section_277 + Section_276 + F276 = 1
inv : Section_328 + F328 + Section_329 = 1
inv : Section_179 + F178 - Section_177 - F177 = 0
inv : Section_623 + F622 - F621 - Section_619 - F619 + F620 = 1
inv : Section_545 + F544 + Section_544 = 1
inv : Section_621 - Section_619 - F619 + F620 = 1
inv : F321 - Section_320 + Section_322 - F320 = -1
inv : F717 - F716 + F715 + Section_718 + Section_715 = 0
inv : F430 + F428 + Section_428 - F431 - Section_432 - F429 = 0
inv : Section_93 + Section_92 + F92 = 2
inv : Section_681 - F682 + F681 - Section_683 = 0
inv : Section_23 + F22 + Section_22 = 1
inv : F124 - F123 + Section_125 - Section_123 = 0
inv : F521 - F522 - F518 + F517 + Section_517 + F519 - Section_523 - F520 = 0
inv : Section_649 - Section_647 - F647 + F648 = -1
inv : F766 + Section_766 + Section_767 = 1
inv : Section_716 + F715 + Section_715 = 1
inv : F168 + Section_169 + Section_168 = 1
inv : Section_594 + F593 - F592 - Section_592 = 1
inv : Section_64 + Section_63 + F63 = 1
inv : F330 - Section_329 - F329 + Section_331 = -1
inv : F550 + Section_550 + Section_551 = 1
inv : F126 + Section_127 - Section_125 - F125 = -1
inv : F227 - Section_226 + Section_228 - F226 = 1
inv : Section_252 + Section_251 + F251 = 2
inv : F277 + Section_278 - Section_276 - F276 = 0
inv : F767 + Section_768 + Section_767 = 2
inv : Section_221 - Section_219 - F219 + F220 = 0
inv : F603 + Section_603 + Section_604 = 1
inv : Section_585 + Section_584 + F584 = 2
inv : F240 + Section_241 - Section_239 - F239 = -1
inv : F46 + Section_47 + Section_46 = 1
inv : Section_309 + F309 + Section_310 = 1
inv : Section_563 + F563 + Section_564 = 2
inv : Section_2 + F1 + Section_1 = 1
inv : F719 + Section_720 - F718 - Section_718 = 1
inv : F602 + Section_603 + Section_602 = 2
inv : Section_525 + Section_526 + F525 = 1
inv : Section_546 - F544 + F545 - Section_544 = 1
inv : Section_204 + F203 + Section_203 = 2
inv : F649 + Section_650 + Section_647 + F647 - F648 = 2
inv : F78 + Section_79 - F77 - Section_77 = -1
inv : Section_487 - F483 + F486 - F485 + F484 - Section_483 = -1
inv : F383 + Section_384 + F381 + Section_381 - F382 = 2
inv : Section_418 + F417 + Section_417 = 1
inv : F631 + Section_631 + Section_632 = 1
inv : Section_459 + F459 + Section_460 = 1
inv : Section_263 + Section_262 + F262 = 1
inv : F158 - Section_157 - F157 + Section_159 = 1
inv : F89 + Section_90 - F88 - Section_88 = 1
inv : Section_296 + Section_295 + F295 = 1
inv : Section_144 + Section_143 + F143 = 2
inv : Section_167 + F167 + Section_168 = 2
inv : F374 - Section_376 - Section_373 - F375 - F373 = 0
inv : F735 - Section_734 - F734 + Section_736 = -1
inv : F302 - Section_304 - F301 - Section_301 - F303 = 0
inv : Section_561 + F560 + Section_560 = 2
inv : Section_516 + F516 + Section_517 = 1
inv : Section_642 + F641 + Section_641 = 2
inv : Section_108 + F107 + Section_107 = 2
inv : F733 - F732 + Section_734 + Section_731 + F731 = 2
inv : Section_192 + Section_191 + F191 = 2
inv : Section_140 + Section_139 + F139 = 1
inv : Section_672 + F672 + Section_673 = 1
inv : F754 + Section_754 + Section_755 = 1
inv : Section_600 - Section_598 + F599 - F598 = 1
inv : Section_242 + F241 + Section_241 = 1
inv : F372 + Section_372 + Section_373 = 1
inv : F270 - F269 - Section_269 + Section_271 = -1
inv : F506 + Section_506 - Section_508 - F507 = 1
inv : F42 - F43 + F40 + Section_40 - Section_44 - F41 = -1
inv : Section_293 + Section_294 + F293 = 2
inv : Section_233 + Section_232 + F232 = 1
inv : F52 + Section_53 + Section_52 = 1
inv : Section_610 + Section_609 + F609 = 1
inv : F140 - Section_139 - F139 + Section_141 = 1
inv : Section_704 + F703 - F702 - Section_702 = 0
inv : Section_178 + Section_177 + F177 = 1
inv : F183 + F181 - F178 + Section_177 - F182 + Section_184 - F180 + F177 + F179 = 1
inv : F238 + Section_238 + Section_239 = 1
inv : Section_387 + Section_386 + F386 = 2
inv : F14 + Section_15 - F13 - Section_13 = 1
inv : F325 + Section_323 + F323 + Section_326 - F324 = 2
inv : F421 - F422 - F420 + F417 + F419 - F418 + Section_417 - Section_423 = 0
inv : F749 + Section_752 - F750 + F751 + Section_749 = 2
inv : Section_126 + Section_125 + F125 = 2
inv : Section_501 + F500 - Section_499 - F499 = 1
inv : Section_180 - F178 + Section_177 + F177 + F179 = 2
inv : F79 + Section_79 + Section_80 = 1
inv : Section_106 + F106 + Section_107 = 1
inv : F280 + Section_278 + F278 + Section_281 - F279 = 2
inv : Section_298 + F297 + Section_297 = 1
inv : Section_55 + F54 - Section_53 - F53 = -1
inv : Section_625 + Section_624 + F624 = 1
inv : Section_634 + F633 + Section_633 = 1
inv : Section_41 + F40 + Section_40 = 1
inv : Section_182 + F181 - F178 + Section_177 - F180 + F177 + F179 = 2
inv : F639 + Section_640 - F638 - Section_638 = -1
inv : Section_519 + F518 - F517 - Section_517 = 1
inv : F404 + Section_405 + Section_404 = 2
inv : Section_303 + Section_304 + F303 = 1
inv : Section_273 + Section_272 + F272 = 2
inv : F204 + Section_205 - F203 - Section_203 = -1
inv : Section_348 + F347 + Section_347 = 2
inv : F201 - F200 + Section_202 - Section_200 = -1
inv : F595 + Section_596 + Section_595 = 1
inv : Section_336 + F335 + Section_335 = 2
inv : Section_529 + F533 - F532 + F529 - F530 + F531 + Section_534 = 1
inv : F268 + Section_266 + F266 + Section_269 - F267 = 2
inv : F7 + Section_8 + Section_7 = 1
inv : Section_43 + F43 + Section_44 = 1
inv : Section_209 + Section_208 + F208 = 1
inv : Section_751 + Section_752 + F751 = 1
inv : Section_211 + Section_208 - F209 + F210 + F208 = 0
inv : Section_542 + Section_541 + F541 = 1
inv : F450 + Section_450 + Section_451 = 1
inv : F588 - Section_590 + Section_588 - F589 = 0
inv : F119 - F118 - Section_118 + Section_120 = 1
inv : Section_484 + F483 + Section_483 = 1
inv : F539 + Section_539 + Section_540 = 2
inv : F552 - F553 - F551 - Section_551 + F554 + Section_555 = 0
inv : F453 - F452 + Section_454 + F451 + Section_451 = 0
inv : Section_283 + F282 - Section_281 - F281 = -1
inv : Section_676 + F675 + Section_675 = 1
inv : Section_171 - F172 + F171 - Section_173 = 0
inv : Section_397 + F396 - F395 - Section_395 = -1
inv : F228 + Section_228 + Section_229 = 1
inv : Section_313 + F313 + Section_314 = 1
inv : Section_700 + F697 + F699 + Section_697 - F698 = 0
inv : Section_429 + F428 + Section_428 = 2
inv : Section_739 + Section_740 + F739 = 1
inv : F482 + Section_482 + Section_483 = 2
inv : Section_719 + F718 + Section_718 = 1
inv : F680 + F682 - F681 + Section_683 + Section_680 = 2
inv : F283 - F282 + Section_284 + Section_281 + F281 = 2
inv : Section_130 + Section_129 + F129 = 1
inv : F142 + Section_143 - F141 - Section_141 = 0
inv : F710 - F711 - Section_709 - Section_712 - F709 = 0
inv : Section_292 + Section_291 + F291 = 1
inv : Section_682 + F682 + Section_683 = 1
inv : F493 + Section_493 + Section_494 = 1
inv : Section_117 + Section_116 + F116 = 2
inv : F409 + Section_410 + Section_409 = 1
inv : F427 + Section_427 + Section_428 = 1
inv : F662 + F660 + Section_663 - Section_657 - F659 - F657 - F661 + F658 = 0
inv : F416 + Section_416 + Section_417 = 2
inv : F663 - F664 + Section_663 - Section_665 = 0
inv : Section_667 + Section_668 + F667 = 1
inv : F150 + Section_151 + Section_150 = 1
inv : F82 - F81 + F80 + Section_83 + Section_80 = 2
inv : Section_213 + F212 + Section_212 = 2
inv : F708 + Section_708 + Section_709 = 1
inv : F292 - Section_291 - Section_294 - F291 - F293 = -2
inv : Section_149 + Section_148 + F148 = 1
inv : Section_436 + F436 - F437 - Section_438 = -1
inv : Section_342 + Section_341 + F341 = 2
inv : Section_699 - F697 - Section_697 + F698 = 1
inv : F618 + Section_619 + Section_618 = 1
inv : F136 + Section_136 - Section_138 - F137 = -1
inv : F582 - Section_584 - F583 + Section_582 = 0
inv : F127 + Section_127 - F128 - Section_129 = -1
inv : Section_599 + Section_598 + F598 = 1
inv : F380 + Section_381 - F379 + Section_378 + F378 = 2
inv : F103 - F106 - Section_102 - F102 + F105 - Section_107 - F104 = -2
inv : F351 + Section_351 - Section_353 - F352 = 0
inv : Section_439 + F438 + Section_438 = 1
inv : Section_661 + F660 - Section_657 - F659 - F657 + F658 = -1
inv : F527 + Section_527 + Section_528 = 2
inv : Section_172 + F172 + Section_173 = 1
inv : F161 + F163 - Section_160 + Section_164 - F162 - F160 = 1
inv : F691 + F689 - F692 - F686 + Section_694 + F685 + F687 - F690 - Section_684 - F688 + F693 - F684 = -1
inv : Section_442 + Section_441 + F441 = 1
inv : F236 - F235 - Section_238 - Section_235 - F237 = 0
inv : F112 - Section_111 + Section_113 - F111 = 0
inv : F327 - F328 - F326 - Section_329 - Section_326 = -2
inv : F626 + Section_627 + Section_626 = 2
inv : Section_503 + F500 - Section_499 - F499 - F501 + F502 = 1
inv : Section_575 + Section_574 + F574 = 1
inv : F594 - F593 + F592 + Section_595 + Section_592 = 0
inv : Section_543 - Section_541 + F542 - F541 = 1
inv : Section_392 + F391 + Section_391 = 1
inv : F95 - Section_427 - Section_413 + F309 + F536 + F328 - Section_60 + F346 + F43 + F616 + F217 - Section_219 - Section_627 + F732 + F641 + F34 + F394 + F384 + Section_376 - Section_332 + F741 + F664 - Section_456 + F247 - Section_631 + F522 + F370 + F422 + F488 + F575 + F464 - Section_33 + F248 - Section_250 - Section_228 - Section_351 + F200 - Section_202 + F692 + F711 - Section_87 - Section_679 + F254 - Section_403 + F461 - Section_603 - Section_306 + F91 - Section_720 + F743 + F600 - Section_381 - Section_90 + F669 + Section_584 - Section_630 - Section_738 - Section_278 + F344 + F686 + F420 + F511 - Section_127 - Section_695 + F297 + F257 + F379 + F581 + F199 - Section_492 + F167 + F263 - Section_367 - Section_151 + F118 + F313 + F130 - Section_509 - Section_609 - Section_447 - Section_694 + F587 + F299 - Section_647 + F100 - Section_259 + F474 - Section_550 + F339 + F358 - Section_79 + F459 + F445 - Section_164 + F533 - Section_675 + F486 + F148 + F106 + F29 + F206 + F653 - Section_663 + F1 - Section_405 - Section_45 + F472 + F534 + F187 + F706 - Section_150 + F497 + F109 - Section_363 + F546 + F396 - Section_602 + F241 + F162 - Section_216 + F15 - Section_708 - Section_678 - Section_506 + F747 + F184 - Section_468 + F762 - Section_478 - Section_541 - Section_428 - Section_391 + F750 + F307 + F68 + F612 + F77 + F622 + F54 + F139 - Section_3 - Section_341 + F333 - Section_731 - Section_608 + F326 - Section_26 + F457 + F518 - Section_10 + F452 + F500 + F220 + F288 + F718 - Section_560 + F436 - Section_357 + F681 + F360 - Section_666 + F476 + F226 - Section_586 + F123 + F251 + F178 + Section_329 + F84 - Section_574 + F212 + F700 + F568 + F282 + F155 + F690 + F47 + F579 + F63 + F8 + F596 + F512 - Section_145 + F31 - Section_754 - Section_222 - Section_246 + F235 + F75 - Section_493 - Section_366 + F466 - Section_322 - Section_756 + F320 - Section_335 + F272 - Section_49 + F553 - Section_683 + F244 + F24 - Section_229 + F645 + Section_72 + F739 - Section_177 + F175 - Section_494 + F182 + F593 + F570 + F529 - Section_540 + F734 + F544 - Section_404 + Section_512 + F563 + F269 - Section_372 + F633 - Section_527 + F431 + F72 - Section_191 - Section_619 + F565 + F314 + F189 - Section_323 + F27 - Section_640 + F88 + F114 + F484 - Section_416 - Section_725 + F688 + Section_5 - Section_70 + F13 - Section_768 + F702 + F671 - Section_440 + F659 - Section_19 + Section_432 + F223 - Section_524 - Section_410 - Section_399 + F556 + F624 + F66 - Section_316 - Section_40 - Section_759 + F551 + F36 + F548 + F389 + F469 + F291 + F107 + F256 + F232 + F392 + F757 + F128 + F382 + F267 + F591 + F196 - Section_604 - Section_262 - Section_61 + F418 + F638 - Section_499 - Section_463 + F454 + F329 + F210 + F713 + F354 + F93 - Section_205 - Section_505 + F577 - Section_152 - Section_74 - Section_198 + F157 + F438 - Section_356 + F507 + F134 + F301 - Section_652 + F407 - Section_607 + F180 - Section_58 + F531 + F173 - Section_572 - Section_275 + F657 - Section_97 + Section_310 + F386 + F745 + F648 + Section_401 + F598 - Section_479 + F22 + F342 + F347 + F673 + F716 + F160 + F214 + F676 + F260 + F169 - Section_760 - Section_450 + F203 + F364 + F293 - Section_338 - Section_136 + F643 - Section_726 + F490 + F650 + F102 + F610 - Section_482 + F81 + F376 + Section_370 - Section_628 - Section_444 - Section_766 - Section_471 + F442 - Section_7 - Section_724 + Section_248 + F369 + F516 + F764 - Section_378 + F286 + F125 + F194 - Section_281 + F558 - Section_697 + F361 - Section_83 - Section_767 - Section_441 - Section_398 - Section_53 + F237 + F5 - Section_388 - Section_186 - Section_434 + F698 + F542 + F722 + F589 + F141 - Section_451 - Section_59 - Section_567 + F265 - Section_573 + F11 - Section_618 + F279 + F71 - Section_253 + F667 + F116 + F429 + F704 - Section_606 + F171 + Section_347 + F4 - Section_528 + F165 - Section_635 + F120 + F303 - Section_605 + F208 + F401 + F584 + F352 + F525 + F432 + F132 - Section_312 - Section_761 + F317 - Section_680 - Section_632 - Section_504 - Section_696 + F495 + F310 + Section_107 + F561 + F98 + Section_200 + F295 - Section_736 + F324 - Section_417 + Section_534 + F636 + F655 + F41 + F349 + F448 - Section_319 - Section_510 + F752 + F375 + F514 + F502 + F661 - Section_483 + F480 - Section_113 - Section_243 + F56 + F583 - Section_755 - Section_555 - Section_86 - Section_159 + F104 - Section_52 + Section_314 - Section_290 + F111 - Section_62 + F538 - Section_629 + F373 + F20 + F153 - Section_595 - Section_122 + F17 + F411 + F520 - Section_271 - Section_737 - Section_305 + F146 + F284 + F425 - Section_274 - Section_65 + F729 + F38 + F336 + F50 + F276 - Section_331 - Section_234 - Section_409 - Section_46 + F400 - Section_225 - Section_626 - Section_721 + F192 + F684 + Section_257 + F143 + F620 - Section_749 + F239 - Section_435 - Section_406 + F423 - Section_715 + F137 + F727 + F230 + Section_423 + F709 + F414 + F614 - Section_80 + Section_361 - Section_368 = 144
inv : Section_69 + F68 + Section_68 = 2
inv : Section_518 + F517 + Section_517 = 1
inv : F756 + Section_756 + Section_759 - F757 + F758 = 2
inv : Section_497 + F497 + Section_498 = 2
inv : F652 - F653 - Section_654 + Section_652 = -1
inv : F108 + Section_109 - F107 - Section_107 = -1
inv : Section_270 + F269 + Section_269 = 2
inv : Section_420 + F417 + F419 - F418 + Section_417 = 2
inv : F252 - Section_251 - F251 + Section_253 = -1
inv : F725 + Section_725 + Section_726 = 2
inv : Section_710 + Section_709 + F709 = 1
inv : Section_9 + F8 + Section_8 = 2
inv : Section_267 + Section_266 + F266 = 2
inv : Section_448 + F447 + Section_447 = 1
inv : F19 + Section_19 + Section_20 = 1
inv : Section_722 + F721 + Section_721 = 1
inv : Section_354 + F353 + Section_353 = 2
inv : F387 - Section_386 - F386 + Section_388 = -1
inv : F597 + Section_598 - Section_596 - F596 = -1
inv : F477 + Section_478 - F476 - Section_476 = -1
inv : F115 + Section_116 - F114 - Section_114 = 0
inv : F250 + Section_250 + Section_251 = 1
inv : Section_458 + F457 + Section_457 = 1
inv : F494 - F497 + Section_494 + F496 - F495 - Section_498 = 0
inv : Section_38 - F39 - Section_40 + F38 = 1
inv : Section_325 - Section_323 - F323 + F324 = -1
inv : F642 - F641 - Section_641 + Section_643 = -1
inv : F259 + Section_259 + Section_260 = 1
inv : Section_750 - Section_752 + F750 - F751 = 0
inv : F21 - Section_20 + Section_22 - F20 = -1
inv : F479 + Section_480 + Section_479 = 2
inv : F188 - F187 - Section_187 + Section_189 = 1
inv : Section_486 + F483 + F485 - F484 + Section_483 = 2
inv : F274 + Section_275 + Section_274 = 1
inv : Section_393 - F391 - Section_391 + F392 = 1
inv : Section_400 + Section_401 + F400 = 1
inv : F367 + Section_367 + Section_368 = 1
inv : Section_103 + Section_102 + F102 = 1
inv : Section_227 + Section_226 + F226 = 1
inv : Section_757 - Section_759 + F757 - F758 = -1
inv : F23 + Section_24 - F22 - Section_22 = 1
inv : Section_412 + Section_411 + F411 = 1
inv : F121 - F120 + Section_122 - Section_120 = 0
inv : F85 - F84 - Section_84 + Section_86 = 0
inv : F345 - F346 - F344 + Section_341 + F343 - F342 - Section_347 + F341 = 0
inv : F632 + Section_633 + Section_632 = 2
inv : F69 - F68 + Section_70 - Section_68 = -1
inv : Section_377 + Section_376 + F376 = 1
inv : F410 + Section_410 + Section_411 = 2
inv : Section_237 + Section_238 + F237 = 1
inv : Section_614 + Section_615 + F614 = 2
inv : Section_443 + F442 - Section_441 - F441 = 0
inv : Section_758 + Section_759 + F758 = 2
inv : Section_78 + F77 + Section_77 = 2
inv : Section_747 - Section_745 + F746 - F745 = 1
inv : F195 + Section_196 + Section_195 = 1
inv : F57 - Section_56 + Section_58 - F56 = -1
inv : Section_231 - Section_229 - F229 + F230 = 1
inv : Section_537 + F536 + Section_536 = 2
inv : F605 + Section_606 + Section_605 = 2
inv : Section_467 + Section_466 + F466 = 1
inv : F264 - F263 - Section_266 + Section_262 - F265 + F262 = -1
inv : Section_415 + Section_414 + F414 = 1
inv : F2 - F1 + Section_3 - Section_1 = 1
inv : F271 + Section_272 + Section_271 = 1
inv : F152 + Section_152 + Section_153 = 2
inv : F678 + Section_679 + Section_678 = 1
inv : F32 + Section_33 - F31 - Section_31 = 1
inv : Section_188 + F187 + Section_187 = 1
inv : Section_402 + Section_401 + F401 = 2
inv : Section_735 + Section_734 + F734 = 2
inv : Section_449 - F447 - Section_447 + F448 = 0
inv : Section_583 + Section_584 + F583 = 1
inv : Section_321 + Section_320 + F320 = 2
inv : F590 + Section_590 - F591 - Section_592 = 1
inv : F12 + Section_10 + F10 - F11 + Section_13 = 0
inv : Section_707 + Section_706 + F706 = 1
inv : Section_330 + Section_329 + F329 = 2
inv : F305 + Section_306 + Section_305 = 2
inv : Section_407 + F407 - F408 - Section_409 = 1
inv : F572 + Section_572 + Section_573 = 2
inv : F99 + Section_99 + Section_100 = 1
inv : F25 - Section_24 + Section_26 - F24 = 0
inv : Section_147 + Section_146 + F146 = 2
inv : F755 + Section_756 + Section_755 = 2
inv : Section_578 + Section_577 + F577 = 1
inv : Section_256 + F256 + Section_257 = 1
inv : Section_662 - F660 + Section_657 + F659 + F657 + F661 - F658 = 2
inv : Section_552 + F551 + Section_551 = 2
inv : F487 - F488 + Section_490 + F483 - F486 + F485 - F484 + F489 + Section_483 = 1
inv : F51 + Section_49 + F49 + Section_52 - F50 = 0
inv : Section_713 + Section_712 + F712 = 1
inv : Section_496 - F497 + F496 - Section_498 = -1
inv : Section_112 + Section_111 + F111 = 1
inv : Section_559 + Section_558 + F558 = 1
inv : Section_36 + Section_35 + F35 = 2
inv : F275 + Section_275 + Section_276 = 2
inv : F9 + Section_10 - F8 - Section_8 = -1
inv : F110 - Section_109 - F109 + Section_111 = 1
inv : F677 + F675 + Section_675 + Section_678 - F676 = 2
inv : Section_591 + F591 + Section_592 = 1
inv : F523 + Section_524 + Section_523 = 1
inv : Section_671 + F671 - F672 - Section_673 = 1
inv : Section_42 - F40 - Section_40 + F41 = 1
inv : Section_340 + F339 - Section_338 - F338 = -1
inv : Section_687 + F686 - F685 + Section_684 + F684 = 2
inv : Section_580 + F579 + Section_579 = 1
inv : F197 - Section_196 - F196 + Section_198 = 1
inv : Section_346 + F346 + Section_347 = 1
inv : F101 - Section_100 - F100 + Section_102 = 1
inv : F33 - F34 + Section_33 - Section_35 = 0
inv : Section_538 + Section_539 + F538 = 1
inv : Section_57 + Section_56 + F56 = 2
inv : F724 + Section_725 + Section_724 = 1
inv : F393 - F394 + F391 + Section_391 - F392 - Section_395 = -1
inv : Section_491 + Section_490 + F490 = 1
inv : Section_236 + F235 + Section_235 = 1
inv : F768 + Section_768 + Section_1 = 1
Total of 769 invariants.
[2020-05-17 03:26:27] [INFO ] Computed 769 place invariants in 292 ms
[2020-05-17 03:26:27] [INFO ] Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 71 ms
[2020-05-17 03:26:27] [INFO ] Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 11 LTL properties
Checking formula 0 : !(((F(G(!(X((G(F(X("(((i7.u160.Section_283>=1)&&(i27.u459.F284>=1))||((i13.u94.F365>=1)&&(i13.u364.Section_364>=1)))"))))||(G("((i24.u49.Section_583>=1)&&(i24.u383.F584>=1))")))))))U("((i13.u94.F365>=1)&&(i13.u364.Section_364>=1))")))
Formula 0 simplified : !(FG!X(GFX"(((i7.u160.Section_283>=1)&&(i27.u459.F284>=1))||((i13.u94.F365>=1)&&(i13.u364.Section_364>=1)))" | G"((i24.u49.Section_583>=1)&&(i24.u383.F584>=1))") U "((i13.u94.F365>=1)&&(i13.u364.Section_364>=1))")
built 30 ordering constraints for composite.
built 29 ordering constraints for composite.
built 23 ordering constraints for composite.
built 26 ordering constraints for composite.
built 33 ordering constraints for composite.
built 25 ordering constraints for composite.
built 27 ordering constraints for composite.
built 24 ordering constraints for composite.
built 21 ordering constraints for composite.
built 26 ordering constraints for composite.
built 30 ordering constraints for composite.
built 29 ordering constraints for composite.
built 35 ordering constraints for composite.
built 24 ordering constraints for composite.
built 28 ordering constraints for composite.
built 29 ordering constraints for composite.
built 6 ordering constraints for composite.
built 7 ordering constraints for composite.
built 7 ordering constraints for composite.
built 7 ordering constraints for composite.
built 7 ordering constraints for composite.
built 7 ordering constraints for composite.
built 7 ordering constraints for composite.
built 7 ordering constraints for composite.
built 5 ordering constraints for composite.
built 5 ordering constraints for composite.
built 5 ordering constraints for composite.
built 7 ordering constraints for composite.
built 7 ordering constraints for composite.
built 6 ordering constraints for composite.
built 8 ordering constraints for composite.
built 8 ordering constraints for composite.
built 24 ordering constraints for composite.
built 28 ordering constraints for composite.
built 27 ordering constraints for composite.
built 27 ordering constraints for composite.
built 28 ordering constraints for composite.
built 34 ordering constraints for composite.
built 27 ordering constraints for composite.
built 31 ordering constraints for composite.
built 21 ordering constraints for composite.
built 23 ordering constraints for composite.
built 26 ordering constraints for composite.
built 29 ordering constraints for composite.
built 29 ordering constraints for composite.
built 6 ordering constraints for composite.
built 6 ordering constraints for composite.
built 6 ordering constraints for composite.
built 8 ordering constraints for composite.
built 9 ordering constraints for composite.
built 6 ordering constraints for composite.
built 9 ordering constraints for composite.
built 7 ordering constraints for composite.
built 6 ordering constraints for composite.
built 7 ordering constraints for composite.
built 6 ordering constraints for composite.
built 7 ordering constraints for composite.
built 7 ordering constraints for composite.
built 7 ordering constraints for composite.
built 7 ordering constraints for composite.
built 8 ordering constraints for composite.
[2020-05-17 03:26:29] [INFO ] Proved 1536 variables to be positive in 2417 ms
[2020-05-17 03:26:29] [INFO ] Computing symmetric may disable matrix : 768 transitions.
[2020-05-17 03:26:29] [INFO ] Computation of disable matrix completed :0/768 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2020-05-17 03:26:29] [INFO ] Computation of Complete disable matrix. took 90 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2020-05-17 03:26:29] [INFO ] Computing symmetric may enable matrix : 768 transitions.
[2020-05-17 03:26:29] [INFO ] Computation of Complete enable matrix. took 88 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2020-05-17 03:26:31] [INFO ] Computing symmetric co enabling matrix : 768 transitions.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown' twice, overapproximating result to 1.
[2020-05-17 03:26:49] [INFO ] Computation of co-enabling matrix(3/768) took 18778 ms. Total solver calls (SAT/UNSAT): 20(14/6)
[2020-05-17 03:26:49] [INFO ] Computation of Finished co-enabling matrix. took 18871 ms. Total solver calls (SAT/UNSAT): 20(14/6)
[2020-05-17 03:26:50] [INFO ] Computing Do-Not-Accords matrix : 768 transitions.
[2020-05-17 03:26:52] [WARNING] SMT solver unexpectedly returned 'unknown' answer, retrying.
[2020-05-17 03:26:53] [WARNING] SMT solver unexpectedly returned 'unknown' answer, retrying.
[2020-05-17 03:26:54] [WARNING] SMT solver unexpectedly returned 'unknown' answer, retrying.
[2020-05-17 03:26:56] [WARNING] SMT solver unexpectedly returned 'unknown' answer, retrying.
[2020-05-17 03:26:57] [WARNING] SMT solver unexpectedly returned 'unknown' answer, retrying.
[2020-05-17 03:26:59] [WARNING] SMT solver unexpectedly returned 'unknown' answer, retrying.
[2020-05-17 03:27:02] [WARNING] SMT solver unexpectedly returned 'unknown' answer, retrying.
[2020-05-17 03:27:04] [WARNING] SMT solver unexpectedly returned 'unknown' answer, retrying.
[2020-05-17 03:27:05] [WARNING] SMT solver unexpectedly returned 'unknown' answer, retrying.
[2020-05-17 03:27:06] [WARNING] SMT solver unexpectedly returned 'unknown' answer, retrying.
[2020-05-17 03:27:08] [WARNING] SMT solver unexpectedly returned 'unknown' answer, retrying.
[2020-05-17 03:27:09] [WARNING] SMT solver unexpectedly returned 'unknown' answer, retrying.
[2020-05-17 03:27:09] [WARNING] SMT solver unexpectedly returned 'unknown' answer, retrying.
[2020-05-17 03:27:11] [WARNING] SMT solver unexpectedly returned 'unknown' answer, retrying.
[2020-05-17 03:27:11] [WARNING] SMT solver unexpectedly returned 'unknown' answer, retrying.
[2020-05-17 03:27:13] [WARNING] SMT solver unexpectedly returned 'unknown' answer, retrying.
[2020-05-17 03:27:13] [WARNING] SMT solver unexpectedly returned 'unknown' answer, retrying.
[2020-05-17 03:27:14] [WARNING] SMT solver unexpectedly returned 'unknown' answer, retrying.
[2020-05-17 03:27:15] [WARNING] SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:320)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:307)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeDoNotAccord(NecessaryEnablingsolver.java:630)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:538)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:831)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:73)
at java.base/java.lang.Thread.run(Thread.java:834)
[2020-05-17 03:27:15] [INFO ] Built C files in 49628ms conformant to PINS in folder :/home/mcc/execution
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 16455 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 66 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (<>([](!( X(( [](<>(X((LTLAP0==true))))) || ( []((LTLAP1==true))) )) )))U((LTLAP2==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc: error while loading shared libraries: libltdl.so.7: cannot open shared object file: No such file or directory
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (<>([](!( X(( [](<>(X((LTLAP0==true))))) || ( []((LTLAP1==true))) )) )))U((LTLAP2==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
127
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (<>([](!( X(( [](<>(X((LTLAP0==true))))) || ( []((LTLAP1==true))) )) )))U((LTLAP2==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
127
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:170)
at fr.lip6.move.gal.application.LTSminRunner.access$10(LTSminRunner.java:124)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:93)
at java.base/java.lang.Thread.run(Thread.java:834)
Detected timeout of ITS tools.
[2020-05-17 03:46:30] [INFO ] Flatten gal took : 528 ms
[2020-05-17 03:46:30] [INFO ] Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 110 ms
[2020-05-17 03:46:30] [INFO ] Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 10 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock, --gen-order, FOLLOW], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock --gen-order FOLLOW
Read 11 LTL properties
Checking formula 0 : !(((F(G(!(X((G(F(X("(((Section_283>=1)&&(F284>=1))||((F365>=1)&&(Section_364>=1)))"))))||(G("((Section_583>=1)&&(F584>=1))")))))))U("((F365>=1)&&(Section_364>=1))")))
Formula 0 simplified : !(FG!X(GFX"(((Section_283>=1)&&(F284>=1))||((F365>=1)&&(Section_364>=1)))" | G"((Section_583>=1)&&(F584>=1))") U "((F365>=1)&&(Section_364>=1))")
Detected timeout of ITS tools.
[2020-05-17 04:06:31] [INFO ] Flatten gal took : 257 ms
[2020-05-17 04:06:32] [INFO ] Input system was already deterministic with 768 transitions.
[2020-05-17 04:06:32] [INFO ] Transformed 1536 places.
[2020-05-17 04:06:32] [INFO ] Transformed 768 transitions.
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
P-invariant computation with GreatSPN timed out. Skipping.
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
[2020-05-17 04:07:02] [INFO ] Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 5 ms
[2020-05-17 04:07:02] [INFO ] Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock, --load-order, /home/mcc/execution/model.ord, --gen-order, FOLLOW], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock --load-order /home/mcc/execution/model.ord --gen-order FOLLOW
Read 11 LTL properties
Successfully loaded order from file /home/mcc/execution/model.ord
Checking formula 0 : !(((F(G(!(X((G(F(X("(((Section_283>=1)&&(F284>=1))||((F365>=1)&&(Section_364>=1)))"))))||(G("((Section_583>=1)&&(F584>=1))")))))))U("((F365>=1)&&(Section_364>=1))")))
Formula 0 simplified : !(FG!X(GFX"(((Section_283>=1)&&(F284>=1))||((F365>=1)&&(Section_364>=1)))" | G"((Section_583>=1)&&(F584>=1))") U "((F365>=1)&&(Section_364>=1))")
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -timeout 3600 -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss128m -Xms40m -Xmx16000m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CircularTrains-PT-768"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itstools"
echo " Input is CircularTrains-PT-768, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r036-smll-158901930600098"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/CircularTrains-PT-768.tgz
mv CircularTrains-PT-768 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;