About the Execution of ITS-Tools for BART-PT-005
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15743.970 | 6996.00 | 17402.00 | 64.10 | FTTFTFFTFFTTFFFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fko/mcc2020-input.r021-oct2-158897698600073.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2020-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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Generated by BenchKit 2-4028
Executing tool itstools
Input is BART-PT-005, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r021-oct2-158897698600073
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.4M
-rw-r--r-- 1 mcc users 4.0K Apr 15 13:39 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K Apr 15 13:39 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.7K Apr 15 13:31 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 15 13:31 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 24 05:37 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K Mar 24 05:37 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 125K Apr 8 14:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 341K Apr 28 14:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 150K Apr 8 14:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 399K Apr 28 14:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.1K Apr 15 13:26 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K Apr 15 13:26 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.7K Apr 15 13:22 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 15 13:22 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 15 13:29 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Apr 15 13:29 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 24 05:37 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 24 05:37 instance
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 iscolored
-rw-r--r-- 1 mcc users 1.3M Mar 24 05:37 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME BART-PT-005-00
FORMULA_NAME BART-PT-005-01
FORMULA_NAME BART-PT-005-02
FORMULA_NAME BART-PT-005-03
FORMULA_NAME BART-PT-005-04
FORMULA_NAME BART-PT-005-05
FORMULA_NAME BART-PT-005-06
FORMULA_NAME BART-PT-005-07
FORMULA_NAME BART-PT-005-08
FORMULA_NAME BART-PT-005-09
FORMULA_NAME BART-PT-005-10
FORMULA_NAME BART-PT-005-11
FORMULA_NAME BART-PT-005-12
FORMULA_NAME BART-PT-005-13
FORMULA_NAME BART-PT-005-14
FORMULA_NAME BART-PT-005-15
=== Now, execution of the tool begins
BK_START 1589206291700
[2020-05-11 14:11:33] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2020-05-11 14:11:33] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2020-05-11 14:11:33] [INFO ] Load time of PNML (sax parser for PT used): 124 ms
[2020-05-11 14:11:33] [INFO ] Transformed 870 places.
[2020-05-11 14:11:33] [INFO ] Transformed 1010 transitions.
[2020-05-11 14:11:33] [INFO ] Found NUPN structural information;
[2020-05-11 14:11:33] [INFO ] Parsed PT model containing 870 places and 1010 transitions in 168 ms.
Reduce places removed 210 places and 0 transitions.
Parsed 16 properties from file /home/mcc/execution/LTLCardinality.xml in 53 ms.
Working with output stream class java.io.PrintStream
Incomplete random walk after 100000 steps, including 0 resets, run finished after 173 ms. (steps per millisecond=578 ) properties seen :[1, 1, 0, 1, 1, 1, 0]
// Phase 1: matrix 1010 rows 660 cols
[2020-05-11 14:11:34] [INFO ] Computed 5 place invariants in 20 ms
[2020-05-11 14:11:34] [INFO ] [Real]Absence check using 5 positive place invariants in 31 ms returned sat
[2020-05-11 14:11:34] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-05-11 14:11:35] [INFO ] [Real]Absence check using state equation in 887 ms returned sat
[2020-05-11 14:11:35] [INFO ] Solution in real domain found non-integer solution.
[2020-05-11 14:11:35] [INFO ] [Nat]Absence check using 5 positive place invariants in 35 ms returned unsat
[2020-05-11 14:11:35] [INFO ] [Real]Absence check using 5 positive place invariants in 25 ms returned sat
[2020-05-11 14:11:35] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-05-11 14:11:36] [INFO ] [Real]Absence check using state equation in 851 ms returned sat
[2020-05-11 14:11:36] [INFO ] Solution in real domain found non-integer solution.
[2020-05-11 14:11:36] [INFO ] [Nat]Absence check using 5 positive place invariants in 31 ms returned unsat
Successfully simplified 2 atomic propositions for a total of 2 simplifications.
[2020-05-11 14:11:36] [INFO ] Initial state reduction rules for CTL removed 11 formulas.
[2020-05-11 14:11:36] [INFO ] Flatten gal took : 112 ms
FORMULA BART-PT-005-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-005-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-005-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-005-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-005-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-005-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-005-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-005-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-005-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-005-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA BART-PT-005-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2020-05-11 14:11:36] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2020-05-11 14:11:36] [INFO ] Flatten gal took : 29 ms
[2020-05-11 14:11:36] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA BART-PT-005-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
[2020-05-11 14:11:37] [INFO ] Applying decomposition
[2020-05-11 14:11:37] [INFO ] Flatten gal took : 30 ms
[2020-05-11 14:11:37] [INFO ] Input system was already deterministic with 1010 transitions.
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202005100927/bin/convert-linux64, -i, /tmp/graph1096312458711715654.txt, -o, /tmp/graph1096312458711715654.bin, -w, /tmp/graph1096312458711715654.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202005100927/bin/louvain-linux64, /tmp/graph1096312458711715654.bin, -l, -1, -v, -w, /tmp/graph1096312458711715654.weights, -q, 0, -e, 0.001], workingDir=null]
[2020-05-11 14:11:37] [INFO ] Decomposing Gal with order
[2020-05-11 14:11:37] [INFO ] Rewriting arrays to variables to allow decomposition.
[2020-05-11 14:11:37] [INFO ] Removed a total of 60 redundant transitions.
[2020-05-11 14:11:37] [INFO ] Flatten gal took : 164 ms
[2020-05-11 14:11:37] [INFO ] Fuse similar labels procedure discarded/fused a total of 0 labels/synchronizations in 16 ms.
[2020-05-11 14:11:37] [INFO ] Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 53 ms
[2020-05-11 14:11:37] [INFO ] Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 1 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 4 LTL properties
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 1010 rows 660 cols
[2020-05-11 14:11:37] [INFO ] Computed 5 place invariants in 11 ms
inv : TrainState_2_0_0 + TrainState_2_1_1 + TrainState_2_1_2 + TrainState_2_1_3 + TrainState_2_1_4 + TrainState_2_2_4 + TrainState_2_1_5 + TrainState_2_2_5 + TrainState_2_1_6 + TrainState_2_2_6 + TrainState_2_1_7 + TrainState_2_2_7 + TrainState_2_3_7 + TrainState_2_1_8 + TrainState_2_2_8 + TrainState_2_3_8 + TrainState_2_1_9 + TrainState_2_2_9 + TrainState_2_3_9 + TrainState_2_1_10 + TrainState_2_2_10 + TrainState_2_3_10 + TrainState_2_1_11 + TrainState_2_2_11 + TrainState_2_3_11 + TrainState_2_4_11 + TrainState_2_1_12 + TrainState_2_2_12 + TrainState_2_3_12 + TrainState_2_4_12 + TrainState_2_1_13 + TrainState_2_2_13 + TrainState_2_3_13 + TrainState_2_4_13 + TrainState_2_1_14 + TrainState_2_2_14 + TrainState_2_3_14 + TrainState_2_4_14 + TrainState_2_1_15 + TrainState_2_2_15 + TrainState_2_3_15 + TrainState_2_4_15 + TrainState_2_1_16 + TrainState_2_2_16 + TrainState_2_3_16 + TrainState_2_4_16 + TrainState_2_1_17 + TrainState_2_2_17 + TrainState_2_3_17 + TrainState_2_4_17 + TrainState_2_1_18 + TrainState_2_2_18 + TrainState_2_3_18 + TrainState_2_4_18 + TrainState_2_1_19 + TrainState_2_2_19 + TrainState_2_3_19 + TrainState_2_4_19 + TrainState_2_1_20 + TrainState_2_2_20 + TrainState_2_3_20 + TrainState_2_4_20 + TrainState_2_1_21 + TrainState_2_2_21 + TrainState_2_3_21 + TrainState_2_4_21 + TrainState_2_1_22 + TrainState_2_2_22 + TrainState_2_3_22 + TrainState_2_4_22 + TrainState_2_1_23 + TrainState_2_2_23 + TrainState_2_3_23 + TrainState_2_4_23 + TrainState_2_1_24 + TrainState_2_2_24 + TrainState_2_3_24 + TrainState_2_4_24 + TrainState_2_1_25 + TrainState_2_2_25 + TrainState_2_3_25 + TrainState_2_4_25 + TrainState_2_1_26 + TrainState_2_2_26 + TrainState_2_3_26 + TrainState_2_4_26 + TrainState_2_1_27 + TrainState_2_2_27 + TrainState_2_3_27 + TrainState_2_4_27 + TrainState_2_1_28 + TrainState_2_2_28 + TrainState_2_3_28 + TrainState_2_4_28 + TrainState_2_1_29 + TrainState_2_2_29 + TrainState_2_3_29 + TrainState_2_4_29 + TrainState_2_1_30 + TrainState_2_2_30 + TrainState_2_3_30 + TrainState_2_4_30 + TrainState_2_1_31 + TrainState_2_2_31 + TrainState_2_3_31 + TrainState_2_4_31 + TrainState_2_1_32 + TrainState_2_2_32 + TrainState_2_3_32 + TrainState_2_4_32 + TrainState_2_1_33 + TrainState_2_2_33 + TrainState_2_3_33 + TrainState_2_4_33 + TrainState_2_1_34 + TrainState_2_2_34 + TrainState_2_3_34 + TrainState_2_4_34 + TrainState_2_1_35 + TrainState_2_2_35 + TrainState_2_3_35 + TrainState_2_1_36 + TrainState_2_2_36 + TrainState_2_3_36 + TrainState_2_1_37 + TrainState_2_2_37 + TrainState_2_3_37 + TrainState_2_1_38 + TrainState_2_2_38 + TrainState_2_1_39 + TrainState_2_2_39 + TrainState_2_1_40 = 1
inv : TrainState_1_0_0 + TrainState_1_1_1 + TrainState_1_1_2 + TrainState_1_1_3 + TrainState_1_1_4 + TrainState_1_2_4 + TrainState_1_1_5 + TrainState_1_2_5 + TrainState_1_1_6 + TrainState_1_2_6 + TrainState_1_1_7 + TrainState_1_2_7 + TrainState_1_3_7 + TrainState_1_1_8 + TrainState_1_2_8 + TrainState_1_3_8 + TrainState_1_1_9 + TrainState_1_2_9 + TrainState_1_3_9 + TrainState_1_1_10 + TrainState_1_2_10 + TrainState_1_3_10 + TrainState_1_1_11 + TrainState_1_2_11 + TrainState_1_3_11 + TrainState_1_4_11 + TrainState_1_1_12 + TrainState_1_2_12 + TrainState_1_3_12 + TrainState_1_4_12 + TrainState_1_1_13 + TrainState_1_2_13 + TrainState_1_3_13 + TrainState_1_4_13 + TrainState_1_1_14 + TrainState_1_2_14 + TrainState_1_3_14 + TrainState_1_4_14 + TrainState_1_1_15 + TrainState_1_2_15 + TrainState_1_3_15 + TrainState_1_4_15 + TrainState_1_1_16 + TrainState_1_2_16 + TrainState_1_3_16 + TrainState_1_4_16 + TrainState_1_1_17 + TrainState_1_2_17 + TrainState_1_3_17 + TrainState_1_4_17 + TrainState_1_1_18 + TrainState_1_2_18 + TrainState_1_3_18 + TrainState_1_4_18 + TrainState_1_1_19 + TrainState_1_2_19 + TrainState_1_3_19 + TrainState_1_4_19 + TrainState_1_1_20 + TrainState_1_2_20 + TrainState_1_3_20 + TrainState_1_4_20 + TrainState_1_1_21 + TrainState_1_2_21 + TrainState_1_3_21 + TrainState_1_4_21 + TrainState_1_1_22 + TrainState_1_2_22 + TrainState_1_3_22 + TrainState_1_4_22 + TrainState_1_1_23 + TrainState_1_2_23 + TrainState_1_3_23 + TrainState_1_4_23 + TrainState_1_1_24 + TrainState_1_2_24 + TrainState_1_3_24 + TrainState_1_4_24 + TrainState_1_1_25 + TrainState_1_2_25 + TrainState_1_3_25 + TrainState_1_4_25 + TrainState_1_1_26 + TrainState_1_2_26 + TrainState_1_3_26 + TrainState_1_4_26 + TrainState_1_1_27 + TrainState_1_2_27 + TrainState_1_3_27 + TrainState_1_4_27 + TrainState_1_1_28 + TrainState_1_2_28 + TrainState_1_3_28 + TrainState_1_4_28 + TrainState_1_1_29 + TrainState_1_2_29 + TrainState_1_3_29 + TrainState_1_4_29 + TrainState_1_1_30 + TrainState_1_2_30 + TrainState_1_3_30 + TrainState_1_4_30 + TrainState_1_1_31 + TrainState_1_2_31 + TrainState_1_3_31 + TrainState_1_4_31 + TrainState_1_1_32 + TrainState_1_2_32 + TrainState_1_3_32 + TrainState_1_4_32 + TrainState_1_1_33 + TrainState_1_2_33 + TrainState_1_3_33 + TrainState_1_4_33 + TrainState_1_1_34 + TrainState_1_2_34 + TrainState_1_3_34 + TrainState_1_4_34 + TrainState_1_1_35 + TrainState_1_2_35 + TrainState_1_3_35 + TrainState_1_1_36 + TrainState_1_2_36 + TrainState_1_3_36 + TrainState_1_1_37 + TrainState_1_2_37 + TrainState_1_3_37 + TrainState_1_1_38 + TrainState_1_2_38 + TrainState_1_1_39 + TrainState_1_2_39 + TrainState_1_1_40 = 1
inv : TrainState_3_0_0 + TrainState_3_1_1 + TrainState_3_1_2 + TrainState_3_1_3 + TrainState_3_1_4 + TrainState_3_2_4 + TrainState_3_1_5 + TrainState_3_2_5 + TrainState_3_1_6 + TrainState_3_2_6 + TrainState_3_1_7 + TrainState_3_2_7 + TrainState_3_3_7 + TrainState_3_1_8 + TrainState_3_2_8 + TrainState_3_3_8 + TrainState_3_1_9 + TrainState_3_2_9 + TrainState_3_3_9 + TrainState_3_1_10 + TrainState_3_2_10 + TrainState_3_3_10 + TrainState_3_1_11 + TrainState_3_2_11 + TrainState_3_3_11 + TrainState_3_4_11 + TrainState_3_1_12 + TrainState_3_2_12 + TrainState_3_3_12 + TrainState_3_4_12 + TrainState_3_1_13 + TrainState_3_2_13 + TrainState_3_3_13 + TrainState_3_4_13 + TrainState_3_1_14 + TrainState_3_2_14 + TrainState_3_3_14 + TrainState_3_4_14 + TrainState_3_1_15 + TrainState_3_2_15 + TrainState_3_3_15 + TrainState_3_4_15 + TrainState_3_1_16 + TrainState_3_2_16 + TrainState_3_3_16 + TrainState_3_4_16 + TrainState_3_1_17 + TrainState_3_2_17 + TrainState_3_3_17 + TrainState_3_4_17 + TrainState_3_1_18 + TrainState_3_2_18 + TrainState_3_3_18 + TrainState_3_4_18 + TrainState_3_1_19 + TrainState_3_2_19 + TrainState_3_3_19 + TrainState_3_4_19 + TrainState_3_1_20 + TrainState_3_2_20 + TrainState_3_3_20 + TrainState_3_4_20 + TrainState_3_1_21 + TrainState_3_2_21 + TrainState_3_3_21 + TrainState_3_4_21 + TrainState_3_1_22 + TrainState_3_2_22 + TrainState_3_3_22 + TrainState_3_4_22 + TrainState_3_1_23 + TrainState_3_2_23 + TrainState_3_3_23 + TrainState_3_4_23 + TrainState_3_1_24 + TrainState_3_2_24 + TrainState_3_3_24 + TrainState_3_4_24 + TrainState_3_1_25 + TrainState_3_2_25 + TrainState_3_3_25 + TrainState_3_4_25 + TrainState_3_1_26 + TrainState_3_2_26 + TrainState_3_3_26 + TrainState_3_4_26 + TrainState_3_1_27 + TrainState_3_2_27 + TrainState_3_3_27 + TrainState_3_4_27 + TrainState_3_1_28 + TrainState_3_2_28 + TrainState_3_3_28 + TrainState_3_4_28 + TrainState_3_1_29 + TrainState_3_2_29 + TrainState_3_3_29 + TrainState_3_4_29 + TrainState_3_1_30 + TrainState_3_2_30 + TrainState_3_3_30 + TrainState_3_4_30 + TrainState_3_1_31 + TrainState_3_2_31 + TrainState_3_3_31 + TrainState_3_4_31 + TrainState_3_1_32 + TrainState_3_2_32 + TrainState_3_3_32 + TrainState_3_4_32 + TrainState_3_1_33 + TrainState_3_2_33 + TrainState_3_3_33 + TrainState_3_4_33 + TrainState_3_1_34 + TrainState_3_2_34 + TrainState_3_3_34 + TrainState_3_4_34 + TrainState_3_1_35 + TrainState_3_2_35 + TrainState_3_3_35 + TrainState_3_1_36 + TrainState_3_2_36 + TrainState_3_3_36 + TrainState_3_1_37 + TrainState_3_2_37 + TrainState_3_3_37 + TrainState_3_1_38 + TrainState_3_2_38 + TrainState_3_1_39 + TrainState_3_2_39 + TrainState_3_1_40 = 1
inv : TrainState_4_0_0 + TrainState_4_1_1 + TrainState_4_1_2 + TrainState_4_1_3 + TrainState_4_1_4 + TrainState_4_2_4 + TrainState_4_1_5 + TrainState_4_2_5 + TrainState_4_1_6 + TrainState_4_2_6 + TrainState_4_1_7 + TrainState_4_2_7 + TrainState_4_3_7 + TrainState_4_1_8 + TrainState_4_2_8 + TrainState_4_3_8 + TrainState_4_1_9 + TrainState_4_2_9 + TrainState_4_3_9 + TrainState_4_1_10 + TrainState_4_2_10 + TrainState_4_3_10 + TrainState_4_1_11 + TrainState_4_2_11 + TrainState_4_3_11 + TrainState_4_4_11 + TrainState_4_1_12 + TrainState_4_2_12 + TrainState_4_3_12 + TrainState_4_4_12 + TrainState_4_1_13 + TrainState_4_2_13 + TrainState_4_3_13 + TrainState_4_4_13 + TrainState_4_1_14 + TrainState_4_2_14 + TrainState_4_3_14 + TrainState_4_4_14 + TrainState_4_1_15 + TrainState_4_2_15 + TrainState_4_3_15 + TrainState_4_4_15 + TrainState_4_1_16 + TrainState_4_2_16 + TrainState_4_3_16 + TrainState_4_4_16 + TrainState_4_1_17 + TrainState_4_2_17 + TrainState_4_3_17 + TrainState_4_4_17 + TrainState_4_1_18 + TrainState_4_2_18 + TrainState_4_3_18 + TrainState_4_4_18 + TrainState_4_1_19 + TrainState_4_2_19 + TrainState_4_3_19 + TrainState_4_4_19 + TrainState_4_1_20 + TrainState_4_2_20 + TrainState_4_3_20 + TrainState_4_4_20 + TrainState_4_1_21 + TrainState_4_2_21 + TrainState_4_3_21 + TrainState_4_4_21 + TrainState_4_1_22 + TrainState_4_2_22 + TrainState_4_3_22 + TrainState_4_4_22 + TrainState_4_1_23 + TrainState_4_2_23 + TrainState_4_3_23 + TrainState_4_4_23 + TrainState_4_1_24 + TrainState_4_2_24 + TrainState_4_3_24 + TrainState_4_4_24 + TrainState_4_1_25 + TrainState_4_2_25 + TrainState_4_3_25 + TrainState_4_4_25 + TrainState_4_1_26 + TrainState_4_2_26 + TrainState_4_3_26 + TrainState_4_4_26 + TrainState_4_1_27 + TrainState_4_2_27 + TrainState_4_3_27 + TrainState_4_4_27 + TrainState_4_1_28 + TrainState_4_2_28 + TrainState_4_3_28 + TrainState_4_4_28 + TrainState_4_1_29 + TrainState_4_2_29 + TrainState_4_3_29 + TrainState_4_4_29 + TrainState_4_1_30 + TrainState_4_2_30 + TrainState_4_3_30 + TrainState_4_4_30 + TrainState_4_1_31 + TrainState_4_2_31 + TrainState_4_3_31 + TrainState_4_4_31 + TrainState_4_1_32 + TrainState_4_2_32 + TrainState_4_3_32 + TrainState_4_4_32 + TrainState_4_1_33 + TrainState_4_2_33 + TrainState_4_3_33 + TrainState_4_4_33 + TrainState_4_1_34 + TrainState_4_2_34 + TrainState_4_3_34 + TrainState_4_4_34 + TrainState_4_1_35 + TrainState_4_2_35 + TrainState_4_3_35 + TrainState_4_1_36 + TrainState_4_2_36 + TrainState_4_3_36 + TrainState_4_1_37 + TrainState_4_2_37 + TrainState_4_3_37 + TrainState_4_1_38 + TrainState_4_2_38 + TrainState_4_1_39 + TrainState_4_2_39 + TrainState_4_1_40 = 1
inv : TrainState_5_0_0 + TrainState_5_1_1 + TrainState_5_1_2 + TrainState_5_1_3 + TrainState_5_1_4 + TrainState_5_2_4 + TrainState_5_1_5 + TrainState_5_2_5 + TrainState_5_1_6 + TrainState_5_2_6 + TrainState_5_1_7 + TrainState_5_2_7 + TrainState_5_3_7 + TrainState_5_1_8 + TrainState_5_2_8 + TrainState_5_3_8 + TrainState_5_1_9 + TrainState_5_2_9 + TrainState_5_3_9 + TrainState_5_1_10 + TrainState_5_2_10 + TrainState_5_3_10 + TrainState_5_1_11 + TrainState_5_2_11 + TrainState_5_3_11 + TrainState_5_4_11 + TrainState_5_1_12 + TrainState_5_2_12 + TrainState_5_3_12 + TrainState_5_4_12 + TrainState_5_1_13 + TrainState_5_2_13 + TrainState_5_3_13 + TrainState_5_4_13 + TrainState_5_1_14 + TrainState_5_2_14 + TrainState_5_3_14 + TrainState_5_4_14 + TrainState_5_1_15 + TrainState_5_2_15 + TrainState_5_3_15 + TrainState_5_4_15 + TrainState_5_1_16 + TrainState_5_2_16 + TrainState_5_3_16 + TrainState_5_4_16 + TrainState_5_1_17 + TrainState_5_2_17 + TrainState_5_3_17 + TrainState_5_4_17 + TrainState_5_1_18 + TrainState_5_2_18 + TrainState_5_3_18 + TrainState_5_4_18 + TrainState_5_1_19 + TrainState_5_2_19 + TrainState_5_3_19 + TrainState_5_4_19 + TrainState_5_1_20 + TrainState_5_2_20 + TrainState_5_3_20 + TrainState_5_4_20 + TrainState_5_1_21 + TrainState_5_2_21 + TrainState_5_3_21 + TrainState_5_4_21 + TrainState_5_1_22 + TrainState_5_2_22 + TrainState_5_3_22 + TrainState_5_4_22 + TrainState_5_1_23 + TrainState_5_2_23 + TrainState_5_3_23 + TrainState_5_4_23 + TrainState_5_1_24 + TrainState_5_2_24 + TrainState_5_3_24 + TrainState_5_4_24 + TrainState_5_1_25 + TrainState_5_2_25 + TrainState_5_3_25 + TrainState_5_4_25 + TrainState_5_1_26 + TrainState_5_2_26 + TrainState_5_3_26 + TrainState_5_4_26 + TrainState_5_1_27 + TrainState_5_2_27 + TrainState_5_3_27 + TrainState_5_4_27 + TrainState_5_1_28 + TrainState_5_2_28 + TrainState_5_3_28 + TrainState_5_4_28 + TrainState_5_1_29 + TrainState_5_2_29 + TrainState_5_3_29 + TrainState_5_4_29 + TrainState_5_1_30 + TrainState_5_2_30 + TrainState_5_3_30 + TrainState_5_4_30 + TrainState_5_1_31 + TrainState_5_2_31 + TrainState_5_3_31 + TrainState_5_4_31 + TrainState_5_1_32 + TrainState_5_2_32 + TrainState_5_3_32 + TrainState_5_4_32 + TrainState_5_1_33 + TrainState_5_2_33 + TrainState_5_3_33 + TrainState_5_4_33 + TrainState_5_1_34 + TrainState_5_2_34 + TrainState_5_3_34 + TrainState_5_4_34 + TrainState_5_1_35 + TrainState_5_2_35 + TrainState_5_3_35 + TrainState_5_1_36 + TrainState_5_2_36 + TrainState_5_3_36 + TrainState_5_1_37 + TrainState_5_2_37 + TrainState_5_3_37 + TrainState_5_1_38 + TrainState_5_2_38 + TrainState_5_1_39 + TrainState_5_2_39 + TrainState_5_1_40 = 1
Total of 5 invariants.
[2020-05-11 14:11:37] [INFO ] Computed 5 place invariants in 12 ms
Checking formula 0 : !(((F((F(G("(i4.i0.i2.u96.TrainState_4_4_20==1)")))&&("(i4.i0.i2.u96.TrainState_4_4_20==1)")))&&(X("(i0.u130.TrainState_2_3_24==1)"))))
Formula 0 simplified : !(F("(i4.i0.i2.u96.TrainState_4_4_20==1)" & FG"(i4.i0.i2.u96.TrainState_4_4_20==1)") & X"(i0.u130.TrainState_2_3_24==1)")
built 4 ordering constraints for composite.
built 66 ordering constraints for composite.
built 11 ordering constraints for composite.
built 8 ordering constraints for composite.
built 24 ordering constraints for composite.
built 7 ordering constraints for composite.
built 43 ordering constraints for composite.
built 6 ordering constraints for composite.
built 5 ordering constraints for composite.
built 5 ordering constraints for composite.
built 7 ordering constraints for composite.
built 5 ordering constraints for composite.
built 9 ordering constraints for composite.
built 6 ordering constraints for composite.
built 4 ordering constraints for composite.
built 6 ordering constraints for composite.
built 14 ordering constraints for composite.
built 3 ordering constraints for composite.
built 22 ordering constraints for composite.
built 45 ordering constraints for composite.
built 6 ordering constraints for composite.
built 6 ordering constraints for composite.
built 6 ordering constraints for composite.
built 4 ordering constraints for composite.
built 4 ordering constraints for composite.
built 9 ordering constraints for composite.
built 5 ordering constraints for composite.
built 5 ordering constraints for composite.
built 4 ordering constraints for composite.
built 11 ordering constraints for composite.
built 7 ordering constraints for composite.
built 6 ordering constraints for composite.
built 7 ordering constraints for composite.
built 14 ordering constraints for composite.
built 8 ordering constraints for composite.
built 18 ordering constraints for composite.
built 49 ordering constraints for composite.
built 7 ordering constraints for composite.
built 6 ordering constraints for composite.
built 6 ordering constraints for composite.
built 12 ordering constraints for composite.
built 5 ordering constraints for composite.
built 5 ordering constraints for composite.
built 5 ordering constraints for composite.
built 4 ordering constraints for composite.
built 14 ordering constraints for composite.
built 8 ordering constraints for composite.
built 22 ordering constraints for composite.
built 46 ordering constraints for composite.
built 7 ordering constraints for composite.
built 6 ordering constraints for composite.
built 8 ordering constraints for composite.
built 7 ordering constraints for composite.
built 5 ordering constraints for composite.
built 9 ordering constraints for composite.
built 6 ordering constraints for composite.
built 6 ordering constraints for composite.
built 4 ordering constraints for composite.
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
25 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,0.336906,28744,1,0,20695,4523,3097,36744,882,8550,43990
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA BART-PT-005-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((F(F("(i4.i0.i0.u11.TrainState_4_1_17==1)"))))
Formula 1 simplified : !F"(i4.i0.i0.u11.TrainState_4_1_17==1)"
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
8 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,0.426179,32344,1,0,26918,5802,4279,46106,1014,10281,59997
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA BART-PT-005-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((X("(i4.i2.i0.u74.TrainState_4_4_14==1)")))
Formula 2 simplified : !X"(i4.i2.i0.u74.TrainState_4_4_14==1)"
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
2 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,0.439506,32608,1,0,27852,5907,4482,47303,1014,10509,62615
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA BART-PT-005-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !((X(!(F(X(F("(i8.i0.i0.u10.TrainState_1_1_6==1)")))))))
Formula 3 simplified : !X!FXF"(i8.i0.i0.u10.TrainState_1_1_6==1)"
5 unique states visited
5 strongly connected components in search stack
5 transitions explored
5 items max in DFS search stack
2 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,0.452463,33392,1,0,28819,6402,4496,49568,1014,11516,65879
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA BART-PT-005-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout :(error "Failed to check-sat")
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:299)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:116)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.init(NecessaryEnablingsolver.java:71)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:471)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:831)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:73)
at java.base/java.lang.Thread.run(Thread.java:834)
[2020-05-11 14:11:38] [INFO ] Built C files in 1529ms conformant to PINS in folder :/home/mcc/execution
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.
BK_STOP 1589206298696
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -timeout 3600 -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss128m -Xms40m -Xmx16000m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BART-PT-005"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itstools"
echo " Input is BART-PT-005, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r021-oct2-158897698600073"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/BART-PT-005.tgz
mv BART-PT-005 execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;