Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2020-input.r006-smll-158897515400005.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2020-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool itstools
Input is ARMCacheCoherence-PT-none, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r006-smll-158897515400005
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 14M
-rw-r--r-- 1 mcc users 3.4K Mar 25 09:43 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K Mar 25 09:43 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Mar 25 09:36 CTLFireability.txt
-rw-r--r-- 1 mcc users 20K Mar 25 09:36 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 24 05:37 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K Mar 24 05:37 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K Apr 8 14:40 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 28 14:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Apr 8 14:41 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Apr 28 14:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Mar 25 09:02 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K Mar 25 09:02 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Mar 25 08:56 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K Mar 25 08:56 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Mar 25 09:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Mar 25 09:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 24 05:37 instance
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 iscolored
-rw-r--r-- 1 mcc users 14M Mar 24 05:37 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ARMCacheCoherence-PT-none-00
FORMULA_NAME ARMCacheCoherence-PT-none-01
FORMULA_NAME ARMCacheCoherence-PT-none-02
FORMULA_NAME ARMCacheCoherence-PT-none-03
FORMULA_NAME ARMCacheCoherence-PT-none-04
FORMULA_NAME ARMCacheCoherence-PT-none-05
FORMULA_NAME ARMCacheCoherence-PT-none-06
FORMULA_NAME ARMCacheCoherence-PT-none-07
FORMULA_NAME ARMCacheCoherence-PT-none-08
FORMULA_NAME ARMCacheCoherence-PT-none-09
FORMULA_NAME ARMCacheCoherence-PT-none-10
FORMULA_NAME ARMCacheCoherence-PT-none-11
FORMULA_NAME ARMCacheCoherence-PT-none-12
FORMULA_NAME ARMCacheCoherence-PT-none-13
FORMULA_NAME ARMCacheCoherence-PT-none-14
FORMULA_NAME ARMCacheCoherence-PT-none-15

=== Now, execution of the tool begins

BK_START 1589197775357

[2020-05-11 11:49:38] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2020-05-11 11:49:38] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2020-05-11 11:49:39] [INFO ] Load time of PNML (sax parser for PT used): 1385 ms
[2020-05-11 11:49:40] [INFO ] Transformed 87 places.
[2020-05-11 11:49:40] [INFO ] Transformed 33676 transitions.
[2020-05-11 11:49:40] [INFO ] Found NUPN structural information;
[2020-05-11 11:49:40] [INFO ] Parsed PT model containing 87 places and 33676 transitions in 1711 ms.
Ensure Unique test removed 32425 transitions
Reduce redundant transitions removed 32425 transitions.
Parsed 16 properties from file /home/mcc/execution/LTLCardinality.xml in 262 ms.
Working with output stream class java.io.PrintStream
Incomplete random walk after 100000 steps, including 78 resets, run finished after 989 ms. (steps per millisecond=101 ) properties seen :[0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 0, 1, 1]
[2020-05-11 11:49:41] [INFO ] Flow matrix only has 500 transitions (discarded 751 similar events)
// Phase 1: matrix 500 rows 87 cols
[2020-05-11 11:49:41] [INFO ] Computed 12 place invariants in 37 ms
[2020-05-11 11:49:41] [INFO ] [Real]Absence check using 12 positive place invariants in 29 ms returned sat
[2020-05-11 11:49:41] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-05-11 11:49:42] [INFO ] [Real]Absence check using state equation in 350 ms returned sat
[2020-05-11 11:49:42] [INFO ] Solution in real domain found non-integer solution.
[2020-05-11 11:49:42] [INFO ] [Nat]Absence check using 12 positive place invariants in 15 ms returned unsat
[2020-05-11 11:49:42] [INFO ] [Real]Absence check using 12 positive place invariants in 13 ms returned sat
[2020-05-11 11:49:42] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-05-11 11:49:42] [INFO ] [Real]Absence check using state equation in 293 ms returned sat
[2020-05-11 11:49:42] [INFO ] Solution in real domain found non-integer solution.
[2020-05-11 11:49:42] [INFO ] [Nat]Absence check using 12 positive place invariants in 11 ms returned unsat
[2020-05-11 11:49:42] [INFO ] [Real]Absence check using 12 positive place invariants in 8 ms returned sat
[2020-05-11 11:49:42] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-05-11 11:49:43] [INFO ] [Real]Absence check using state equation in 183 ms returned sat
[2020-05-11 11:49:43] [INFO ] Solution in real domain found non-integer solution.
[2020-05-11 11:49:43] [INFO ] [Nat]Absence check using 12 positive place invariants in 7 ms returned unsat
Successfully simplified 3 atomic propositions for a total of 5 simplifications.
[2020-05-11 11:49:43] [INFO ] Initial state reduction rules for CTL removed 7 formulas.
[2020-05-11 11:49:43] [INFO ] Flatten gal took : 273 ms
FORMULA ARMCacheCoherence-PT-none-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-11 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2020-05-11 11:49:43] [INFO ] Flatten gal took : 137 ms
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
[2020-05-11 11:49:44] [INFO ] Applying decomposition
[2020-05-11 11:49:44] [INFO ] Flatten gal took : 137 ms
[2020-05-11 11:49:44] [INFO ] Input system was already deterministic with 1251 transitions.
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202005100927/bin/convert-linux64, -i, /tmp/graph3628255484706605999.txt, -o, /tmp/graph3628255484706605999.bin, -w, /tmp/graph3628255484706605999.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202005100927/bin/louvain-linux64, /tmp/graph3628255484706605999.bin, -l, -1, -v, -w, /tmp/graph3628255484706605999.weights, -q, 0, -e, 0.001], workingDir=null]
[2020-05-11 11:49:44] [INFO ] Decomposing Gal with order
[2020-05-11 11:49:44] [INFO ] Rewriting arrays to variables to allow decomposition.
[2020-05-11 11:49:45] [INFO ] Removed a total of 4402 redundant transitions.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 500 out of 1251 initially.
// Phase 1: matrix 500 rows 87 cols
[2020-05-11 11:49:45] [INFO ] Computed 12 place invariants in 9 ms
inv : p0 + p72 + p73 + p74 = 1
inv : p0 + p75 + p76 + p77 + p78 = 1
inv : p0 + p83 + p84 + p85 + p86 = 1
inv : p0 + p8 + p9 = 1
inv : p0 + p79 + p80 + p81 + p82 = 1
inv : p0 + p10 + p11 + p12 + p13 + p14 + p15 + p16 + p17 + p18 + p19 + p20 + p21 + p22 + p23 + p24 = 1
inv : p0 + p25 + p26 + p27 + p28 + p29 + p30 + p31 + p32 + p33 + p34 + p35 + p36 + p37 + p38 + p39 = 1
inv : p0 + p40 + p41 + p42 + p43 + p44 + p45 + p46 + p47 + p48 + p49 + p50 + p51 + p52 + p53 + p54 = 1
inv : p0 + p55 + p56 + p57 + p58 + p59 + p60 + p61 + p62 + p63 + p64 + p65 + p66 + p67 + p68 + p69 = 1
inv : p0 + p6 + p7 = 1
inv : p0 + p1 + p2 + p3 + p4 + p5 = 1
inv : p0 + p70 + p71 = 1
Total of 12 invariants.
[2020-05-11 11:49:45] [INFO ] Computed 12 place invariants in 11 ms
[2020-05-11 11:49:45] [INFO ] Flatten gal took : 396 ms
[2020-05-11 11:49:45] [INFO ] Fuse similar labels procedure discarded/fused a total of 94 labels/synchronizations in 70 ms.
[2020-05-11 11:49:45] [INFO ] Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 11 ms
[2020-05-11 11:49:45] [INFO ] Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 1 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 9 LTL properties
Checking formula 0 : !((G(F("(((u15.p86!=0)&&(i2.u5.p23!=1))&&((i6.u11.p67==0)||(i7.u3.p8==1)))"))))
Formula 0 simplified : !GF"(((u15.p86!=0)&&(i2.u5.p23!=1))&&((i6.u11.p67==0)||(i7.u3.p8==1)))"
built 55 ordering constraints for composite.
built 27 ordering constraints for composite.
built 25 ordering constraints for composite.
built 21 ordering constraints for composite.
built 16 ordering constraints for composite.
built 21 ordering constraints for composite.
Reverse transition relation is NOT exact ! Due to transitions u15.t4, u14.t13, i2.u5.t109, i2.u5.t111, i4.u7.t83, i4.u7.t85, i5.u9.t57, i5.u9.t59, i6.u11.t31, i6.u11.t33, i7.u13.t20, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/454/11/465
4 unique states visited
4 strongly connected components in search stack
5 transitions explored
4 items max in DFS search stack
45 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,0.500916,25492,1,0,14586,1444,5023,31532,410,7145,46144
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA ARMCacheCoherence-PT-none-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((!(X(!(F(X((X((X("((i7.u13.p76==0)||(i5.u9.p44==1))"))&&("((i6.u10.p63==0)||(i5.u9.p44==1))")))||(G("((u12.p71==0)||(i4.u7.p26==1))")))))))))
Formula 1 simplified : X!FX(X("((i6.u10.p63==0)||(i5.u9.p44==1))" & X"((i7.u13.p76==0)||(i5.u9.p44==1))") | G"((u12.p71==0)||(i4.u7.p26==1))")
[2020-05-11 11:49:46] [INFO ] Proved 87 variables to be positive in 1159 ms
[2020-05-11 11:49:46] [INFO ] Computing symmetric may disable matrix : 1251 transitions.
[2020-05-11 11:49:46] [INFO ] Computation of disable matrix completed :0/1251 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2020-05-11 11:49:46] [INFO ] Computation of Complete disable matrix. took 204 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2020-05-11 11:49:46] [INFO ] Computing symmetric may enable matrix : 1251 transitions.
[2020-05-11 11:49:46] [INFO ] Computation of Complete enable matrix. took 155 ms. Total solver calls (SAT/UNSAT): 0(0/0)
6 unique states visited
6 strongly connected components in search stack
6 transitions explored
6 items max in DFS search stack
272 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,3.22196,93252,1,0,128515,2578,5401,267115,413,26994,316989
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA ARMCacheCoherence-PT-none-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((X((F("((i2.u0.p1!=0)&&(i6.u11.p55!=1))"))||(G((("((i2.u0.p1==0)||(i6.u11.p55==1))")U("((i5.u9.p54==0)||(i2.u5.p24==1))"))U("((i7.u13.p75==0)||(u15.p84==1))"))))))
Formula 2 simplified : !X(F"((i2.u0.p1!=0)&&(i6.u11.p55!=1))" | G(("((i2.u0.p1==0)||(i6.u11.p55==1))" U "((i5.u9.p54==0)||(i2.u5.p24==1))") U "((i7.u13.p75==0)||(u15.p84==1))"))
2 unique states visited
0 strongly connected components in search stack
1 transitions explored
2 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,3.22939,94448,1,0,128515,2578,5488,267115,419,26994,317071
no accepting run found
Formula 2 is TRUE no accepting run found.
FORMULA ARMCacheCoherence-PT-none-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !((X(X(F("((u14.p82==0)||(u12.p71==1))")))))
Formula 3 simplified : !XXF"((u14.p82==0)||(u12.p71==1))"
3 unique states visited
0 strongly connected components in search stack
2 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,3.23156,94448,1,0,128522,2578,5510,267123,421,26994,317106
no accepting run found
Formula 3 is TRUE no accepting run found.
FORMULA ARMCacheCoherence-PT-none-04 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !((!(G(X(F(G((F(G("((i2.u4.p17==0)||(i6.u10.p61==1))")))U("(i6.u11.p67==1)"))))))))
Formula 4 simplified : GXFG(FG"((i2.u4.p17==0)||(i6.u10.p61==1))" U "(i6.u11.p67==1)")
3 unique states visited
3 strongly connected components in search stack
4 transitions explored
3 items max in DFS search stack
2 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,3.26029,95004,1,0,129611,2578,5558,269349,422,27073,320115
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA ARMCacheCoherence-PT-none-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 5 : !((!(X(X(!(((F(G("((i2.u5.p22==0)||(u12.p74==1))")))U(F("(i2.u5.p20==1)")))U("(i2.u5.p20==1)")))))))
Formula 5 simplified : XX!((FG"((i2.u5.p22==0)||(u12.p74==1))" U F"(i2.u5.p20==1)") U "(i2.u5.p20==1)")
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
107 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,4.32282,122980,1,0,180710,2624,5694,371050,424,28794,432206
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA ARMCacheCoherence-PT-none-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 6 : !((X(((X(G(!(X("((i4.u6.p32==0)||(i2.u5.p23==1))")))))||("(i6.u11.p69==0)"))||("(i5.u8.p47==1)"))))
Formula 6 simplified : !X("(i5.u8.p47==1)" | "(i6.u11.p69==0)" | XG!X"((i4.u6.p32==0)||(i2.u5.p23==1))")
6 unique states visited
6 strongly connected components in search stack
6 transitions explored
6 items max in DFS search stack
144 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,5.76615,159148,1,0,247330,2854,5788,490516,426,33090,595589
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA ARMCacheCoherence-PT-none-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 7 : !((F(F(X(F(G(X(X("((i4.u6.p30==0)||(u12.p73==1))")))))))))
Formula 7 simplified : !FXFGXX"((i4.u6.p30==0)||(u12.p73==1))"
5 unique states visited
5 strongly connected components in search stack
6 transitions explored
5 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,5.78569,159656,1,0,248024,2855,5936,491671,426,33118,597484
an accepting run exists (use option '-e' to print it)
Formula 7 is FALSE accepting run found.
FORMULA ARMCacheCoherence-PT-none-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 8 : !(((!(X("((i6.u10.p60==0)||(i4.u2.p6==1))")))&&(!(G("((i6.u11.p59==0)||(i7.u13.p78==1))")))))
Formula 8 simplified : !(!X"((i6.u10.p60==0)||(i4.u2.p6==1))" & !G"((i6.u11.p59==0)||(i7.u13.p78==1))")
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
89 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,6.68111,182624,1,0,290370,2858,5990,574172,428,33877,688918
an accepting run exists (use option '-e' to print it)
Formula 8 is FALSE accepting run found.
FORMULA ARMCacheCoherence-PT-none-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeAblingForPredicate(NecessaryEnablingsolver.java:757)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:512)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:831)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:73)
at java.base/java.lang.Thread.run(Thread.java:834)
[2020-05-11 11:49:53] [INFO ] Built C files in 9330ms conformant to PINS in folder :/home/mcc/execution
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1589197794540

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -timeout 3600 -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss128m -Xms40m -Xmx16000m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ARMCacheCoherence-PT-none"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itstools"
echo " Input is ARMCacheCoherence-PT-none, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r006-smll-158897515400005"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ARMCacheCoherence-PT-none.tgz
mv ARMCacheCoherence-PT-none execution
cd execution
if [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "UpperBounds" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] || [ "LTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLCardinality" = "ReachabilityDeadlock" ] || [ "LTLCardinality" = "QuasiLiveness" ] || [ "LTLCardinality" = "StableMarking" ] || [ "LTLCardinality" = "Liveness" ] || [ "LTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;