fond
Model Checking Contest 2020
10th edition, Paris, France, June 23, 2020
Execution of r006-smll-158897515400003
Last Updated
Jun 28, 2020

About the Execution of ITS-Tools for ARMCacheCoherence-PT-none

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15741.000 51228.00 65281.00 457.90 TFTTFFFFFFFFTFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2020-input.r006-smll-158897515400003.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2020-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool itstools
Input is ARMCacheCoherence-PT-none, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r006-smll-158897515400003
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 14M
-rw-r--r-- 1 mcc users 3.4K Mar 25 09:43 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K Mar 25 09:43 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Mar 25 09:36 CTLFireability.txt
-rw-r--r-- 1 mcc users 20K Mar 25 09:36 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 24 05:37 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K Mar 24 05:37 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K Apr 8 14:40 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 28 14:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Apr 8 14:41 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Apr 28 14:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Mar 25 09:02 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K Mar 25 09:02 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Mar 25 08:56 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K Mar 25 08:56 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Mar 25 09:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Mar 25 09:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 24 05:37 instance
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 iscolored
-rw-r--r-- 1 mcc users 14M Mar 24 05:37 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-00
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-01
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-02
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-03
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-04
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-05
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-06
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-07
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-08
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-09
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-10
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-11
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-12
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-13
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-14
FORMULA_NAME ARMCacheCoherence-PT-none-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1589197709737

[2020-05-11 11:48:32] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2020-05-11 11:48:32] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2020-05-11 11:48:34] [INFO ] Load time of PNML (sax parser for PT used): 1450 ms
[2020-05-11 11:48:34] [INFO ] Transformed 87 places.
[2020-05-11 11:48:34] [INFO ] Transformed 33676 transitions.
[2020-05-11 11:48:34] [INFO ] Found NUPN structural information;
[2020-05-11 11:48:34] [INFO ] Parsed PT model containing 87 places and 33676 transitions in 1788 ms.
Ensure Unique test removed 32425 transitions
Reduce redundant transitions removed 32425 transitions.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 303 ms.
Finished random walk after 6467 steps, including 4 resets, run visited all 21 properties in 153 ms. (steps per millisecond=42 )
[2020-05-11 11:48:35] [INFO ] Initial state reduction rules for CTL removed 7 formulas.
[2020-05-11 11:48:35] [INFO ] Flatten gal took : 329 ms
[2020-05-11 11:48:35] [INFO ] Initial state reduction rules for CTL removed 7 formulas.
[2020-05-11 11:48:35] [INFO ] Flatten gal took : 203 ms
FORMULA ARMCacheCoherence-PT-none-CTLCardinality-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-CTLCardinality-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-CTLCardinality-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-CTLCardinality-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-CTLCardinality-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-CTLCardinality-02 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-CTLCardinality-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2020-05-11 11:48:36] [INFO ] Applying decomposition
[2020-05-11 11:48:36] [INFO ] Flatten gal took : 152 ms
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202005100927/bin/convert-linux64, -i, /tmp/graph13427752698566999028.txt, -o, /tmp/graph13427752698566999028.bin, -w, /tmp/graph13427752698566999028.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202005100927/bin/louvain-linux64, /tmp/graph13427752698566999028.bin, -l, -1, -v, -w, /tmp/graph13427752698566999028.weights, -q, 0, -e, 0.001], workingDir=null]
[2020-05-11 11:48:36] [INFO ] Decomposing Gal with order
[2020-05-11 11:48:36] [INFO ] Rewriting arrays to variables to allow decomposition.
[2020-05-11 11:48:37] [INFO ] Removed a total of 4394 redundant transitions.
[2020-05-11 11:48:37] [INFO ] Flatten gal took : 374 ms
[2020-05-11 11:48:37] [INFO ] Fuse similar labels procedure discarded/fused a total of 93 labels/synchronizations in 91 ms.
[2020-05-11 11:48:37] [INFO ] Time to serialize gal into /home/mcc/execution/CTLCardinality.pnml.gal : 25 ms
[2020-05-11 11:48:37] [INFO ] Time to serialize properties into /home/mcc/execution/CTLCardinality.ctl : 2 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/CTLCardinality.pnml.gal, -t, CGAL, -ctl, /home/mcc/execution/CTLCardinality.ctl], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/CTLCardinality.pnml.gal -t CGAL -ctl /home/mcc/execution/CTLCardinality.ctl
No direction supplied, using forward translation only.
Parsed 9 CTL formulae.
built 42 ordering constraints for composite.
built 15 ordering constraints for composite.
built 29 ordering constraints for composite.
built 24 ordering constraints for composite.
built 24 ordering constraints for composite.
built 33 ordering constraints for composite.
built 25 ordering constraints for composite.
built 12 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,3.20568e+08,1.79559,47484,304,177,69758,7806,1135,188633,112,61401,0


Converting to forward existential form...Done !
original formula: EF(!(AF(((i3.u11.p41==0)||(u15.p86==1)))))
=> equivalent forward existential formula: [FwdG(FwdU(Init,TRUE),!(((i3.u11.p41==0)||(u15.p86==1))))] != FALSE
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Fast SCC detection found an SCC at level 1
Fast SCC detection found an SCC at level 2
Fast SCC detection found an SCC at level 3
Fast SCC detection found an SCC at level 4
Fast SCC detection found an SCC at level 5
Fast SCC detection found an SCC at level 6
(forward)formula 0,1,2.15173,47484,1,0,69758,7806,5435,188633,442,61401,34843
FORMULA ARMCacheCoherence-PT-none-CTLCardinality-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is TRUE !

***************************************

original formula: E(((i2.u10.p63==0)||(u12.p73==1)) U AG(((i1.u7.p10==0)||(i2.u9.p52==1))))
=> equivalent forward existential formula: [(FwdU(Init,((i2.u10.p63==0)||(u12.p73==1))) * !(E(TRUE U !(((i1.u7.p10==0)||(i2.u9.p52==1))))))] != FALSE
Reverse transition relation is NOT exact ! Due to transitions u15.t4, i0.u13.t20, i1.u7.t83, i1.u7.t85, i2.u9.t57, i2.u9.t59, i3.u11.t31, i3.u11.t33, i5.i0.u5.t109, i5.i0.u5.t111, i5.i1.u14.t13, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/566/11/577
(forward)formula 1,1,3.92835,68192,1,0,99372,13551,7566,280702,606,79614,271677
FORMULA ARMCacheCoherence-PT-none-CTLCardinality-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is TRUE !

***************************************

original formula: AX(FALSE)
=> equivalent forward existential formula: [(EY(Init) * !(FALSE))] = FALSE
(forward)formula 2,0,3.92855,68192,1,0,99372,13551,7566,280709,606,79614,271679
FORMULA ARMCacheCoherence-PT-none-CTLCardinality-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is FALSE !

***************************************

original formula: !(EF(((i1.u6.p33!=0)&&(i3.u8.p48!=1))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * ((i1.u6.p33!=0)&&(i3.u8.p48!=1)))] = FALSE
(forward)formula 3,0,3.93059,68720,1,0,99462,13551,7574,280834,608,79614,271882
FORMULA ARMCacheCoherence-PT-none-CTLCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is FALSE !

***************************************

original formula: AG(((i2.u9.p44==0)||(i5.i0.u4.p13==1)))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(((i2.u9.p44==0)||(i5.i0.u4.p13==1))))] = FALSE
(forward)formula 4,0,3.93412,68720,1,0,99602,13553,7582,281675,609,79656,272086
FORMULA ARMCacheCoherence-PT-none-CTLCardinality-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is FALSE !

***************************************

original formula: AG(EF((((i5.i0.u4.p16==0)||(i3.u11.p40==1))&&((i2.u10.p62==0)||(i0.u13.p76==1)))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(E(TRUE U (((i5.i0.u4.p16==0)||(i3.u11.p40==1))&&((i2.u10.p62==0)||(i0.u13.p76==1))))))] = FALSE
(forward)formula 5,0,4.0819,71888,1,0,104639,14400,7597,299832,611,84364,288836
FORMULA ARMCacheCoherence-PT-none-CTLCardinality-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is FALSE !

***************************************

original formula: AX(FALSE)
=> equivalent forward existential formula: [(EY(Init) * !(FALSE))] = FALSE
(forward)formula 6,0,4.08199,71888,1,0,104639,14400,7597,299832,611,84364,288836
FORMULA ARMCacheCoherence-PT-none-CTLCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is FALSE !

***************************************

original formula: EG(!(AG((i1.u2.p6==1))))
=> equivalent forward existential formula: [FwdG(Init,!(!(E(TRUE U !((i1.u2.p6==1))))))] != FALSE
(forward)formula 7,1,41.6333,568296,1,0,709004,28290,7611,3.1212e+06,612,251707,1008111
FORMULA ARMCacheCoherence-PT-none-CTLCardinality-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is TRUE !

***************************************

original formula: AG((EF((i1.u2.p7==1)) * EF((i3.u11.p69==1))))
=> equivalent forward existential formula: ([(FwdU(Init,TRUE) * !(E(TRUE U (i1.u2.p7==1))))] = FALSE * [(FwdU(Init,TRUE) * !(E(TRUE U (i3.u11.p69==1))))] = FALSE)
(forward)formula 8,0,42.1614,580704,1,0,729516,29099,7613,3.17963e+06,612,255543,1059597
FORMULA ARMCacheCoherence-PT-none-CTLCardinality-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is FALSE !

***************************************


BK_STOP 1589197760965

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ CTLCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution CTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination CTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -timeout 3600 -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss128m -Xms40m -Xmx16000m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ARMCacheCoherence-PT-none"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itstools"
echo " Input is ARMCacheCoherence-PT-none, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r006-smll-158897515400003"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ARMCacheCoherence-PT-none.tgz
mv ARMCacheCoherence-PT-none execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;