Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2020-input.r210-tajo-159033476400874.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2020-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-4028
Executing tool itstools
Input is ShieldRVs-PT-040A, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r210-tajo-159033476400874
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 420K
-rw-r--r-- 1 mcc users 3.4K May 14 02:23 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K May 14 02:23 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K May 13 19:50 CTLFireability.txt
-rw-r--r-- 1 mcc users 13K May 13 19:50 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K May 14 10:04 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K May 14 10:04 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K May 14 10:04 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K May 14 10:04 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 12 20:42 NewModel
-rw-r--r-- 1 mcc users 3.3K May 13 14:26 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 13 14:26 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.7K May 13 09:13 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K May 13 09:13 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K May 13 16:53 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K May 13 16:53 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 12 20:42 equiv_col
-rw-r--r-- 1 mcc users 5 May 12 20:42 instance
-rw-r--r-- 1 mcc users 6 May 12 20:42 iscolored
-rw-r--r-- 1 mcc users 256K May 12 20:42 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ShieldRVs-PT-040A-00
FORMULA_NAME ShieldRVs-PT-040A-01
FORMULA_NAME ShieldRVs-PT-040A-02
FORMULA_NAME ShieldRVs-PT-040A-03
FORMULA_NAME ShieldRVs-PT-040A-04
FORMULA_NAME ShieldRVs-PT-040A-05
FORMULA_NAME ShieldRVs-PT-040A-06
FORMULA_NAME ShieldRVs-PT-040A-07
FORMULA_NAME ShieldRVs-PT-040A-08
FORMULA_NAME ShieldRVs-PT-040A-09
FORMULA_NAME ShieldRVs-PT-040A-10
FORMULA_NAME ShieldRVs-PT-040A-11
FORMULA_NAME ShieldRVs-PT-040A-12
FORMULA_NAME ShieldRVs-PT-040A-13
FORMULA_NAME ShieldRVs-PT-040A-14
FORMULA_NAME ShieldRVs-PT-040A-15

=== Now, execution of the tool begins

BK_START 1590624860711

[2020-05-28 00:14:22] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2020-05-28 00:14:22] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2020-05-28 00:14:22] [INFO ] Load time of PNML (sax parser for PT used): 166 ms
[2020-05-28 00:14:22] [INFO ] Transformed 563 places.
[2020-05-28 00:14:22] [INFO ] Transformed 763 transitions.
[2020-05-28 00:14:22] [INFO ] Found NUPN structural information;
[2020-05-28 00:14:22] [INFO ] Parsed PT model containing 563 places and 763 transitions in 212 ms.
Parsed 16 properties from file /home/mcc/execution/LTLFireability.xml in 27 ms.
Working with output stream class java.io.PrintStream
Incomplete random walk after 100000 steps, including 186 resets, run finished after 544 ms. (steps per millisecond=183 ) properties seen :[1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
// Phase 1: matrix 763 rows 563 cols
[2020-05-28 00:14:23] [INFO ] Computed 161 place invariants in 16 ms
[2020-05-28 00:14:23] [INFO ] [Real]Absence check using 161 positive place invariants in 93 ms returned sat
[2020-05-28 00:14:23] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-05-28 00:14:24] [INFO ] [Real]Absence check using state equation in 787 ms returned sat
[2020-05-28 00:14:24] [INFO ] Deduced a trap composed of 8 places in 206 ms
[2020-05-28 00:14:24] [INFO ] Deduced a trap composed of 15 places in 68 ms
[2020-05-28 00:14:25] [INFO ] Trap strengthening (SAT) tested/added 3/2 trap constraints in 419 ms
[2020-05-28 00:14:25] [INFO ] Solution in real domain found non-integer solution.
[2020-05-28 00:14:25] [INFO ] [Nat]Absence check using 161 positive place invariants in 210 ms returned sat
[2020-05-28 00:14:25] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2020-05-28 00:14:26] [INFO ] [Nat]Absence check using state equation in 984 ms returned sat
[2020-05-28 00:14:26] [INFO ] Deduced a trap composed of 8 places in 108 ms
[2020-05-28 00:14:26] [INFO ] Deduced a trap composed of 15 places in 240 ms
[2020-05-28 00:14:26] [INFO ] Trap strengthening (SAT) tested/added 3/2 trap constraints in 468 ms
[2020-05-28 00:14:26] [INFO ] Computed and/alt/rep : 762/5829/762 causal constraints in 47 ms.
[2020-05-28 00:14:45] [INFO ] Added : 600 causal constraints over 120 iterations in 18199 ms. Result :(error "Failed to check-sat")
[2020-05-28 00:14:45] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2020-05-28 00:14:45] [INFO ] Flatten gal took : 186 ms
FORMULA ShieldRVs-PT-040A-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2020-05-28 00:14:45] [INFO ] Flatten gal took : 84 ms
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
[2020-05-28 00:14:45] [INFO ] Applying decomposition
[2020-05-28 00:14:46] [INFO ] Flatten gal took : 118 ms
[2020-05-28 00:14:46] [INFO ] Input system was already deterministic with 763 transitions.
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202005100927/bin/convert-linux64, -i, /tmp/graph1959221228594994505.txt, -o, /tmp/graph1959221228594994505.bin, -w, /tmp/graph1959221228594994505.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202005100927/bin/louvain-linux64, /tmp/graph1959221228594994505.bin, -l, -1, -v, -w, /tmp/graph1959221228594994505.weights, -q, 0, -e, 0.001], workingDir=null]
[2020-05-28 00:14:46] [INFO ] Decomposing Gal with order
[2020-05-28 00:14:46] [INFO ] Rewriting arrays to variables to allow decomposition.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 763 rows 563 cols
[2020-05-28 00:14:46] [INFO ] Computed 161 place invariants in 6 ms
inv : p0 + p35 + p36 = 1
inv : p0 + p479 + p480 + p481 + p482 = 1
inv : p0 + p153 + p154 + p155 + p156 = 1
inv : p0 + p261 + p262 + p263 + p264 = 1
inv : p0 + p507 + p508 + p509 + p510 = 1
inv : p0 + p497 + p498 = 1
inv : p0 + p289 + p290 + p291 + p292 = 1
inv : p0 + p45 + p46 + p47 + p48 = 1
inv : p0 + p125 + p126 + p127 + p128 = 1
inv : p0 + p559 + p560 + p561 + p562 = 1
inv : p0 + p535 + p536 + p537 + p538 = 1
inv : p0 + p175 + p176 = 1
inv : p0 + p69 + p70 + p71 + p72 = 1
inv : p0 + p345 + p346 + p347 + p348 = 1
inv : p0 + p245 + p246 = 1
inv : p0 + p451 + p452 + p453 + p454 = 1
inv : p0 + p105 + p106 = 1
inv : p0 + p17 + p18 + p19 + p20 = 1
inv : p0 + p237 + p238 + p239 + p240 = 1
inv : p0 + p177 + p178 + p179 + p180 = 1
inv : p0 + p367 + p368 + p369 + p370 = 1
inv : p0 + p503 + p504 + p505 + p506 = 1
inv : p0 + p401 + p402 + p403 + p404 = 1
inv : p0 + p385 + p386 = 1
inv : p0 + p287 + p288 = 1
inv : p0 + p265 + p266 + p267 + p268 = 1
inv : p0 + p315 + p316 = 1
inv : p0 + p429 + p430 + p431 + p432 = 1
inv : p0 + p373 + p374 + p375 + p376 = 1
inv : p0 + p293 + p294 + p295 + p296 = 1
inv : p0 + p395 + p396 + p397 + p398 = 1
inv : p0 + p525 + p526 = 1
inv : p0 + p129 + p130 + p131 + p132 = 1
inv : p0 + p455 + p456 = 1
inv : p0 + p205 + p206 + p207 + p208 = 1
inv : p0 + p423 + p424 + p425 + p426 = 1
inv : p0 + p427 + p428 = 1
inv : p0 + p77 + p78 = 1
inv : p0 + p65 + p66 + p67 + p68 = 1
inv : p0 + p7 + p8 = 1
inv : p0 + p531 + p532 + p533 + p534 = 1
inv : p0 + p357 + p358 = 1
inv : p0 + p233 + p234 + p235 + p236 = 1
inv : p0 + p147 + p148 = 1
inv : p0 + p97 + p98 + p99 + p100 = 1
inv : p0 + p157 + p158 + p159 + p160 = 1
inv : p0 + p217 + p218 = 1
inv : p0 + p469 + p470 = 1
inv : p0 + p241 + p242 + p243 + p244 = 1
inv : p0 + p203 + p204 = 1
inv : p0 + p37 + p38 + p39 + p40 = 1
inv : p0 + p513 + p514 + p515 + p516 = 1
inv : p0 + p133 + p134 = 1
inv : p0 + p227 + p228 + p229 + p230 = 1
inv : p0 + p539 + p540 = 1
inv : p0 + p273 + p274 = 1
inv : p0 + p349 + p350 + p351 + p352 = 1
inv : p0 + p335 + p336 + p337 + p338 = 1
inv : p0 + p255 + p256 + p257 + p258 = 1
inv : p0 + p457 + p458 + p459 + p460 = 1
inv : p0 + p343 + p344 = 1
inv : p0 + p259 + p260 = 1
inv : p0 + p297 + p298 + p299 + p300 = 1
inv : p0 + p413 + p414 = 1
inv : p0 + p419 + p420 + p421 + p422 = 1
inv : p0 + p185 + p186 + p187 + p188 = 1
inv : p0 + p107 + p108 + p109 + p110 = 1
inv : p0 + p399 + p400 = 1
inv : p0 + p443 + p444 + p445 + p446 = 1
inv : p0 + p329 + p330 = 1
inv : p0 + p489 + p490 + p491 + p492 = 1
inv : p0 + p527 + p528 + p529 + p530 = 1
inv : p0 + p405 + p406 + p407 + p408 = 1
inv : p0 + p115 + p116 + p117 + p118 = 1
inv : p0 + p13 + p14 + p15 + p16 = 1
inv : p0 + p553 + p554 = 1
inv : p0 + p101 + p102 + p103 + p104 = 1
inv : p0 + p381 + p382 + p383 + p384 = 1
inv : p0 + p387 + p388 + p389 + p390 = 1
inv : p0 + p483 + p484 = 1
inv : p0 + p121 + p122 + p123 + p124 = 1
inv : p0 + p475 + p476 + p477 + p478 = 1
inv : p0 + p209 + p210 + p211 + p212 = 1
inv : p0 + p171 + p172 + p173 + p174 = 1
inv : p0 + p311 + p312 + p313 + p314 = 1
inv : p0 + p63 + p64 = 1
inv : p0 + p545 + p546 + p547 + p548 = 1
inv : p0 + p279 + p280 + p281 + p282 = 1
inv : p0 + p317 + p318 + p319 + p320 = 1
inv : p0 + p51 + p52 + p53 + p54 = 1
inv : p0 + p275 + p276 + p277 + p278 = 1
inv : p0 + p493 + p494 + p495 + p496 = 1
inv : p0 + p139 + p140 + p141 + p142 = 1
inv : p0 + p371 + p372 = 1
inv : p0 + p111 + p112 + p113 + p114 = 1
inv : p0 + p301 + p302 = 1
inv : p0 + p465 + p466 + p467 + p468 = 1
inv : p0 + p231 + p232 = 1
inv : p0 + p437 + p438 + p439 + p440 = 1
inv : p0 + p3 + p4 + p5 + p6 = 1
inv : p0 + p83 + p84 + p85 + p86 = 1
inv : p0 + p521 + p522 + p523 + p524 = 1
inv : p0 + p161 + p162 = 1
inv : p0 + p247 + p248 + p249 + p250 = 1
inv : p0 + p167 + p168 + p169 + p170 = 1
inv : p0 + p549 + p550 + p551 + p552 = 1
inv : p0 + p191 + p192 + p193 + p194 = 1
inv : p0 + p31 + p32 + p33 + p34 = 1
inv : p0 + p223 + p224 + p225 + p226 = 1
inv : p0 + p359 + p360 + p361 + p362 = 1
inv : p0 + p55 + p56 + p57 + p58 = 1
inv : p0 + p119 + p120 = 1
inv : p0 + p353 + p354 + p355 + p356 = 1
inv : p0 + p27 + p28 + p29 + p30 = 1
inv : p0 + p189 + p190 = 1
inv : p0 + p1 + p2 = 1
inv : p0 + p49 + p50 = 1
inv : p0 + p163 + p164 + p165 + p166 = 1
inv : p0 + p87 + p88 + p89 + p90 = 1
inv : p0 + p195 + p196 + p197 + p198 = 1
inv : p0 + p331 + p332 + p333 + p334 = 1
inv : p0 + p433 + p434 + p435 + p436 = 1
inv : p0 + p59 + p60 + p61 + p62 = 1
inv : p0 + p471 + p472 + p473 + p474 = 1
inv : p0 + p461 + p462 + p463 + p464 = 1
inv : p0 + p303 + p304 + p305 + p306 = 1
inv : p0 + p135 + p136 + p137 + p138 = 1
inv : p0 + p363 + p364 + p365 + p366 = 1
inv : p0 + p325 + p326 + p327 + p328 = 1
inv : p0 + p377 + p378 + p379 + p380 = 1
inv : p0 + p23 + p24 + p25 + p26 = 1
inv : p0 + p391 + p392 + p393 + p394 = 1
inv : p0 + p499 + p500 + p501 + p502 = 1
inv : p0 + p541 + p542 + p543 + p544 = 1
inv : p0 + p269 + p270 + p271 + p272 = 1
inv : p0 + p213 + p214 + p215 + p216 = 1
inv : p0 + p555 + p556 + p557 + p558 = 1
inv : p0 + p93 + p94 + p95 + p96 = 1
inv : p0 + p321 + p322 + p323 + p324 = 1
inv : p0 + p79 + p80 + p81 + p82 = 1
inv : p0 + p307 + p308 + p309 + p310 = 1
inv : p0 + p199 + p200 + p201 + p202 = 1
inv : p0 + p283 + p284 + p285 + p286 = 1
inv : p0 + p9 + p10 + p11 + p12 = 1
inv : p0 + p149 + p150 + p151 + p152 = 1
inv : p0 + p251 + p252 + p253 + p254 = 1
inv : p0 + p41 + p42 + p43 + p44 = 1
inv : p0 + p339 + p340 + p341 + p342 = 1
inv : p0 + p21 + p22 = 1
inv : p0 + p415 + p416 + p417 + p418 = 1
inv : p0 + p517 + p518 + p519 + p520 = 1
inv : p0 + p91 + p92 = 1
inv : p0 + p511 + p512 = 1
inv : p0 + p219 + p220 + p221 + p222 = 1
inv : p0 + p181 + p182 + p183 + p184 = 1
inv : p0 + p73 + p74 + p75 + p76 = 1
inv : p0 + p143 + p144 + p145 + p146 = 1
inv : p0 + p441 + p442 = 1
inv : p0 + p409 + p410 + p411 + p412 = 1
inv : p0 + p447 + p448 + p449 + p450 = 1
inv : p0 + p485 + p486 + p487 + p488 = 1
Total of 161 invariants.
[2020-05-28 00:14:46] [INFO ] Computed 161 place invariants in 8 ms
[2020-05-28 00:14:46] [INFO ] Removed a total of 837 redundant transitions.
[2020-05-28 00:14:46] [INFO ] Flatten gal took : 222 ms
[2020-05-28 00:14:46] [INFO ] Fuse similar labels procedure discarded/fused a total of 896 labels/synchronizations in 54 ms.
[2020-05-28 00:14:46] [INFO ] Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 12 ms
[2020-05-28 00:14:46] [INFO ] Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 15 LTL properties
Checking formula 0 : !((G(!(F((X((F("(((i9.i0.u93.p328==1)&&(i9.i0.u94.p329==1))&&(i9.i0.u95.p334==1))"))||("(((i3.i1.u43.p150==1)&&(i3.i1.u44.p154==1))&&(i4.i0.u47.p163==1))")))&&(!(X("(i4.i1.u49.p173!=1)"))))))))
Formula 0 simplified : !G!F(X("(((i3.i1.u43.p150==1)&&(i3.i1.u44.p154==1))&&(i4.i0.u47.p163==1))" | F"(((i9.i0.u93.p328==1)&&(i9.i0.u94.p329==1))&&(i9.i0.u95.p334==1))") & !X"(i4.i1.u49.p173!=1)")
built 16 ordering constraints for composite.
built 18 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 20 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 20 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 15 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 15 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 15 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 20 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 15 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 15 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 19 ordering constraints for composite.
built 20 ordering constraints for composite.
built 12 ordering constraints for composite.
built 20 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 19 ordering constraints for composite.
built 12 ordering constraints for composite.
built 20 ordering constraints for composite.
built 15 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 15 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 20 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 12 ordering constraints for composite.
built 10 ordering constraints for composite.
[2020-05-28 00:14:48] [INFO ] Proved 563 variables to be positive in 2104 ms
[2020-05-28 00:14:48] [INFO ] Computing symmetric may disable matrix : 763 transitions.
[2020-05-28 00:14:48] [INFO ] Computation of disable matrix completed :0/763 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2020-05-28 00:14:48] [INFO ] Computation of Complete disable matrix. took 89 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2020-05-28 00:14:48] [INFO ] Computing symmetric may enable matrix : 763 transitions.
[2020-05-28 00:14:48] [INFO ] Computation of Complete enable matrix. took 81 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2020-05-28 00:14:55] [INFO ] Computing symmetric co enabling matrix : 763 transitions.
[2020-05-28 00:14:55] [INFO ] Computation of co-enabling matrix(0/763) took 36 ms. Total solver calls (SAT/UNSAT): 14(2/12)
[2020-05-28 00:14:58] [INFO ] Computation of co-enabling matrix(69/763) took 3042 ms. Total solver calls (SAT/UNSAT): 873(140/733)
[2020-05-28 00:15:01] [INFO ] Computation of co-enabling matrix(126/763) took 6059 ms. Total solver calls (SAT/UNSAT): 1583(254/1329)
[2020-05-28 00:15:04] [INFO ] Computation of co-enabling matrix(195/763) took 9069 ms. Total solver calls (SAT/UNSAT): 2448(392/2056)
[2020-05-28 00:15:07] [INFO ] Computation of co-enabling matrix(240/763) took 12270 ms. Total solver calls (SAT/UNSAT): 3510(480/3030)
[2020-05-28 00:15:11] [INFO ] Computation of co-enabling matrix(301/763) took 15285 ms. Total solver calls (SAT/UNSAT): 4836(600/4236)
[2020-05-28 00:15:14] [INFO ] Computation of co-enabling matrix(390/763) took 18324 ms. Total solver calls (SAT/UNSAT): 6840(778/6062)
[2020-05-28 00:15:17] [INFO ] Computation of co-enabling matrix(485/763) took 21597 ms. Total solver calls (SAT/UNSAT): 7939(884/7055)
[2020-05-28 00:15:20] [INFO ] Computation of co-enabling matrix(503/763) took 24681 ms. Total solver calls (SAT/UNSAT): 8128(902/7226)
[2020-05-28 00:15:23] [INFO ] Computation of co-enabling matrix(515/763) took 28012 ms. Total solver calls (SAT/UNSAT): 8254(914/7340)
[2020-05-28 00:15:26] [INFO ] Computation of co-enabling matrix(529/763) took 31066 ms. Total solver calls (SAT/UNSAT): 8401(928/7473)
[2020-05-28 00:15:29] [INFO ] Computation of co-enabling matrix(574/763) took 34079 ms. Total solver calls (SAT/UNSAT): 8773(960/7813)
[2020-05-28 00:15:32] [INFO ] Computation of co-enabling matrix(670/763) took 37105 ms. Total solver calls (SAT/UNSAT): 8965(960/8005)
[2020-05-28 00:15:35] [INFO ] Computation of Finished co-enabling matrix. took 39973 ms. Total solver calls (SAT/UNSAT): 9146(960/8186)
[2020-05-28 00:15:35] [INFO ] Computing Do-Not-Accords matrix : 763 transitions.
[2020-05-28 00:15:35] [INFO ] Computation of Completed DNA matrix. took 113 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2020-05-28 00:15:35] [INFO ] Built C files in 50082ms conformant to PINS in folder :/home/mcc/execution
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 10581 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 109 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](!( <>(( X(( <>((LTLAP0==true))) || ( (LTLAP1==true)) ) ) && ( !( X((LTLAP2==true))) ))) ), --buchi-type=spotba], workingDir=/home/mcc/execution]
/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc: error while loading shared libraries: libltdl.so.7: cannot open shared object file: No such file or directory
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](!( <>(( X(( <>((LTLAP0==true))) || ( (LTLAP1==true)) ) ) && ( !( X((LTLAP2==true))) ))) ), --buchi-type=spotba], workingDir=/home/mcc/execution]
127
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](!( <>(( X(( <>((LTLAP0==true))) || ( (LTLAP1==true)) ) ) && ( !( X((LTLAP2==true))) ))) ), --buchi-type=spotba], workingDir=/home/mcc/execution]
127
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:170)
at fr.lip6.move.gal.application.LTSminRunner.access$10(LTSminRunner.java:124)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:93)
at java.base/java.lang.Thread.run(Thread.java:834)
Detected timeout of ITS tools.
[2020-05-28 00:34:55] [INFO ] Applying decomposition
[2020-05-28 00:34:56] [INFO ] Flatten gal took : 1042 ms
[2020-05-28 00:34:56] [INFO ] Decomposing Gal with order
[2020-05-28 00:34:57] [INFO ] Rewriting arrays to variables to allow decomposition.
[2020-05-28 00:34:57] [INFO ] Removed a total of 837 redundant transitions.
[2020-05-28 00:34:58] [INFO ] Flatten gal took : 784 ms
[2020-05-28 00:34:58] [INFO ] Fuse similar labels procedure discarded/fused a total of 480 labels/synchronizations in 104 ms.
[2020-05-28 00:34:58] [INFO ] Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 47 ms
[2020-05-28 00:34:58] [INFO ] Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 11 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 15 LTL properties
Checking formula 0 : !((G(!(F((X((F("(((u94.p328==1)&&(u95.p329==1))&&(u96.p334==1))"))||("(((u44.p150==1)&&(u45.p154==1))&&(u48.p163==1))")))&&(!(X("(u50.p173!=1)"))))))))
Formula 0 simplified : !G!F(X("(((u44.p150==1)&&(u45.p154==1))&&(u48.p163==1))" | F"(((u94.p328==1)&&(u95.p329==1))&&(u96.p334==1))") & !X"(u50.p173!=1)")
built 162 ordering constraints for composite.
Reverse transition relation is NOT exact ! Due to transitions t243, t249, t252, t256, t261, t264, t268, t271, t276, t279, t283, t288, t291, t296, t301, t302, t306, t312, t315, t319, t324, t326, t331, t334, t338, t343, t348, t350, t354, t359, t365, t367, t373, t376, t378, t385, t389, t393, t397, t402, t405, t409, t411, t417, t419, t426, t427, t434, t435, t439, t445, t450, t454, t456, t459, t465, t470, t474, t478, t480, t484, t489, t493, t495, t502, t506, t509, t513, t517, t521, t524, t530, t534, t537, t540, t545, t549, t553, t556, t560, t564, t570, t573, t579, t583, t591, t594, t600, t603, t611, t615, t619, t623, t630, t634, t640, t644, t651, t655, t658, t664, t670, t673, t681, t685, t688, t696, t700, t703, t709, t713, t719, t726, t728, t734, t738, t745, t748, t755, t759, u2.t0, u2.t1, u4.t2, u4.t3, u5.t4, u5.t5, u6.t6, u6.t7, u8.t8, u8.t9, u9.t10, u9.t11, u10.t12, u10.t13, u12.t14, u12.t15, u13.t16, u13.t17, u14.t18, u14.t19, u16.t20, u16.t21, u17.t22, u17.t23, u18.t24, u18.t25, u20.t26, u20.t27, u21.t28, u21.t29, u22.t30, u22.t31, u24.t32, u24.t33, u25.t34, u25.t35, u26.t36, u26.t37, u28.t38, u28.t39, u29.t40, u29.t41, u30.t42, u30.t43, u32.t44, u32.t45, u33.t46, u33.t47, u34.t48, u34.t49, u36.t50, u36.t51, u37.t52, u37.t53, u38.t54, u38.t55, u40.t56, u40.t57, u41.t58, u41.t59, u42.t60, u42.t61, u44.t62, u44.t63, u45.t64, u45.t65, u46.t66, u46.t67, u48.t68, u48.t69, u49.t70, u49.t71, u50.t72, u50.t73, u52.t74, u52.t75, u53.t76, u53.t77, u54.t78, u54.t79, u56.t80, u56.t81, u57.t82, u57.t83, u58.t84, u58.t85, u60.t86, u60.t87, u61.t88, u61.t89, u62.t90, u62.t91, u64.t92, u64.t93, u65.t94, u65.t95, u66.t96, u66.t97, u68.t98, u68.t99, u69.t100, u69.t101, u70.t102, u70.t103, u72.t104, u72.t105, u73.t106, u73.t107, u74.t108, u74.t109, u76.t110, u76.t111, u77.t112, u77.t113, u78.t114, u78.t115, u80.t116, u80.t117, u81.t118, u81.t119, u82.t120, u82.t121, u84.t122, u84.t123, u85.t124, u85.t125, u86.t126, u86.t127, u88.t128, u88.t129, u89.t130, u89.t131, u90.t132, u90.t133, u92.t134, u92.t135, u93.t136, u93.t137, u94.t138, u94.t139, u96.t140, u96.t141, u97.t142, u97.t143, u98.t144, u98.t145, u100.t146, u100.t147, u101.t148, u101.t149, u102.t150, u102.t151, u104.t152, u104.t153, u105.t154, u105.t155, u106.t156, u106.t157, u108.t158, u108.t159, u109.t160, u109.t161, u110.t162, u110.t163, u112.t164, u112.t165, u113.t166, u113.t167, u114.t168, u114.t169, u116.t170, u116.t171, u117.t172, u117.t173, u118.t174, u118.t175, u120.t176, u120.t177, u121.t178, u121.t179, u122.t180, u122.t181, u124.t182, u124.t183, u125.t184, u125.t185, u126.t186, u126.t187, u128.t188, u128.t189, u129.t190, u129.t191, u130.t192, u130.t193, u132.t194, u132.t195, u133.t196, u133.t197, u134.t198, u134.t199, u136.t200, u136.t201, u137.t202, u137.t203, u138.t204, u138.t205, u140.t206, u140.t207, u141.t208, u141.t209, u142.t210, u142.t211, u144.t212, u144.t213, u145.t214, u145.t215, u146.t216, u146.t217, u148.t218, u148.t219, u149.t220, u149.t221, u150.t222, u150.t223, u152.t224, u152.t225, u153.t226, u153.t227, u154.t228, u154.t229, u156.t230, u156.t231, u157.t232, u157.t233, u158.t234, u158.t235, u158.t241, u160.t236, u160.t237, u161.t238, u161.t239, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/42/361/403
Computing Next relation with stutter on 3.79058e+30 deadlock states
Detected timeout of ITS tools.
[2020-05-28 00:55:07] [INFO ] Flatten gal took : 496 ms
[2020-05-28 00:55:08] [INFO ] Input system was already deterministic with 763 transitions.
[2020-05-28 00:55:08] [INFO ] Transformed 563 places.
[2020-05-28 00:55:08] [INFO ] Transformed 763 transitions.
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
[2020-05-28 00:55:08] [INFO ] Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 9 ms
[2020-05-28 00:55:08] [INFO ] Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 3 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock, --load-order, /home/mcc/execution/model.ord, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock --load-order /home/mcc/execution/model.ord --gen-order FOLLOW
Read 15 LTL properties
Successfully loaded order from file /home/mcc/execution/model.ord
Checking formula 0 : !((G(!(F((X((F("(((p328==1)&&(p329==1))&&(p334==1))"))||("(((p150==1)&&(p154==1))&&(p163==1))")))&&(!(X("(p173!=1)"))))))))
Formula 0 simplified : !G!F(X("(((p150==1)&&(p154==1))&&(p163==1))" | F"(((p328==1)&&(p329==1))&&(p334==1))") & !X"(p173!=1)")
Reverse transition relation is NOT exact ! Due to transitions t0, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10, t11, t12, t13, t14, t15, t16, t17, t18, t19, t20, t21, t22, t23, t24, t25, t26, t27, t28, t29, t30, t31, t32, t33, t34, t35, t36, t37, t38, t39, t40, t41, t42, t43, t44, t45, t46, t47, t48, t49, t50, t51, t52, t53, t54, t55, t56, t57, t58, t59, t60, t61, t62, t63, t64, t65, t66, t67, t68, t69, t70, t71, t72, t73, t74, t75, t76, t77, t78, t79, t80, t81, t82, t83, t84, t85, t86, t87, t88, t89, t90, t91, t92, t93, t94, t95, t96, t97, t98, t99, t100, t101, t102, t103, t104, t105, t106, t107, t108, t109, t110, t111, t112, t113, t114, t115, t116, t117, t118, t119, t120, t121, t122, t123, t124, t125, t126, t127, t128, t129, t130, t131, t132, t133, t134, t135, t136, t137, t138, t139, t140, t141, t142, t143, t144, t145, t146, t147, t148, t149, t150, t151, t152, t153, t154, t155, t156, t157, t158, t159, t160, t161, t162, t163, t164, t165, t166, t167, t168, t169, t170, t171, t172, t173, t174, t175, t176, t177, t178, t179, t180, t181, t182, t183, t184, t185, t186, t187, t188, t189, t190, t191, t192, t193, t194, t195, t196, t197, t198, t199, t200, t201, t202, t203, t204, t205, t206, t207, t208, t209, t210, t211, t212, t213, t214, t215, t216, t217, t218, t219, t220, t221, t222, t223, t224, t225, t226, t227, t228, t229, t230, t231, t232, t233, t234, t235, t236, t237, t238, t239, t241, t242, t243, t245, t246, t248, t249, t250, t252, t253, t254, t256, t257, t258, t260, t261, t262, t264, t265, t266, t268, t269, t270, t272, t273, t274, t276, t277, t278, t280, t281, t282, t284, t285, t286, t288, t289, t290, t292, t293, t294, t296, t297, t298, t300, t301, t302, t304, t305, t306, t308, t309, t310, t312, t313, t314, t316, t317, t318, t320, t321, t322, t324, t325, t326, t328, t329, t330, t332, t333, t334, t336, t337, t338, t340, t341, t342, t344, t345, t346, t348, t349, t350, t352, t353, t354, t356, t357, t358, t360, t361, t362, t364, t365, t366, t368, t369, t370, t372, t373, t374, t376, t377, t378, t380, t381, t382, t384, t385, t386, t388, t389, t390, t392, t393, t394, t396, t397, t399, t401, t402, t403, t404, t406, t407, t408, t410, t411, t412, t414, t415, t416, t418, t419, t420, t422, t423, t424, t426, t427, t428, t430, t431, t432, t434, t435, t436, t438, t439, t440, t442, t443, t444, t446, t447, t448, t450, t451, t452, t454, t455, t456, t458, t459, t460, t462, t463, t464, t466, t467, t468, t470, t471, t472, t474, t475, t476, t478, t479, t480, t482, t483, t484, t486, t487, t488, t490, t491, t492, t494, t495, t496, t498, t499, t500, t502, t503, t504, t506, t507, t508, t510, t511, t512, t514, t515, t516, t518, t519, t520, t522, t523, t524, t526, t527, t528, t530, t531, t532, t534, t535, t536, t538, t539, t540, t542, t543, t544, t546, t547, t548, t550, t551, t552, t554, t555, t556, t558, t559, t560, t562, t563, t564, t566, t568, t569, t571, t573, t574, t576, t578, t579, t581, t583, t584, t586, t588, t589, t591, t593, t594, t596, t598, t599, t601, t603, t604, t606, t608, t609, t611, t613, t614, t616, t618, t619, t621, t623, t624, t626, t628, t629, t631, t633, t634, t636, t638, t639, t641, t643, t644, t646, t648, t649, t651, t653, t654, t656, t658, t659, t661, t663, t664, t666, t668, t669, t671, t673, t674, t676, t678, t679, t681, t683, t684, t686, t688, t689, t691, t693, t694, t696, t698, t699, t701, t703, t704, t706, t708, t709, t711, t713, t714, t716, t718, t719, t721, t723, t724, t726, t728, t729, t731, t733, t734, t736, t738, t739, t741, t743, t744, t746, t748, t749, t751, t753, t754, t756, t758, t759, t761, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/162/601/763
Computing Next relation with stutter on 3.79058e+30 deadlock states

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -timeout 3600 -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss128m -Xms40m -Xmx16000m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ShieldRVs-PT-040A"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itstools"
echo " Input is ShieldRVs-PT-040A, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r210-tajo-159033476400874"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ShieldRVs-PT-040A.tgz
mv ShieldRVs-PT-040A execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;