About the Execution of smart for SatelliteMemory-PT-X00100Y0003
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15766.020 | 460594.00 | 460108.00 | 0.00 | FTT????????????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2020-input.r207-tajo-159033468800004.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2020-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-4028
Executing tool smart
Input is SatelliteMemory-PT-X00100Y0003, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 1
Run identifier is r207-tajo-159033468800004
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 172K
-rw-r--r-- 1 mcc users 3.3K May 14 00:27 CTLCardinality.txt
-rw-r--r-- 1 mcc users 18K May 14 00:27 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K May 13 17:38 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K May 13 17:38 CTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K May 14 10:00 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K May 14 10:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K May 14 10:00 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 14 10:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 May 12 20:42 NewModel
-rw-r--r-- 1 mcc users 3.5K May 13 13:07 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 13 13:07 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.5K May 13 07:36 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 13K May 13 07:36 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 13 16:53 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 13 16:53 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 12 20:42 equiv_col
-rw-r--r-- 1 mcc users 12 May 12 20:42 instance
-rw-r--r-- 1 mcc users 6 May 12 20:42 iscolored
-rwxr-xr-x 1 mcc users 5.5K May 12 20:42 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-00
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-01
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-02
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-03
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-04
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-05
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-06
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-07
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-08
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-09
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-10
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-11
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-12
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-13
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-14
FORMULA_NAME SatelliteMemory-PT-X00100Y0003-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1590435510080
======================================================
========== this is Smart for the MCC'2018 ============
======================================================
Running SatelliteMemory (PT), instance X00100Y0003
Examination CTLFireability
Parser /home/mcc/BenchKit/bin/parser/CTLFire.jar
Model checker /home/mcc/BenchKit/bin/rem_exec/smart
GOT IT HERE. BS
Petri model created: 13 places, 10 transitions, 40 arcs.
AT ITER 0 NEW BEST:: SOT 80 SOS 43 HAS SOPS 39 HAS SOUS 41 HAS SOUPS 37 WITH SCORE 37.043
AT ITER 8 NEW BEST:: SOT 79 SOS 42 HAS SOPS 38 HAS SOUS 40 HAS SOUPS 36 WITH SCORE 36.042
AT ITER 25 NEW BEST:: SOT 79 SOS 41 HAS SOPS 38 HAS SOUS 39 HAS SOUPS 36 WITH SCORE 36.041
AT ITER 63 NEW BEST:: SOT 78 SOS 39 HAS SOPS 37 HAS SOUS 37 HAS SOUPS 35 WITH SCORE 35.039
AT ITER 169 NEW BEST:: SOT 78 SOS 39 HAS SOPS 36 HAS SOUS 37 HAS SOUPS 34 WITH SCORE 34.039
Bounds file is: CTLFireability.xml
PROPERTY: SatelliteMemory-PT-X00100Y0003-CTLFireability-00 (AG( ( ( (! (! ((potential((tk(P2)>=1) & (tk(P10)>=1)))))) & (! (! ((potential((tk(P5)>=94) & (tk(P8)>=6)))))) ) | (! (EG( ((potential((tk(P5)>=94) & (tk(P7)>=94))))))) )))
PROPERTY: SatelliteMemory-PT-X00100Y0003-CTLFireability-01 (EF( (EU( ((potential((tk(P7)>=100)))) , ( ((potential((tk(P5)>=94) & (tk(P7)>=94)))) & ((potential((tk(P5)>=94) & (tk(P7)>=94)))) ) ))))
PROPERTY: SatelliteMemory-PT-X00100Y0003-CTLFireability-02 (! (! (EF( (AX( ((potential((tk(P9)>=1))))))))))
PROPERTY: SatelliteMemory-PT-X00100Y0003-CTLFireability-03 ( (! (AU( (! ((potential((tk(P13)>=100))))) , ((potential((tk(P9)>=1)))) ))) | (AU( (AF( ((potential((tk(P5)>=94) & (tk(P7)>=94)))))) , (! ( ((potential((tk(P5)>=94) & (tk(P7)>=94)))) | ((potential((tk(P4)>=1)))) )) )) )
PROPERTY: SatelliteMemory-PT-X00100Y0003-CTLFireability-04 ( ((potential((tk(P5)>=94) & (tk(P7)>=94)))) | (EU( ( ((potential((tk(P4)>=1)))) | ((potential((tk(P4)>=1)))) ) , ( ( ((potential((tk(P5)>=1) & (tk(P11)>=1)))) & ((potential((tk(P7)>=100)))) ) & ((potential((tk(P9)>=1)))) ) )) )
PROPERTY: SatelliteMemory-PT-X00100Y0003-CTLFireability-05 (! (! ( (! (AF( ((potential((tk(P1)>=1) & (tk(P6)>=1) & (tk(P8)>=1) & (tk(P10)>=1))))))) | (AG( (! ((potential((tk(P5)>=94) & (tk(P7)>=94))))))) )))
PROPERTY: SatelliteMemory-PT-X00100Y0003-CTLFireability-06 (! (EG( (! (EF( ((potential((tk(P5)>=94) & (tk(P7)>=94))))))))))
PROPERTY: SatelliteMemory-PT-X00100Y0003-CTLFireability-07 ( (EF( (AF( (! ((potential((tk(P3)>=1) & (tk(P5)>=1) & (tk(P9)>=1) & (tk(P12)>=1))))))))) & ( ((potential((tk(P1)>=1) & (tk(P6)>=1) & (tk(P8)>=1) & (tk(P10)>=1)))) & (EF( (EG( ((potential((tk(P7)>=100)))))))) ) )
PROPERTY: SatelliteMemory-PT-X00100Y0003-CTLFireability-08 (EG( (AG( (EF( ((potential((tk(P4)>=1))))))))))
PROPERTY: SatelliteMemory-PT-X00100Y0003-CTLFireability-09 (EF( (AX( ( (! ((potential((tk(P1)>=1) & (tk(P6)>=1) & (tk(P8)>=1) & (tk(P10)>=1))))) | ((potential((tk(P5)>=94) & (tk(P7)>=94)))) )))))
PROPERTY: SatelliteMemory-PT-X00100Y0003-CTLFireability-10 (EF( ( (EX( (! ((potential((tk(P5)>=94) & (tk(P7)>=94))))))) & (AG( ( ((potential((tk(P5)>=94) & (tk(P8)>=6)))) | ((potential((tk(P13)>=100)))) ))) )))
PROPERTY: SatelliteMemory-PT-X00100Y0003-CTLFireability-11 (! ( (AG( (EX( ((potential((tk(P1)>=1) & (tk(P6)>=1) & (tk(P8)>=1) & (tk(P10)>=1)))))))) | (! (! ( ( ((potential((tk(P9)>=1)))) | ((potential((tk(P2)>=1) & (tk(P10)>=1)))) ) | ( ((potential((tk(P5)>=1) & (tk(P11)>=1)))) | ((potential((tk(P13)>=100)))) ) ))) ))
PROPERTY: SatelliteMemory-PT-X00100Y0003-CTLFireability-12 (EF( ( ((potential((tk(P5)>=94) & (tk(P7)>=94)))) | ( (AF( ((potential((tk(P9)>=1)))))) & (! (! ((potential((tk(P5)>=94) & (tk(P8)>=6)))))) ) )))
PROPERTY: SatelliteMemory-PT-X00100Y0003-CTLFireability-13 (AU( (! (EX( ((potential((tk(P1)>=1) & (tk(P6)>=1) & (tk(P8)>=1) & (tk(P10)>=1))))))) , ( (EG( ((potential((tk(P3)>=1) & (tk(P5)>=1) & (tk(P9)>=1) & (tk(P12)>=1)))))) | (EF( ((potential((tk(P5)>=94) & (tk(P7)>=94)))))) ) ))
PROPERTY: SatelliteMemory-PT-X00100Y0003-CTLFireability-14 (! ( (EU( (! ((potential((tk(P2)>=1) & (tk(P10)>=1))))) , ((potential((tk(P5)>=94) & (tk(P8)>=6)))) )) | ((potential((tk(P9)>=1)))) ))
PROPERTY: SatelliteMemory-PT-X00100Y0003-CTLFireability-15 (EU( ((potential((tk(P4)>=1)))) , ( (EX( ((potential((tk(P5)>=1) & (tk(P11)>=1)))))) & ( (! ((potential((tk(P5)>=94) & (tk(P8)>=6))))) & ( ((potential((tk(P5)>=1) & (tk(P11)>=1)))) & ((potential((tk(P2)>=1) & (tk(P10)>=1)))) ) ) ) ))
FORMULA SatelliteMemory-PT-X00100Y0003-CTLFireability-00 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SatelliteMemory-PT-X00100Y0003-CTLFireability-01 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA SatelliteMemory-PT-X00100Y0003-CTLFireability-02 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
BK_STOP 1590435970674
--------------------
content from stderr:
terminate called after throwing an instance of 'MEDDLY::error'
/home/mcc/BenchKit/bin/smart.sh: line 117: 349 Aborted ${SMART} ${INPUT_SM}
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SatelliteMemory-PT-X00100Y0003"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="smart"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool smart"
echo " Input is SatelliteMemory-PT-X00100Y0003, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 1"
echo " Run identifier is r207-tajo-159033468800004"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SatelliteMemory-PT-X00100Y0003.tgz
mv SatelliteMemory-PT-X00100Y0003 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;