About the Execution of ITS-Tools for SmallOperatingSystem-PT-MT2048DC1024
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15743.050 | 3600000.00 | 3629195.00 | 775.10 | ?FFF???????????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/local/x2003239/mcc2020-input.r193-csrt-159033388300114.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2020-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool itstools
Input is SmallOperatingSystem-PT-MT2048DC1024, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r193-csrt-159033388300114
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 208K
-rw-r--r-- 1 mcc users 3.7K Apr 12 17:46 CTLCardinality.txt
-rw-r--r-- 1 mcc users 17K Apr 12 17:46 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.1K Apr 11 20:04 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 11 20:04 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 24 05:38 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Mar 24 05:38 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Apr 14 12:52 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 28 14:02 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Apr 14 12:52 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 28 14:02 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.4K Apr 10 20:34 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K Apr 10 20:34 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.7K Apr 10 05:25 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 20K Apr 10 05:25 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Apr 10 22:29 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Apr 10 22:29 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 24 05:38 equiv_col
-rw-r--r-- 1 mcc users 13 Mar 24 05:38 instance
-rw-r--r-- 1 mcc users 6 Mar 24 05:38 iscolored
-rw-r--r-- 1 mcc users 8.1K Mar 24 05:38 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC1024-00
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC1024-01
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC1024-02
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC1024-03
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC1024-04
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC1024-05
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC1024-06
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC1024-07
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC1024-08
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC1024-09
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC1024-10
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC1024-11
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC1024-12
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC1024-13
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC1024-14
FORMULA_NAME SmallOperatingSystem-PT-MT2048DC1024-15
=== Now, execution of the tool begins
BK_START 1590473658327
[2020-05-26 06:14:20] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2020-05-26 06:14:20] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2020-05-26 06:14:20] [INFO ] Load time of PNML (sax parser for PT used): 27 ms
[2020-05-26 06:14:20] [INFO ] Transformed 9 places.
[2020-05-26 06:14:20] [INFO ] Transformed 8 transitions.
[2020-05-26 06:14:20] [INFO ] Parsed PT model containing 9 places and 8 transitions in 82 ms.
Parsed 16 properties from file /home/mcc/execution/LTLFireability.xml in 22 ms.
Working with output stream class java.io.PrintStream
Incomplete random walk after 101473 steps, including 0 resets, run finished after 61 ms. (steps per millisecond=1663 ) properties seen :[1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1]
// Phase 1: matrix 8 rows 9 cols
[2020-05-26 06:14:20] [INFO ] Computed 4 place invariants in 2 ms
[2020-05-26 06:14:20] [INFO ] [Real]Absence check using 4 positive place invariants in 14 ms returned unsat
Successfully simplified 1 atomic propositions for a total of 1 simplifications.
[2020-05-26 06:14:21] [INFO ] Initial state reduction rules for CTL removed 3 formulas.
[2020-05-26 06:14:21] [INFO ] Flatten gal took : 22 ms
FORMULA SmallOperatingSystem-PT-MT2048DC1024-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT2048DC1024-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA SmallOperatingSystem-PT-MT2048DC1024-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2020-05-26 06:14:21] [INFO ] Flatten gal took : 3 ms
Using solver Z3 to compute partial order matrices.
[2020-05-26 06:14:21] [INFO ] Applying decomposition
Built C files in :
/home/mcc/execution
[2020-05-26 06:14:21] [INFO ] Flatten gal took : 14 ms
[2020-05-26 06:14:21] [INFO ] Input system was already deterministic with 8 transitions.
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202005100927/bin/convert-linux64, -i, /tmp/graph10017938076681015864.txt, -o, /tmp/graph10017938076681015864.bin, -w, /tmp/graph10017938076681015864.weights], workingDir=null]
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 8 rows 9 cols
[2020-05-26 06:14:21] [INFO ] Computed 4 place invariants in 0 ms
inv : DiskControllerUnit + TransferToDisk + LoadingMem = 1024
inv : CPUUnit + ExecutingTask = 2048
inv : FreeMemSegment + TransferToDisk + TaskReady + TaskSuspended + ExecutingTask + LoadingMem = 2048
inv : TaskOnDisk + TransferToDisk + LoadingMem = 2048
Total of 4 invariants.
[2020-05-26 06:14:21] [INFO ] Computed 4 place invariants in 1 ms
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202005100927/bin/louvain-linux64, /tmp/graph10017938076681015864.bin, -l, -1, -v, -w, /tmp/graph10017938076681015864.weights, -q, 0, -e, 0.001], workingDir=null]
[2020-05-26 06:14:21] [INFO ] Decomposing Gal with order
[2020-05-26 06:14:21] [INFO ] Rewriting arrays to variables to allow decomposition.
[2020-05-26 06:14:21] [INFO ] Removed a total of 1 redundant transitions.
[2020-05-26 06:14:21] [INFO ] Flatten gal took : 51 ms
[2020-05-26 06:14:21] [INFO ] Fuse similar labels procedure discarded/fused a total of 0 labels/synchronizations in 0 ms.
[2020-05-26 06:14:21] [INFO ] Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 1 ms
[2020-05-26 06:14:21] [INFO ] Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]
[2020-05-26 06:14:21] [INFO ] Proved 9 variables to be positive in 134 ms
[2020-05-26 06:14:21] [INFO ] Computing symmetric may disable matrix : 8 transitions.
[2020-05-26 06:14:21] [INFO ] Computation of disable matrix completed :0/8 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2020-05-26 06:14:21] [INFO ] Computation of Complete disable matrix. took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
[2020-05-26 06:14:21] [INFO ] Computing symmetric may enable matrix : 8 transitions.
[2020-05-26 06:14:21] [INFO ] Computation of Complete enable matrix. took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 13 LTL properties
Checking formula 0 : !((X(("(i0.u0.LoadingMem>=1)")U(F(!((F(X("(i0.u1.TransferToDisk>=1)")))U("((((u2.TaskReady>=1)&&(u3.CPUUnit>=1))&&(u2.TaskReady>=1))&&(u3.CPUUnit>=1))")))))))
Formula 0 simplified : !X("(i0.u0.LoadingMem>=1)" U F!(FX"(i0.u1.TransferToDisk>=1)" U "((((u2.TaskReady>=1)&&(u3.CPUUnit>=1))&&(u2.TaskReady>=1))&&(u3.CPUUnit>=1))"))
built 3 ordering constraints for composite.
built 8 ordering constraints for composite.
[2020-05-26 06:14:22] [INFO ] Computing symmetric co enabling matrix : 8 transitions.
[2020-05-26 06:14:22] [INFO ] Computation of Finished co-enabling matrix. took 151 ms. Total solver calls (SAT/UNSAT): 28(28/0)
[2020-05-26 06:14:22] [INFO ] Computing Do-Not-Accords matrix : 8 transitions.
[2020-05-26 06:14:22] [INFO ] Computation of Completed DNA matrix. took 66 ms. Total solver calls (SAT/UNSAT): 13(0/13)
[2020-05-26 06:14:22] [INFO ] Built C files in 1058ms conformant to PINS in folder :/home/mcc/execution
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 385 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 57 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(((LTLAP0==true))U(<>(!( (<>(X((LTLAP1==true))))U((LTLAP2==true))) ))), --buchi-type=spotba], workingDir=/home/mcc/execution]
/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc: error while loading shared libraries: libltdl.so.7: cannot open shared object file: No such file or directory
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(((LTLAP0==true))U(<>(!( (<>(X((LTLAP1==true))))U((LTLAP2==true))) ))), --buchi-type=spotba], workingDir=/home/mcc/execution]
127
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(((LTLAP0==true))U(<>(!( (<>(X((LTLAP1==true))))U((LTLAP2==true))) ))), --buchi-type=spotba], workingDir=/home/mcc/execution]
127
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:170)
at fr.lip6.move.gal.application.LTSminRunner.access$10(LTSminRunner.java:124)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:93)
at java.base/java.lang.Thread.run(Thread.java:834)
Detected timeout of ITS tools.
[2020-05-26 06:34:21] [INFO ] Flatten gal took : 12 ms
[2020-05-26 06:34:21] [INFO ] Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 1 ms
[2020-05-26 06:34:21] [INFO ] Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock, --gen-order, FOLLOW], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock --gen-order FOLLOW
Read 13 LTL properties
Checking formula 0 : !((X(("(LoadingMem>=1)")U(F(!((F(X("(TransferToDisk>=1)")))U("((((TaskReady>=1)&&(CPUUnit>=1))&&(TaskReady>=1))&&(CPUUnit>=1))")))))))
Formula 0 simplified : !X("(LoadingMem>=1)" U F!(FX"(TransferToDisk>=1)" U "((((TaskReady>=1)&&(CPUUnit>=1))&&(TaskReady>=1))&&(CPUUnit>=1))"))
Detected timeout of ITS tools.
[2020-05-26 06:54:21] [INFO ] Flatten gal took : 5 ms
[2020-05-26 06:54:21] [INFO ] Input system was already deterministic with 8 transitions.
[2020-05-26 06:54:21] [INFO ] Transformed 9 places.
[2020-05-26 06:54:21] [INFO ] Transformed 8 transitions.
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
[2020-05-26 06:54:21] [INFO ] Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 1 ms
[2020-05-26 06:54:21] [INFO ] Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock, --load-order, /home/mcc/execution/model.ord, --gen-order, FOLLOW], workingDir=/home/mcc/execution]
its-ltl command run as :
/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock --load-order /home/mcc/execution/model.ord --gen-order FOLLOW
Read 13 LTL properties
Successfully loaded order from file /home/mcc/execution/model.ord
Checking formula 0 : !((X(("(LoadingMem>=1)")U(F(!((F(X("(TransferToDisk>=1)")))U("((((TaskReady>=1)&&(CPUUnit>=1))&&(TaskReady>=1))&&(CPUUnit>=1))")))))))
Formula 0 simplified : !X("(LoadingMem>=1)" U F!(FX"(TransferToDisk>=1)" U "((((TaskReady>=1)&&(CPUUnit>=1))&&(TaskReady>=1))&&(CPUUnit>=1))"))
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -timeout 3600 -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss128m -Xms40m -Xmx16000m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SmallOperatingSystem-PT-MT2048DC1024"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itstools"
echo " Input is SmallOperatingSystem-PT-MT2048DC1024, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r193-csrt-159033388300114"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SmallOperatingSystem-PT-MT2048DC1024.tgz
mv SmallOperatingSystem-PT-MT2048DC1024 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;