About the Execution of smart for ResAllocation-PT-R005C002
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15766.550 | 3600000.00 | 3600000.00 | 0.00 | TFTTTFFF???????? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/local/x2003239/mcc2020-input.r190-csrt-159033383100700.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2020-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool smart
Input is ResAllocation-PT-R005C002, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 1
Run identifier is r190-csrt-159033383100700
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 212K
-rw-r--r-- 1 mcc users 3.8K May 14 00:25 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K May 14 00:25 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K May 13 17:35 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K May 13 17:35 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K May 12 20:53 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K May 12 20:53 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K May 14 10:00 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K May 14 10:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K May 14 10:00 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K May 14 10:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K May 13 13:05 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K May 13 13:05 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.3K May 13 07:34 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 21K May 13 07:34 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K May 13 16:53 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K May 13 16:53 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 May 12 20:53 equiv_col
-rw-r--r-- 1 mcc users 9 May 12 20:53 instance
-rw-r--r-- 1 mcc users 6 May 12 20:53 iscolored
-rw-r--r-- 1 mcc users 22K May 12 20:53 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R005C002-CTLFireability-00
FORMULA_NAME ResAllocation-PT-R005C002-CTLFireability-01
FORMULA_NAME ResAllocation-PT-R005C002-CTLFireability-02
FORMULA_NAME ResAllocation-PT-R005C002-CTLFireability-03
FORMULA_NAME ResAllocation-PT-R005C002-CTLFireability-04
FORMULA_NAME ResAllocation-PT-R005C002-CTLFireability-05
FORMULA_NAME ResAllocation-PT-R005C002-CTLFireability-06
FORMULA_NAME ResAllocation-PT-R005C002-CTLFireability-07
FORMULA_NAME ResAllocation-PT-R005C002-CTLFireability-08
FORMULA_NAME ResAllocation-PT-R005C002-CTLFireability-09
FORMULA_NAME ResAllocation-PT-R005C002-CTLFireability-10
FORMULA_NAME ResAllocation-PT-R005C002-CTLFireability-11
FORMULA_NAME ResAllocation-PT-R005C002-CTLFireability-12
FORMULA_NAME ResAllocation-PT-R005C002-CTLFireability-13
FORMULA_NAME ResAllocation-PT-R005C002-CTLFireability-14
FORMULA_NAME ResAllocation-PT-R005C002-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1590409787528
======================================================
========== this is Smart for the MCC'2018 ============
======================================================
Running ResAllocation (PT), instance R005C002
Examination CTLFireability
Parser /home/mcc/BenchKit/bin/parser/CTLFire.jar
Model checker /home/mcc/BenchKit/bin/rem_exec/smart
GOT IT HERE. BS
Petri model created: 20 places, 12 transitions, 50 arcs.
AT ITER 0 NEW BEST:: SOT 163 SOS 85 HAS SOPS 85 HAS SOUS 83 HAS SOUPS 83 WITH SCORE 83.085
AT ITER 1 NEW BEST:: SOT 163 SOS 81 HAS SOPS 81 HAS SOUS 81 HAS SOUPS 81 WITH SCORE 81.081
AT ITER 4 NEW BEST:: SOT 160 SOS 80 HAS SOPS 80 HAS SOUS 80 HAS SOUPS 80 WITH SCORE 80.08
AT ITER 17 NEW BEST:: SOT 160 SOS 79 HAS SOPS 79 HAS SOUS 79 HAS SOUPS 79 WITH SCORE 79.079
AT ITER 21 NEW BEST:: SOT 160 SOS 76 HAS SOPS 76 HAS SOUS 76 HAS SOUPS 76 WITH SCORE 76.076
AT ITER 39 NEW BEST:: SOT 159 SOS 75 HAS SOPS 75 HAS SOUS 75 HAS SOUPS 75 WITH SCORE 75.075
AT ITER 55 NEW BEST:: SOT 158 SOS 70 HAS SOPS 70 HAS SOUS 70 HAS SOUPS 70 WITH SCORE 70.07
AT ITER 126 NEW BEST:: SOT 155 SOS 66 HAS SOPS 66 HAS SOUS 66 HAS SOUPS 66 WITH SCORE 66.066
AT ITER 159 NEW BEST:: SOT 154 SOS 65 HAS SOPS 65 HAS SOUS 65 HAS SOUPS 65 WITH SCORE 65.065
AT ITER 210 NEW BEST:: SOT 153 SOS 63 HAS SOPS 63 HAS SOUS 63 HAS SOUPS 63 WITH SCORE 63.063
AT ITER 256 NEW BEST:: SOT 153 SOS 62 HAS SOPS 62 HAS SOUS 62 HAS SOUPS 62 WITH SCORE 62.062
Bounds file is: CTLFireability.xml
PROPERTY: ResAllocation-PT-R005C002-CTLFireability-00 (EG( (! (EX( ( ((potential((tk(P11)>=1)))) | ((potential((tk(P5)>=1) & (tk(P8)>=1)))) ))))))
PROPERTY: ResAllocation-PT-R005C002-CTLFireability-01 (EG( (AX( (AF( ((potential((tk(P10)>=1) & (tk(P20)>=1))))))))))
PROPERTY: ResAllocation-PT-R005C002-CTLFireability-02 ((potential((tk(P10)>=1) & (tk(P20)>=1))))
PROPERTY: ResAllocation-PT-R005C002-CTLFireability-03 (EU( (! (EG( ((potential((tk(P1)>=1) & (tk(P4)>=1))))))) , (AF( ( ((potential((tk(P7)>=1) & (tk(P10)>=1)))) & ((potential((tk(P3)>=1) & (tk(P6)>=1)))) ))) ))
PROPERTY: ResAllocation-PT-R005C002-CTLFireability-04 ( ((potential((tk(P2)>=1)))) & ( ((potential((tk(P1)>=1) & (tk(P4)>=1)))) | (! (EU( ((potential((tk(P4)>=1) & (tk(P14)>=1) & (tk(P15)>=1)))) , ((potential((tk(P5)>=1) & (tk(P8)>=1)))) ))) ) )
PROPERTY: ResAllocation-PT-R005C002-CTLFireability-05 (AX( ((potential((tk(P7)>=1) & (tk(P10)>=1))))))
PROPERTY: ResAllocation-PT-R005C002-CTLFireability-06 ((potential((tk(P1)>=1) & (tk(P4)>=1))))
PROPERTY: ResAllocation-PT-R005C002-CTLFireability-07 (! (AX( ( (EX( ((potential((tk(P10)>=1) & (tk(P20)>=1)))))) | (EG( ((potential((tk(P1)>=1) & (tk(P4)>=1)))))) ))))
PROPERTY: ResAllocation-PT-R005C002-CTLFireability-08 ( ( ( ((potential((tk(P1)>=1) & (tk(P4)>=1)))) | (EU( ((potential((tk(P9)>=1)))) , ((potential((tk(P7)>=1) & (tk(P10)>=1)))) )) ) & ( (AF( ((potential((tk(P7)>=1) & (tk(P10)>=1)))))) | ( (! ( ((potential((tk(P10)>=1) & (tk(P20)>=1)))) | ((potential((tk(P9)>=1)))) )) | (EX( ((potential((tk(P3)>=1) & (tk(P6)>=1)))))) ) ) ) & ( (EU( ( ((potential((tk(P7)>=1) & (tk(P10)>=1)))) | ((potential((tk(P4)>=1) & (tk(P14)>=1) & (tk(P15)>=1)))) ) , ( ((potential((tk(P2)>=1)))) | ((potential((tk(P9)>=1)))) ) )) | ( (AF( ( ((potential((tk(P5)>=1) & (tk(P8)>=1)))) & ((potential((tk(P7)>=1) & (tk(P10)>=1)))) ))) | (! ( (! ((potential((tk(P7)>=1) & (tk(P10)>=1))))) | ( ((potential((tk(P4)>=1) & (tk(P14)>=1) & (tk(P15)>=1)))) & ((potential((tk(P1)>=1) & (tk(P4)>=1)))) ) )) ) ) )
PROPERTY: ResAllocation-PT-R005C002-CTLFireability-09 ( ( ((potential((tk(P4)>=1) & (tk(P14)>=1) & (tk(P15)>=1)))) & (AU( ((potential((tk(P2)>=1) & (tk(P12)>=1) & (tk(P13)>=1)))) , ((potential((tk(P10)>=1) & (tk(P20)>=1)))) )) ) & ( (EF( (EF( ((potential((tk(P11)>=1)))))))) & (AU( ( ((potential((tk(P4)>=1) & (tk(P14)>=1) & (tk(P15)>=1)))) & ((potential((tk(P7)>=1) & (tk(P10)>=1)))) ) , ((potential((tk(P2)>=1)))) )) ) )
PROPERTY: ResAllocation-PT-R005C002-CTLFireability-10 ( (! (AU( ((potential((tk(P10)>=1) & (tk(P20)>=1)))) , ( ((potential((tk(P5)>=1) & (tk(P8)>=1)))) | ((potential((tk(P9)>=1)))) ) ))) | ( (EX( ( ((potential((tk(P2)>=1)))) | ( ((potential((tk(P1)>=1) & (tk(P4)>=1)))) & ((potential((tk(P1)>=1) & (tk(P4)>=1)))) ) ))) & (! (! ( (! ((potential((tk(P2)>=1) & (tk(P12)>=1) & (tk(P13)>=1))))) | ( ((potential((tk(P6)>=1) & (tk(P16)>=1) & (tk(P17)>=1)))) | ((potential((tk(P10)>=1) & (tk(P20)>=1)))) ) ))) ) )
PROPERTY: ResAllocation-PT-R005C002-CTLFireability-11 ( (EG( ((potential((tk(P9)>=1)))))) | ( ( (! (EF( ((potential((tk(P8)>=1) & (tk(P18)>=1) & (tk(P19)>=1))))))) | ( ( (! ((potential((tk(P7)>=1) & (tk(P10)>=1))))) & ( ((potential((tk(P11)>=1)))) | ((potential((tk(P9)>=1)))) ) ) | ( ( ((potential((tk(P9)>=1)))) | ((potential((tk(P2)>=1)))) ) & (! ((potential((tk(P3)>=1) & (tk(P6)>=1))))) ) ) ) | (EG( (! (! ((potential((tk(P7)>=1) & (tk(P10)>=1)))))))) ) )
PROPERTY: ResAllocation-PT-R005C002-CTLFireability-12 ( (AG( ((potential((tk(P1)>=1) & (tk(P4)>=1)))))) | (! ( (AF( ( ((potential((tk(P10)>=1) & (tk(P20)>=1)))) & ((potential((tk(P3)>=1) & (tk(P6)>=1)))) ))) & ((potential((tk(P11)>=1)))) )) )
PROPERTY: ResAllocation-PT-R005C002-CTLFireability-13 ((potential((tk(P11)>=1))))
PROPERTY: ResAllocation-PT-R005C002-CTLFireability-14 (! ( (! ( (EF( ((potential((tk(P7)>=1) & (tk(P10)>=1)))))) & (AX( ((potential((tk(P2)>=1)))))) )) & ((potential((tk(P1)>=1) & (tk(P4)>=1)))) ))
PROPERTY: ResAllocation-PT-R005C002-CTLFireability-15 (AG( ( ((potential((tk(P7)>=1) & (tk(P10)>=1)))) | ((potential((tk(P8)>=1) & (tk(P18)>=1) & (tk(P19)>=1)))) )))
FORMULA ResAllocation-PT-R005C002-CTLFireability-00 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA ResAllocation-PT-R005C002-CTLFireability-01 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA ResAllocation-PT-R005C002-CTLFireability-02 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA ResAllocation-PT-R005C002-CTLFireability-03 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA ResAllocation-PT-R005C002-CTLFireability-04 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA ResAllocation-PT-R005C002-CTLFireability-05 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA ResAllocation-PT-R005C002-CTLFireability-06 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA ResAllocation-PT-R005C002-CTLFireability-07 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
BK_TIME_CONFINEMENT_REACHED
--------------------
content from stderr:
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R005C002"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="smart"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool smart"
echo " Input is ResAllocation-PT-R005C002, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 1"
echo " Run identifier is r190-csrt-159033383100700"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R005C002.tgz
mv ResAllocation-PT-R005C002 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;