About the Execution of ITS-LoLa for CSRepetitions-PT-04
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15742.660 | 3600000.00 | 563304.00 | 1293.20 | F???FTT?TFT???FF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fko/mcc2020-input.r182-oct2-158987914200676.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2020-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool itslola
Input is CSRepetitions-PT-04, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r182-oct2-158987914200676
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 784K
-rw-r--r-- 1 mcc users 19K Apr 27 15:14 CTLCardinality.txt
-rw-r--r-- 1 mcc users 56K Apr 27 15:14 CTLCardinality.xml
-rw-r--r-- 1 mcc users 22K Apr 27 15:14 CTLFireability.txt
-rw-r--r-- 1 mcc users 74K Apr 27 15:14 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Apr 27 15:14 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K Apr 27 15:14 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 19K Apr 27 15:14 LTLCardinality.txt
-rw-r--r-- 1 mcc users 60K Apr 28 14:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 24K Apr 27 15:14 LTLFireability.txt
-rw-r--r-- 1 mcc users 84K Apr 28 14:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 21K Apr 27 15:14 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 60K Apr 27 15:14 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 32K Apr 27 15:14 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 107K Apr 27 15:14 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 4.6K Apr 27 15:14 UpperBounds.txt
-rw-r--r-- 1 mcc users 9.2K Apr 27 15:14 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Apr 27 15:14 equiv_col
-rw-r--r-- 1 mcc users 3 Apr 27 15:14 instance
-rw-r--r-- 1 mcc users 6 Apr 27 15:14 iscolored
-rw-r--r-- 1 mcc users 151K Apr 27 15:14 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME CSRepetitions-PT-04-CTLFireability-00
FORMULA_NAME CSRepetitions-PT-04-CTLFireability-01
FORMULA_NAME CSRepetitions-PT-04-CTLFireability-02
FORMULA_NAME CSRepetitions-PT-04-CTLFireability-03
FORMULA_NAME CSRepetitions-PT-04-CTLFireability-04
FORMULA_NAME CSRepetitions-PT-04-CTLFireability-05
FORMULA_NAME CSRepetitions-PT-04-CTLFireability-06
FORMULA_NAME CSRepetitions-PT-04-CTLFireability-07
FORMULA_NAME CSRepetitions-PT-04-CTLFireability-08
FORMULA_NAME CSRepetitions-PT-04-CTLFireability-09
FORMULA_NAME CSRepetitions-PT-04-CTLFireability-10
FORMULA_NAME CSRepetitions-PT-04-CTLFireability-11
FORMULA_NAME CSRepetitions-PT-04-CTLFireability-12
FORMULA_NAME CSRepetitions-PT-04-CTLFireability-13
FORMULA_NAME CSRepetitions-PT-04-CTLFireability-14
FORMULA_NAME CSRepetitions-PT-04-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1591171403613
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
[2020-06-03 08:03:26] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -timeout, 3600, -rebuildPNML]
[2020-06-03 08:03:26] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2020-06-03 08:03:26] [INFO ] Load time of PNML (sax parser for PT used): 62 ms
[2020-06-03 08:03:26] [INFO ] Transformed 117 places.
[2020-06-03 08:03:26] [INFO ] Transformed 176 transitions.
[2020-06-03 08:03:26] [INFO ] Parsed PT model containing 117 places and 176 transitions in 126 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 59 ms.
Finished random walk after 8427 steps, including 189 resets, run visited all 98 properties in 72 ms. (steps per millisecond=117 )
[2020-06-03 08:03:26] [INFO ] Flatten gal took : 108 ms
[2020-06-03 08:03:26] [INFO ] Flatten gal took : 20 ms
[2020-06-03 08:03:26] [INFO ] Export to MCC properties in file /home/mcc/execution/CTLFireability.sr.xml took 11 ms.
[2020-06-03 08:03:26] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml took 20 ms.
info: Time: 3600 - MCC
vrfy: Checking CTLFireability @ CSRepetitions-PT-04 @ 3570 seconds
FORMULA CSRepetitions-PT-04-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-PT-04-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-PT-04-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-PT-04-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-PT-04-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-PT-04-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-PT-04-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-PT-04-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA CSRepetitions-PT-04-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
vrfy: finished
info: timeLeft: 0
rslt: Output for CTLFireability @ CSRepetitions-PT-04
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lola: LoLA will run for 3570 seconds at most (--timelimit)
lola: NET
lola: input: PNML file (--pnml)
lola: reading net from model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file model.pnml
lola: 293/268435456 symbol table entries, 0 collisions
lola: preprocessing...
lola: Size of bit vector: 3744
lola: finding significant places
lola: 117 places, 176 transitions, 97 significant places
lola: compute conflict clusters
lola: computed conflict clusters
lola: Computing conflicting sets
lola: Computing back conflicting sets
lola: TASK
lola: Reading formula in XML format (--xmlformula)
lola: reading pnml
lola: reading formula from CTLFireability.xml
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<= 0) OR (p112 <= 0)) AND ((p6 <= 0) OR (p11 <= 0)) AND ((p48 <= 0) OR (p86 <= 0)) AND ((p18 <= 0) OR (p89 <= 0)) AND ((p22 <= 0) OR (p54 <= 0)) AND ((p30 <= 0) OR (p95 <= 0)) AND ((p34 <= 0) OR (p84 <= 0)) AND ((p48 <= 0) OR (p73 <= 0)) AND ((p85 <= 0) OR (p108 <= 0)) AND ((p42 <= 0) OR (p56 <= 0)) AND ((p28 <= 0) OR (p79 <= 0)) AND ((p45 <= 0) OR (p47 <= 0)) AND ((p5 <= 0) OR (p76 <= 0)) AND ((p10 <= 0) OR (p34 <= 0)) AND ((p28 <= 0) OR (p87 <= 0)) AND ((p16 <= 0) OR (p82 <= 0)) AND ((p40 <= 0) OR (p54 <= 0)) AND ((p48 <= 0) OR (p51 <= 0)) AND ((p27 <= 0) OR (p45 <= 0)) AND ((p82 <= 0) OR (p111 <= 0)) AND ((p95 <= 0) OR (p110 <= 0)) AND ((p4 <= 0) OR (p13 <= 0)) AND ((p45 <= 0) OR (p96 <= 0)) AND ((p54 <= 0) OR (p90 <= 0)) AND ((p11 <= 0) OR (p36 <= 0)) AND ((p20 <= 0) OR (p28 <= 0)) AND ((p12 <= 0) OR (p82 <= 0)) AND ((p28 <= 0) OR (p103 <= 0)) AND ((p102 <= 0) OR (p108 <= 0)) AND ((p13 <= 0) OR (p93 <= 0)) AND ((p72 <= 0) OR (p95 <= 0)) AND ((p5 <= 0) OR (p44 <= 0)) AND ((p18 <= 0) OR (p43 <= 0)) AND ((p50 <= 0) OR (p59 <= 0)) AND ((p11 <= 0) OR (p66 <= 0)) AND ((p55 <= 0) OR (p105 <= 0)) AND ((p7 <= 0) OR (p63 <= 0)) AND ((p13 <= 0) OR (p38 <= 0)) AND ((p82 <= 0) OR (p83 <= 0)) AND ((p34 <= 0) OR (p104 <= 0))) OR (((p95 <= 0) OR (p115 <= 0)) AND ((p34 <= 0) OR (p115 <= 0)) AND ((p5 <= 0) OR (p115 <= 0)) AND ((p54 <= 0) OR (p115 <= 0)) AND ((p11 <= 0) OR (p115 <= 0)) AND ((p28 <= 0) OR (p115 <= 0)) AND ((p13 <= 0) OR (p115 <= 0)) AND ((p45 <= 0) OR (p115 <= 0)) AND ((p18 <= 0) OR (p115 <= 0)) AND ((p50 <= 0) OR (p115 <= 0)) AND ((p55 <= 0) OR (p115 <= 0)) AND ((p108 <= 0) OR (p115 <= 0)) AND ((p48 <= 0) OR (p115 <= 0)) AND ((p42 <= 0) OR (p115 <= 0)) AND ((p63 <= 0) OR (p115 <= 0)) AND ((p82 <= 0) OR (p115 <= 0)))))))) : A (G (E ((((1 <= p64) OR (1 <= p99) OR (1 <= p98) OR (1 <= p3) OR (1 <= p39) OR (1 <= p8) OR (1 <= p15) OR (1 <= p114) OR (1 <= p113) OR (1 <= p53) OR (1 <= p52) OR (1 <= p116) OR (1 <= p57) OR (1 <= p91) OR (1 <= p92) OR (1 <= p31)) U (((1 <= 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AND ((p25 <= 0) OR (p46 <= 0)) AND ((p25 <= 0) OR (p107 <= 0)) AND ((p0 <= 0) OR (p97 <= 0)) AND ((p14 <= 0) OR (p25 <= 0)) AND ((p9 <= 0) OR (p32 <= 0)) AND ((p2 <= 0) OR (p75 <= 0)) AND ((p25 <= 0) OR (p29 <= 0)) AND ((p9 <= 0) OR (p75 <= 0)) AND ((p2 <= 0) OR (p46 <= 0)) AND ((p9 <= 0) OR (p14 <= 0)) AND ((p25 <= 0) OR (p88 <= 0)) AND ((p21 <= 0) OR (p97 <= 0)) AND ((p25 <= 0) OR (p100 <= 0)) AND ((p2 <= 0) OR (p58 <= 0)) AND ((p80 <= 0) OR (p97 <= 0)) AND ((p29 <= 0) OR (p97 <= 0)) AND ((p2 <= 0) OR (p32 <= 0)) AND ((p58 <= 0) OR (p97 <= 0)) AND ((p25 <= 0) OR (p74 <= 0)) AND ((p0 <= 0) OR (p2 <= 0)) AND ((p88 <= 0) OR (p97 <= 0)) AND ((p32 <= 0) OR (p97 <= 0)) AND ((p2 <= 0) OR (p109 <= 0)) AND ((p2 <= 0) OR (p107 <= 0)) AND ((p25 <= 0) OR (p80 <= 0)) AND ((p2 <= 0) OR (p80 <= 0)) AND ((p97 <= 0) OR (p107 <= 0)) AND ((p97 <= 0) OR (p109 <= 0)) AND ((p9 <= 0) OR (p106 <= 0)) AND ((p2 <= 0) OR (p21 <= 0)) AND ((p2 <= 0) OR (p88 <= 0)) AND ((p2 <= 0) OR (p29 <= 0)) AND ((p9 <= 0) OR (p29 <= 0)) AND ((p14 <= 0) OR (p97 <= 0)) AND ((p9 <= 0) OR (p88 <= 0)) AND ((p2 <= 0) OR (p68 <= 0)) AND ((p25 <= 0) OR (p106 <= 0)) AND ((p9 <= 0) OR (p100 <= 0)) AND ((p2 <= 0) OR (p74 <= 0)))) OR (((p95 <= 0) OR (p115 <= 0)) AND ((p34 <= 0) OR (p115 <= 0)) AND ((p5 <= 0) OR (p115 <= 0)) AND ((p54 <= 0) OR (p115 <= 0)) AND ((p11 <= 0) OR (p115 <= 0)) AND ((p28 <= 0) OR (p115 <= 0)) AND ((p13 <= 0) OR (p115 <= 0)) AND ((p45 <= 0) OR (p115 <= 0)) AND ((p18 <= 0) OR (p115 <= 0)) AND ((p50 <= 0) OR (p115 <= 0)) AND ((p55 <= 0) OR (p115 <= 0)) AND ((p108 <= 0) OR (p115 <= 0)) AND ((p48 <= 0) OR (p115 <= 0)) AND ((p42 <= 0) OR (p115 <= 0)) AND ((p63 <= 0) OR (p115 <= 0)) AND ((p82 <= 0) OR (p115 <= 0)))))) : (A (X (A (F ((((1 <= p5) AND (1 <= p24)) OR ((1 <= p18) AND (1 <= p62)) OR ((1 <= p17) AND (1 <= p50)) OR ((1 <= p34) AND (1 <= p81)) OR ((1 <= p13) AND (1 <= p61)) OR ((1 <= p63) AND (1 <= p69)) OR ((1 <= p1) AND (1 <= p45)) OR ((1 <= p18) AND (1 <= p70)) OR ((1 <= p60) AND (1 <= p108)) OR ((1 <= p63) AND (1 <= p67)) OR ((1 <= p41) AND (1 <= p108)) OR ((1 <= p5) AND (1 <= p77)) OR ((1 <= p35) AND (1 <= p42)) OR ((1 <= p26) AND (1 <= p48)) OR ((1 <= p37) AND (1 <= p42)) OR ((1 <= p23) AND (1 <= p55)) OR ((1 <= p95) AND (1 <= p101)) OR ((1 <= p42) AND (1 <= p71)) OR ((1 <= p50) AND (1 <= p78)) OR ((1 <= p11) AND (1 <= p94)) OR ((1 <= p55) AND (1 <= p65)) OR ((1 <= p49) AND (1 <= p54)) OR ((1 <= p19) AND (1 <= p63)) OR ((1 <= p33) AND (1 <= p50)) OR ((1 <= p55) AND (1 <= p112)) OR ((1 <= p6) AND (1 <= p11)) OR ((1 <= p48) AND (1 <= p86)) OR ((1 <= p18) AND (1 <= p89)) OR ((1 <= p22) AND (1 <= p54)) OR ((1 <= p30) AND (1 <= p95)) OR ((1 <= p34) AND (1 <= p84)) OR ((1 <= p48) AND (1 <= p73)) OR ((1 <= p85) AND (1 <= p108)) OR ((1 <= p42) AND (1 <= p56)) OR ((1 <= p28) AND (1 <= p79)) OR ((1 <= p45) AND (1 <= p47)) OR ((1 <= p5) AND (1 <= p76)) OR ((1 <= p10) AND (1 <= p34)) OR ((1 <= p28) AND (1 <= p87)) OR ((1 <= p16) AND (1 <= p82)) OR ((1 <= p40) AND (1 <= p54)) OR ((1 <= p48) AND (1 <= p51)) OR ((1 <= p27) AND (1 <= p45)) OR ((1 <= p82) AND (1 <= p111)) OR ((1 <= p95) AND (1 <= p110)) OR ((1 <= p4) AND (1 <= p13)) OR ((1 <= p45) AND (1 <= p96)) OR ((1 <= p54) AND (1 <= p90)) OR ((1 <= p11) AND (1 <= p36)) OR ((1 <= p20) AND (1 <= p28)) OR ((1 <= p12) AND (1 <= p82)) OR ((1 <= p28) AND (1 <= p103)) OR ((1 <= p102) AND (1 <= p108)) OR ((1 <= p13) AND (1 <= p93)) OR ((1 <= p72) AND (1 <= p95)) OR ((1 <= p5) AND (1 <= p44)) OR ((1 <= p18) AND (1 <= p43)) OR ((1 <= p50) AND (1 <= p59)) OR ((1 <= p11) AND (1 <= p66)) OR ((1 <= p55) AND (1 <= p105)) OR ((1 <= p7) AND (1 <= p63)) OR ((1 <= p13) AND (1 <= p38)) OR ((1 <= p82) AND (1 <= p83)) OR ((1 <= p34) AND (1 <= p104)) OR ((1 <= p74) AND (1 <= p97)) OR ((1 <= p9) AND (1 <= p74)) OR ((1 <= p9) AND (1 <= p21)) OR ((1 <= p0) AND (1 <= p25)) OR ((1 <= p9) AND (1 <= p80)) OR ((1 <= p25) AND (1 <= p32)) OR ((1 <= p46) AND (1 <= p97)) OR ((1 <= p25) AND (1 <= p75)) OR ((1 <= p21) AND (1 <= p25)) OR ((1 <= p2) AND (1 <= p100)) OR ((1 <= p9) AND (1 <= p58)) OR ((1 <= p9) AND (1 <= p68)) OR ((1 <= p75) AND (1 <= p97)) OR ((1 <= p0) AND (1 <= p9)) OR ((1 <= p2) AND (1 <= p106)) OR ((1 <= p9) AND (1 <= p107)) OR ((1 <= p2) AND (1 <= p14)) OR ((1 <= p9) AND (1 <= p109)) OR ((1 <= p9) AND (1 <= p46)) OR ((1 <= p25) AND (1 <= p58)) OR ((1 <= p97) AND (1 <= p106)) OR ((1 <= p97) AND (1 <= p100)) OR ((1 <= p25) AND (1 <= p68)) OR ((1 <= p25) AND (1 <= p109)) OR ((1 <= p68) AND (1 <= p97)) OR ((1 <= p25) AND (1 <= p46)) OR ((1 <= p25) AND (1 <= p107)) OR ((1 <= p0) AND (1 <= p97)) OR ((1 <= p14) AND (1 <= p25)) OR ((1 <= p9) AND (1 <= p32)) OR ((1 <= p2) AND (1 <= p75)) OR ((1 <= p25) AND (1 <= p29)) OR ((1 <= p9) AND (1 <= p75)) OR ((1 <= p2) AND (1 <= p46)) OR ((1 <= p9) AND (1 <= p14)) OR ((1 <= p25) AND (1 <= p88)) OR ((1 <= p21) AND (1 <= p97)) OR ((1 <= p25) AND (1 <= p100)) OR ((1 <= p2) AND (1 <= p58)) OR ((1 <= p80) AND (1 <= p97)) OR ((1 <= p29) AND (1 <= p97)) OR ((1 <= p2) AND (1 <= p32)) OR ((1 <= p58) AND (1 <= p97)) OR ((1 <= p25) AND (1 <= p74)) OR ((1 <= p0) AND (1 <= p2)) OR ((1 <= p88) AND (1 <= p97)) OR ((1 <= p32) AND (1 <= p97)) OR ((1 <= p2) AND (1 <= p109)) OR ((1 <= p2) AND (1 <= p107)) OR ((1 <= p25) AND (1 <= p80)) OR ((1 <= p2) AND (1 <= p80)) OR ((1 <= p97) AND (1 <= p107)) OR ((1 <= p97) AND (1 <= p109)) OR ((1 <= p9) AND (1 <= p106)) OR ((1 <= p2) AND (1 <= p21)) OR ((1 <= p2) AND (1 <= p88)) OR ((1 <= p2) AND (1 <= p29)) OR ((1 <= p9) AND (1 <= p29)) OR ((1 <= p14) AND (1 <= p97)) OR ((1 <= p9) AND (1 <= p88)) OR ((1 <= p2) AND (1 <= p68)) OR ((1 <= p25) AND (1 <= p106)) OR ((1 <= p9) AND (1 <= p100)) OR ((1 <= p2) AND (1 <= p74))))))) AND ((1 <= p64) OR (1 <= p99) OR (1 <= p98) OR (1 <= p3) OR (1 <= p39) OR (1 <= p8) OR (1 <= p15) OR (1 <= p114) OR (1 <= p113) OR (1 <= p53) OR (1 <= p52) OR (1 <= p116) OR (1 <= p57) OR (1 <= p91) OR (1 <= p92) OR (1 <= p31))) : E (F ((NOT(A (G (((1 <= p64) OR (1 <= p99) OR (1 <= p98) OR (1 <= p3) OR (1 <= p39) OR (1 <= p8) OR (1 <= p15) OR (1 <= p114) OR (1 <= p113) OR (1 <= p53) OR (1 <= p52) OR (1 <= p116) OR (1 <= p57) OR (1 <= p91) OR (1 <= p92) OR (1 <= p31))))) AND (((1 <= p5) AND (1 <= p24)) OR ((1 <= p18) AND (1 <= p62)) OR ((1 <= p17) AND (1 <= p50)) OR ((1 <= p34) AND (1 <= p81)) OR ((1 <= p13) AND (1 <= p61)) OR ((1 <= p63) AND (1 <= p69)) OR ((1 <= p1) AND (1 <= p45)) OR ((1 <= p18) AND (1 <= p70)) OR ((1 <= p60) AND (1 <= p108)) OR ((1 <= p63) AND (1 <= p67)) OR ((1 <= p41) AND (1 <= p108)) OR ((1 <= p5) AND (1 <= p77)) OR ((1 <= p35) AND (1 <= p42)) OR ((1 <= p26) AND (1 <= p48)) OR ((1 <= p37) AND (1 <= p42)) OR ((1 <= p23) AND (1 <= p55)) OR ((1 <= p95) AND (1 <= p101)) OR ((1 <= p42) AND (1 <= p71)) OR ((1 <= p50) AND (1 <= p78)) OR ((1 <= p11) AND (1 <= p94)) OR ((1 <= p55) AND (1 <= p65)) OR ((1 <= p49) AND (1 <= p54)) OR ((1 <= p19) AND (1 <= p63)) OR ((1 <= p33) AND (1 <= p50)) OR ((1 <= p55) AND (1 <= p112)) OR ((1 <= p6) AND (1 <= p11)) OR ((1 <= p48) AND (1 <= p86)) OR ((1 <= p18) AND (1 <= p89)) OR ((1 <= p22) AND (1 <= p54)) OR ((1 <= p30) AND (1 <= p95)) OR ((1 <= p34) AND (1 <= p84)) OR ((1 <= p48) AND (1 <= p73)) OR ((1 <= p85) AND (1 <= p108)) OR ((1 <= p42) AND (1 <= p56)) OR ((1 <= p28) AND (1 <= p79)) OR ((1 <= p45) AND (1 <= p47)) OR ((1 <= p5) AND (1 <= p76)) OR ((1 <= p10) AND (1 <= p34)) OR ((1 <= p28) AND (1 <= p87)) OR ((1 <= p16) AND (1 <= p82)) OR ((1 <= p40) AND (1 <= p54)) OR ((1 <= p48) AND (1 <= p51)) OR ((1 <= p27) AND (1 <= p45)) OR ((1 <= p82) AND (1 <= p111)) OR ((1 <= p95) AND (1 <= p110)) OR ((1 <= p4) AND (1 <= p13)) OR ((1 <= p45) AND (1 <= p96)) OR ((1 <= p54) AND (1 <= p90)) OR ((1 <= p11) AND (1 <= p36)) OR ((1 <= p20) AND (1 <= p28)) OR ((1 <= p12) AND (1 <= p82)) OR ((1 <= p28) AND (1 <= p103)) OR ((1 <= p102) AND (1 <= p108)) OR ((1 <= p13) AND (1 <= p93)) OR ((1 <= p72) AND (1 <= p95)) OR ((1 <= p5) AND (1 <= p44)) OR ((1 <= p18) AND (1 <= p43)) OR ((1 <= p50) AND (1 <= p59)) OR ((1 <= p11) AND (1 <= p66)) OR ((1 <= p55) AND (1 <= p105)) OR ((1 <= p7) AND (1 <= p63)) OR ((1 <= p13) AND (1 <= p38)) OR ((1 <= p82) AND (1 <= p83)) OR ((1 <= p34) AND (1 <= p104)))))) : NOT(A (G (A (F ((p80 <= 0)))))) : (NOT(A (X (((1 <= p75) AND (1 <= p97))))) AND NOT(E (G (E (G ((1 <= p99))))))) : E (F ((((1 <= p33) AND (1 <= p50)) AND (E (F (((1 <= p97) AND (1 <= p109)))) OR A (X ((1 <= p109))))))) : (E ((((p75 <= 0) AND ((p12 <= 0) OR (p82 <= 0))) U ((1 <= p1) AND (1 <= p45) AND (1 <= p25) AND (1 <= p75) AND ((p9 <= 0) OR (p75 <= 0))))) OR ((E ((((1 <= p23) AND (1 <= p55) AND (1 <= p2) AND (1 <= p75)) U ((1 <= p97) AND (1 <= p109)))) AND ((p82 <= 0) OR (p83 <= 0))) AND (((1 <= p45) AND (1 <= p47)) OR ((1 <= p13) AND (1 <= p38)) OR ((1 <= p16) AND (1 <= p82))))) : E (F (A (G (E (F (((1 <= p25) AND (1 <= p29)))))))) : E (((1 <= p113) U ((((E (G (((1 <= p34) AND (1 <= p84)))) AND (1 <= p9)) AND (1 <= p80)) AND (1 <= p32)) AND ((p27 <= 0) OR (p45 <= 0))))) : (E (X ((A (F (((1 <= p72) AND (1 <= p95)))) AND (((1 <= p18) AND (1 <= p62)) OR ((1 <= p34) AND (1 <= p81)) OR (p28 <= 0) OR (p115 <= 0))))) AND (((E (G (E (X ((1 <= p53))))) OR (p2 <= 0)) OR (p32 <= 0)) OR ((1 <= p6) AND (1 <= p11) AND ((p5 <= 0) OR (p77 <= 0))))) : E (X (NOT(E (G (((p34 <= 0) OR (p104 <= 0)))))))
lola: rewrite Frontend/Parser/formula_rewrite.k:326
lola: rewrite Frontend/Parser/formula_rewrite.k:332
lola: rewrite Frontend/Parser/formula_rewrite.k:323
lola: rewrite Frontend/Parser/formula_rewrite.k:329
lola: rewrite Frontend/Parser/formula_rewrite.k:297
lola: rewrite Frontend/Parser/formula_rewrite.k:323
lola: rewrite Frontend/Parser/formula_rewrite.k:338
lola: rewrite Frontend/Parser/formula_rewrite.k:297
lola: rewrite Frontend/Parser/formula_rewrite.k:297
lola: rewrite Frontend/Parser/formula_rewrite.k:461
lola: rewrite Frontend/Parser/formula_rewrite.k:476
lola: rewrite Frontend/Parser/formula_rewrite.k:323
lola: rewrite Frontend/Parser/formula_rewrite.k:335
lola: rewrite Frontend/Parser/formula_rewrite.k:297
lola: rewrite Frontend/Parser/formula_rewrite.k:323
lola: rewrite Frontend/Parser/formula_rewrite.k:329
lola: rewrite Frontend/Parser/formula_rewrite.k:297
lola: rewrite Frontend/Parser/formula_rewrite.k:323
lola: rewrite Frontend/Parser/formula_rewrite.k:335
lola: rewrite Frontend/Parser/formula_rewrite.k:297
lola: rewrite Frontend/Parser/formula_rewrite.k:254
lola: rewrite Frontend/Parser/formula_rewrite.k:323
lola: rewrite Frontend/Parser/formula_rewrite.k:329
lola: rewrite Frontend/Parser/formula_rewrite.k:297
lola: rewrite Frontend/Parser/formula_rewrite.k:323
lola: rewrite Frontend/Parser/formula_rewrite.k:329
lola: rewrite Frontend/Parser/formula_rewrite.k:323
lola: rewrite Frontend/Parser/formula_rewrite.k:332
lola: rewrite Frontend/Parser/formula_rewrite.k:297
lola: rewrite Frontend/Parser/formula_rewrite.k:323
lola: rewrite Frontend/Parser/formula_rewrite.k:335
lola: rewrite Frontend/Parser/formula_rewrite.k:297
lola: rewrite Frontend/Parser/formula_rewrite.k:461
lola: rewrite Frontend/Parser/formula_rewrite.k:326
lola: rewrite Frontend/Parser/formula_rewrite.k:329
lola: rewrite Frontend/Parser/formula_rewrite.k:297
lola: rewrite Frontend/Parser/formula_rewrite.k:251
lola: rewrite Frontend/Parser/formula_rewrite.k:251
lola: rewrite Frontend/Parser/formula_rewrite.k:251
lola: rewrite Frontend/Parser/formula_rewrite.k:251
lola: rewrite Frontend/Parser/formula_rewrite.k:251
lola: rewrite Frontend/Parser/formula_rewrite.k:251
lola: rewrite Frontend/Parser/formula_rewrite.k:251
lola: rewrite Frontend/Parser/formula_rewrite.k:254
lola: rewrite Frontend/Parser/formula_rewrite.k:254
lola: rewrite Frontend/Parser/formula_rewrite.k:254
lola: rewrite Frontend/Parser/formula_rewrite.k:326
lola: rewrite Frontend/Parser/formula_rewrite.k:329
lola: rewrite Frontend/Parser/formula_rewrite.k:297
lola: computing a collection of formulas
lola: RUNNING
lola: subprocess 0 will run for 222 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (X (((((1 <= p5) AND (1 <= p24)) OR ((1 <= p18) AND (1 <= p62)) OR ((1 <= p17) AND (1 <= p50)) OR ((1 <= p34) AND (1 <= p81)) OR ((1 <= p13) AND (1 <= p61)) OR ((1 <= p63) AND (1 <= p69)) OR ((1 <= p1) AND (1 <= p45)) OR ((1 <= p18) AND (1 <= p70)) OR ((1 <= p60) AND (1 <= p108)) OR ((1 <= p63) AND (1 <= p67)) OR ((1 <= p41) AND (1 <= p108)) OR ((1 <= p5) AND (1 <= p77)) OR ((1 <= p3... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking CTL
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: processed formula: AX(((((1 <= p5) AND (1 <= p24)) OR ((1 <= p18) AND (1 <= p62)) OR ((1 <= p17) AND (1 <= p50)) OR ((1 <= p34) AND (1 <= p81)) OR ((1 <= p13) AND (1 <= p61)) OR ((1 <= p63) AND (1 <= p69)) OR ((1 <= p1) AND (1 <= p45)) OR ((1 <= p18) AND (1 <= p70)) OR ((1 <= p60) AND (1 <= p108)) OR ((1 <= p63) AND (1 <= p67)) OR ((1 <= p41) AND (1 <= p108)) OR ((1 <= p5) AND (1 <= p77)) OR ((1 <= p35) ... (shortened)
lola: processed formula length: 4889
lola: 51 rewrites
lola: closed formula file CTLFireability.xml
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: Using CTL preserving stubborn sets
lola: RUNNING
lola: CTL formula contains 1 significant temporal operators and needs 5 bytes of payload
lola: Ignoring fairness constraints (--fair).
lola: SUBRESULT
lola: result: no
lola: produced by: CTL model checker
lola: The net does not satisfy the given formula.
lola: 24 markings, 23 edges
lola: ========================================
lola: subprocess 1 will run for 237 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: (A (G (((1 <= p64) OR (1 <= p99) OR (1 <= p98) OR (1 <= p3) OR (1 <= p39) OR (1 <= p8) OR (1 <= p15) OR (1 <= p114) OR (1 <= p113) OR (1 <= p53) OR (1 <= p52) OR (1 <= p116) OR (1 <= p57) OR (1 <= p91) OR (1 <= p92) OR (1 <= p31)))) OR A (G (E (X (((p64 <= 0) AND (p99 <= 0) AND (p98 <= 0) AND (p3 <= 0) AND (p39 <= 0) AND (p8 <= 0) AND (p15 <= 0) AND (p114 <= 0) AND (p113 <= 0) AND (... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking a Boolean combination of formulas
lola: RUNNING
lola: subprocess 1 will run for 237 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (G (((1 <= p64) OR (1 <= p99) OR (1 <= p98) OR (1 <= p3) OR (1 <= p39) OR (1 <= p8) OR (1 <= p15) OR (1 <= p114) OR (1 <= p113) OR (1 <= p53) OR (1 <= p52) OR (1 <= p116) OR (1 <= p57) OR (1 <= p91) OR (1 <= p92) OR (1 <= p31))))
lola: ========================================
lola: SUBTASK
lola: checking invariance
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: processed formula: A (G (((1 <= p64) OR (1 <= p99) OR (1 <= p98) OR (1 <= p3) OR (1 <= p39) OR (1 <= p8) OR (1 <= p15) OR (1 <= p114) OR (1 <= p113) OR (1 <= p53) OR (1 <= p52) OR (1 <= p116) OR (1 <= p57) OR (1 <= p91) OR (1 <= p92) OR (1 <= p31))))
lola: processed formula length: 246
lola: 51 rewrites
lola: closed formula file CTLFireability.xml
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: built state equation task
lola: RUNNING
lola: state equation task get result started, id 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: state equation task get result rewrite finished id 0
lola: state equation task get result unparse finished++ id 0
lola: formula 0: ((p64 <= 0) AND (p99 <= 0) AND (p98 <= 0) AND (p3 <= 0) AND (p39 <= 0) AND (p8 <= 0) AND (p15 <= 0) AND (p114 <= 0) AND (p113 <= 0) AND (p53 <= 0) AND (p52 <= 0) AND (p116 <= 0) AND (p57 <= 0) AND (p91 <= 0) AND (p92 <= 0) AND (p31 <= 0))
lola: state equation task get result unparse finished id 0
lola: state equation: Generated DNF with 16 literals and 1 conjunctive subformulas
lola: SUBRESULT
lola: result: no
lola: produced by: state space
lola: The predicate is not invariant.
lola: 17 markings, 16 edges
lola: ========================================
lola: subprocess 2 will run for 254 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (G (E (X (((p64 <= 0) AND (p99 <= 0) AND (p98 <= 0) AND (p3 <= 0) AND (p39 <= 0) AND (p8 <= 0) AND (p15 <= 0) AND (p114 <= 0) AND (p113 <= 0) AND (p53 <= 0) AND (p52 <= 0) AND (p116 <= 0) AND (p57 <= 0) AND (p91 <= 0) AND (p92 <= 0) AND (p31 <= 0))))))
lola: ========================================
lola: SUBTASK
lola: checking CTL
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: processed formula: AG(EX(((p64 <= 0) AND (p99 <= 0) AND (p98 <= 0) AND (p3 <= 0) AND (p39 <= 0) AND (p8 <= 0) AND (p15 <= 0) AND (p114 <= 0) AND (p113 <= 0) AND (p53 <= 0) AND (p52 <= 0) AND (p116 <= 0) AND (p57 <= 0) AND (p91 <= 0) AND (p92 <= 0) AND (p31 <= 0))))
lola: processed formula length: 246
lola: 51 rewrites
lola: closed formula file CTLFireability.xml
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: Using CTL preserving stubborn sets
lola: RUNNING
lola: CTL formula contains 1 significant temporal operators and needs 5 bytes of payload
lola: Ignoring fairness constraints (--fair).
lola: SUBRESULT
lola: result: no
lola: produced by: CTL model checker
lola: The net does not satisfy the given formula.
lola: 1 markings, 0 edges
lola: ========================================
lola: SUBRESULT
lola: result: no
lola: The Boolean predicate is false.
lola: ========================================
lola: subprocess 2 will run for 254 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: ((((1 <= p5) AND (1 <= p24)) OR ((1 <= p18) AND (1 <= p62)) OR ((1 <= p17) AND (1 <= p50)) OR ((1 <= p34) AND (1 <= p81)) OR ((1 <= p13) AND (1 <= p61)) OR ((1 <= p63) AND (1 <= p69)) OR ((1 <= p1) AND (1 <= p45)) OR ((1 <= p18) AND (1 <= p70)) OR ((1 <= p60) AND (1 <= p108)) OR ((1 <= p63) AND (1 <= p67)) OR ((1 <= p41) AND (1 <= p108)) OR ((1 <= p5) AND (1 <= p77)) OR ((1 <= p35) AND... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking a Boolean combination of formulas
lola: RUNNING
lola: subprocess 2 will run for 254 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: ((((p74 <= 0) OR (p97 <= 0)) AND ((p9 <= 0) OR (p74 <= 0)) AND ((p9 <= 0) OR (p21 <= 0)) AND ((p0 <= 0) OR (p25 <= 0)) AND ((p9 <= 0) OR (p80 <= 0)) AND ((p25 <= 0) OR (p32 <= 0)) AND ((p46 <= 0) OR (p97 <= 0)) AND ((p25 <= 0) OR (p75 <= 0)) AND ((p21 <= 0) OR (p25 <= 0)) AND ((p2 <= 0) OR (p100 <= 0)) AND ((p9 <= 0) OR (p58 <= 0)) AND ((p9 <= 0) OR (p68 <= 0)) AND ((p75 <= 0) OR (p97... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: rewrite Frontend/Parser/formula_rewrite.k:797
lola: processed formula: ((((p74 <= 0) OR (p97 <= 0)) AND ((p9 <= 0) OR (p74 <= 0)) AND ((p9 <= 0) OR (p21 <= 0)) AND ((p0 <= 0) OR (p25 <= 0)) AND ((p9 <= 0) OR (p80 <= 0)) AND ((p25 <= 0) OR (p32 <= 0)) AND ((p46 <= 0) OR (p97 <= 0)) AND ((p25 <= 0) OR (p75 <= 0)) AND ((p21 <= 0) OR (p25 <= 0)) AND ((p2 <= 0) OR (p100 <= 0)) AND ((p9 <= 0) OR (p58 <= 0)) AND ((p9 <= 0) OR (p68 <= 0)) AND ((p75 <= 0) OR (p97... (shortened)
lola: processed formula length: 2556
lola: 50 rewrites
lola: closed formula file CTLFireability.xml
lola: processed formula with 160 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: yes
lola: produced by: preprocessing
lola: The net satisfies the property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
lola: subprocess 3 will run for 274 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: E (F (((p64 <= 0) AND (p99 <= 0) AND (p98 <= 0) AND (p3 <= 0) AND (p39 <= 0) AND (p8 <= 0) AND (p15 <= 0) AND (p114 <= 0) AND (p113 <= 0) AND (p53 <= 0) AND (p52 <= 0) AND (p116 <= 0) AND (p57 <= 0) AND (p91 <= 0) AND (p92 <= 0) AND (p31 <= 0) AND ((p95 <= 0) OR (p115 <= 0)) AND ((p34 <= 0) OR (p115 <= 0)) AND ((p5 <= 0) OR (p115 <= 0)) AND ((p54 <= 0) OR (p115 <= 0)) AND ((p11 <= 0) OR (p115... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking reachability
lola: Planning: workflow for reachability check: stateequation||search (--findpath=off)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: processed formula: E (F (((p64 <= 0) AND (p99 <= 0) AND (p98 <= 0) AND (p3 <= 0) AND (p39 <= 0) AND (p8 <= 0) AND (p15 <= 0) AND (p114 <= 0) AND (p113 <= 0) AND (p53 <= 0) AND (p52 <= 0) AND (p116 <= 0) AND (p57 <= 0) AND (p91 <= 0) AND (p92 <= 0) AND (p31 <= 0) AND ((p95 <= 0) OR (p115 <= 0)) AND ((p34 <= 0) OR (p115 <= 0)) AND ((p5 <= 0) OR (p115 <= 0)) AND ((p54 <= 0) OR (p115 <= 0)) AND ((p11 <= 0) OR (p115... (shortened)
lola: processed formula length: 774
lola: 50 rewrites
lola: closed formula file CTLFireability.xml
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space)
lola: state space: using reachability graph (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: built state equation task
lola: RUNNING
lola: SUBRESULT
lola: result: yes
lola: produced by: state space
lola: state equation task get result started, id 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: state equation task get result rewrite finished id 0
lola: The predicate is reachable.
lola: 21 markings, 20 edges
lola: state equation task get result unparse finished++ id 0
lola: formula 0: ((p64 <= 0) AND (p99 <= 0) AND (p98 <= 0) AND (p3 <= 0) AND (p39 <= 0) AND (p8 <= 0) AND (p15 <= 0) AND (p114 <= 0) AND (p113 <= 0) AND (p53 <= 0) AND (p52 <= 0) AND (p116 <= 0) AND (p57 <= 0) AND (p91 <= 0) AND (p92 <= 0) AND (p31 <= 0) AND ((p95 <= 0) OR (p115 <= 0)) AND ((p34 <= 0) OR (p115 <= 0)) AND ((p5 <= 0) OR (p115 <= 0)) AND ((p54 <= 0) OR (p115 <= 0)) AND ((p11 <= 0) OR (p115 <= 0)) AND ((p28 <= 0) OR (p115 <= 0)) AND ((p13 <= 0) OR (p115 <= 0)) AND ((p45 <= 0) OR (p115 <= 0)) AND ((p18 <= 0) OR (p115 <= 0)) AND ((p50 <= 0) OR (p115 <= 0)) AND ((p55 <= 0) OR (p115 <= 0)) AND ((p108 <= 0) OR (p115 <= 0)) AND ((p48 <= 0) OR (p115 <= 0)) AND ((p42 <= 0) OR (p115 <= 0)) AND ((p63 <= 0) OR (p115 <= 0)) AND ((p82 <= 0) OR (p115 <= 0)))
lola: ========================================
lola: SUBRESULT
lola: result: yes
lola: The Boolean predicate is true.
lola: ========================================
lola: subprocess 3 will run for 274 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: (A (X (A (F ((((1 <= p5) AND (1 <= p24)) OR ((1 <= p18) AND (1 <= p62)) OR ((1 <= p17) AND (1 <= p50)) OR ((1 <= p34) AND (1 <= p81)) OR ((1 <= p13) AND (1 <= p61)) OR ((1 <= p63) AND (1 <= p69)) OR ((1 <= p1) AND (1 <= p45)) OR ((1 <= p18) AND (1 <= p70)) OR ((1 <= p60) AND (1 <= p108)) OR ((1 <= p63) AND (1 <= p67)) OR ((1 <= p41) AND (1 <= p108)) OR ((1 <= p5) AND (1 <= p77)) OR ((1... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking a Boolean combination of formulas
lola: RUNNING
lola: subprocess 3 will run for 274 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: ((1 <= p64) OR (1 <= p99) OR (1 <= p98) OR (1 <= p3) OR (1 <= p39) OR (1 <= p8) OR (1 <= p15) OR (1 <= p114) OR (1 <= p113) OR (1 <= p53) OR (1 <= p52) OR (1 <= p116) OR (1 <= p57) OR (1 <= p91) OR (1 <= p92) OR (1 <= p31))
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: processed formula: ((1 <= p64) OR (1 <= p99) OR (1 <= p98) OR (1 <= p3) OR (1 <= p39) OR (1 <= p8) OR (1 <= p15) OR (1 <= p114) OR (1 <= p113) OR (1 <= p53) OR (1 <= p52) OR (1 <= p116) OR (1 <= p57) OR (1 <= p91) OR (1 <= p92) OR (1 <= p31))
lola: processed formula length: 238
lola: 49 rewrites
lola: closed formula file CTLFireability.xml
lola: processed formula with 16 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: yes
lola: produced by: preprocessing
lola: The net satisfies the property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
lola: subprocess 4 will run for 297 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (X (A (F ((((1 <= p5) AND (1 <= p24)) OR ((1 <= p18) AND (1 <= p62)) OR ((1 <= p17) AND (1 <= p50)) OR ((1 <= p34) AND (1 <= p81)) OR ((1 <= p13) AND (1 <= p61)) OR ((1 <= p63) AND (1 <= p69)) OR ((1 <= p1) AND (1 <= p45)) OR ((1 <= p18) AND (1 <= p70)) OR ((1 <= p60) AND (1 <= p108)) OR ((1 <= p63) AND (1 <= p67)) OR ((1 <= p41) AND (1 <= p108)) OR ((1 <= p5) AND (1 <= p77)) OR ((1 ... (shortened)
lola: ========================================
lola: SUBTASK
lola: checking eventual occurrence from all successors
lola: rewrite Frontend/Parser/formula_rewrite.k:584
lola: rewrite Frontend/Parser/formula_rewrite.k:754
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: processed formula: (((p5 <= 0) OR (p24 <= 0)) AND ((p18 <= 0) OR (p62 <= 0)) AND ((p17 <= 0) OR (p50 <= 0)) AND ((p34 <= 0) OR (p81 <= 0)) AND ((p13 <= 0) OR (p61 <= 0)) AND ((p63 <= 0) OR (p69 <= 0)) AND ((p1 <= 0) OR (p45 <= 0)) AND ((p18 <= 0) OR (p70 <= 0)) AND ((p60 <= 0) OR (p108 <= 0)) AND ((p63 <= 0) OR (p67 <= 0)) AND ((p41 <= 0) OR (p108 <= 0)) AND ((p5 <= 0) OR (p77 <= 0)) AND ((p35 <= 0) OR ... (shortened)
lola: processed formula length: 4077
lola: 52 rewrites
lola: closed formula file CTLFireability.xml
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space /EXEG)
lola: state space: using reachability graph (EXEG version) (--search=depth)
lola: state space: using invisibility based stubborn set method (--stubborn=tarjan)
lola: Planning: workflow for reachability check: stateequation (--findpath=off)
lola: built state equation task
lola: RUNNING
lola: state equation task get result started, id 0
lola: rewrite Frontend/Parser/formula_rewrite.k:753
lola: rewrite Frontend/Parser/formula_rewrite.k:700
lola: state equation task get result rewrite finished id 0
lola: state equation task get result unparse finished++ id 0
lola: formula 0: (((1 <= p5) AND (1 <= p24)) OR ((1 <= p18) AND (1 <= p62)) OR ((1 <= p17) AND (1 <= p50)) OR ((1 <= p34) AND (1 <= p81)) OR ((1 <= p13) AND (1 <= p61)) OR ((1 <= p63) AND (1 <= p69)) OR ((1 <= p1) AND (1 <= p45)) OR ((1 <= p18) AND (1 <= p70)) OR ((1 <= p60) AND (1 <= p108)) OR ((1 <= p63) AND (1 <= p67)) OR ((1 <= p41) AND (1 <= p108)) OR ((1 <= p5) AND (1 <= p77)) OR ((1 <= p35) AND (1 <= p42)) OR ((1 <= p26) AND (1 <= p48)) OR ((1 <= p37) AND (1 <= p42)) OR ((1 <= p23) AND (1 <= p55)) OR ((1 <= p95) AND (1 <= p101)) OR ((1 <= p42) AND (1 <= p71)) OR ((1 <= p50) AND (1 <= p78)) OR ((1 <= p11) AND (1 <= p94)) OR ((1 <= p55) AND (1 <= p65)) OR ((1 <= p49) AND (1 <= p54)) OR ((1 <= p19) AND (1 <= p63)) OR ((1 <= p33) AND (1 <= p50)) OR ((1 <= p55) AND (1 <= p112)) OR ((1 <= p6) AND (1 <= p11)) OR ((1 <= p48) AND (1 <= p86)) OR ((1 <= p18) AND (1 <= p89)) OR ((1 <= p22) AND (1 <= p54)) OR ((1 <= p30) AND (1 <= p95)) OR ((1 <= p34) AND (1 <= p84)) OR ((1 <= p48) AND (1 <= p73)) OR ((1 <= p85) AND (1 <= p108)) OR ((1 <= p42) AND (1 <= p56)) OR ((1 <= p28) AND (1 <= p79)) OR ((1 <= p45) AND (1 <= p47)) OR ((1 <= p5) AND (1 <= p76)) OR ((1 <= p10) AND (1 <= p34)) OR ((1 <= p28) AND (1 <= p87)) OR ((1 <= p16) AND (1 <= p82)) OR ((1 <= p40) AND (1 <= p54)) OR ((1 <= p48) AND (1 <= p51)) OR ((1 <= p27) AND (1 <= p45)) OR ((1 <= p82) AND (1 <= p111)) OR ((1 <= p95) AND (1 <= p110)) OR ((1 <= p4) AND (1 <= p13)) OR ((1 <= p45) AND (1 <= p96)) OR ((1 <= p54) AND (1 <= p90)) OR ((1 <= p11) AND (1 <= p36)) OR ((1 <= p20) AND (1 <= p28)) OR ((1 <= p12) AND (1 <= p82)) OR ((1 <= p28) AND (1 <= p103)) OR ((1 <= p102) AND (1 <= p108)) OR ((1 <= p13) AND (1 <= p93)) OR ((1 <= p72) AND (1 <= p95)) OR ((1 <= p5) AND (1 <= p44)) OR ((1 <= p18) AND (1 <= p43)) OR ((1 <= p50) AND (1 <= p59)) OR ((1 <= p11) AND (1 <= p66)) OR ((1 <= p55) AND (1 <= p105)) OR ((1 <= p7) AND (1 <= p63)) OR ((1 <= p13) AND (1 <= p38)) OR ((1 <= p82) AND (1 <= p83)) OR ((1 <= p34) AND (1 <= p104)) OR ((1 <= p74) AND (1 <= p97)) OR ((1 <= p9) AND (1 <= p74)) OR ((1 <= p9) AND (1 <= p21)) OR ((1 <= p0) AND (1 <= p25)) OR ((1 <= p9) AND (1 <= p80)) OR ((1 <= p25) AND (1 <= p32)) OR ((1 <= p46) AND (1 <= p97)) OR ((1 <= p25) AND (1 <= p75)) OR ((1 <= p21) AND (1 <= p25)) OR ((1 <= p2) AND (1 <= p100)) OR ((1 <= p9) AND (1 <= p58)) OR ((1 <= p9) AND (1 <= p68)) OR ((1 <= p75) AND (1 <= p97)) OR ((1 <= p0) AND (1 <= p9)) OR ((1 <= p2) AND (1 <= p106)) OR ((1 <= p9) AND (1 <= p107)) OR ((1 <= p2) AND (1 <= p14)) OR ((1 <= p9) AND (1 <= p109)) OR ((1 <= p9) AND (1 <= p46)) OR ((1 <= p25) AND (1 <= p58)) OR ((1 <= p97) AND (1 <= p106)) OR ((1 <= p97) AND (1 <= p100)) OR ((1 <= p25) AND (1 <= p68)) OR ((1 <= p25) AND (1 <= p109)) OR ((1 <= p68) AND (1 <= p97)) OR ((1 <= p25) AND (1 <= p46)) OR ((1 <= p25) AND (1 <= p107)) OR ((1 <= p0) AND (1 <= p97)) OR ((1 <= p14) AND (1 <= p25)) OR ((1 <= p9) AND (1 <= p32)) OR ((1 <= p2) AND (1 <= p75)) OR ((1 <= p25) AND (1 <= p29)) OR ((1 <= p9) AND (1 <= p75)) OR ((1 <= p2) AND (1 <= p46)) OR ((1 <= p9) AND (1 <= p14)) OR ((1 <= p25) AND (1 <= p88)) OR ((1 <= p21) AND (1 <= p97)) OR ((1 <= p25) AND (1 <= p100)) OR ((1 <= p2) AND (1 <= p58)) OR ((1 <= p80) AND (1 <= p97)) OR ((1 <= p29) AND (1 <= p97)) OR ((1 <= p2) AND (1 <= p32)) OR ((1 <= p58) AND (1 <= p97)) OR ((1 <= p25) AND (1 <= p74)) OR ((1 <= p0) AND (1 <= p2)) OR ((1 <= p88) AND (1 <= p97)) OR ((1 <= p32) AND (1 <= p97)) OR ((1 <= p2) AND (1 <= p109)) OR ((1 <= p2) AND (1 <= p107)) OR ((1 <= p25) AND (1 <= p80)) OR ((1 <= p2) AND (1 <= p80)) OR ((1 <= p97) AND (1 <= p107)) OR ((1 <= p97) AND (1 <= p109)) OR ((1 <= p9) AND (1 <= p106)) OR ((1 <= p2) AND (1 <= p21)) OR ((1 <= p2) AND (1 <= p88)) OR ((1 <= p2) AND (1 <= p29)) OR ((1 <= p9) AND (1 <= p29)) OR ((1 <= p14) AND (1 <= p97)) OR ((1 <= p9) AND (1 <= p88)) OR ((1 <= p2) AND (1 <= p68)) OR ((1 <= p25) AND (1 <= p106)) OR ((1 <= p9) AND (1 <= p100)) OR ((1 <= p2) AND (1 <= p74)))
lola: state equation task get result unparse finished id 0
lola: state equation: Generated DNF with 256 literals and 128 conjunctive subformulas
lola: state equation: write sara problem file to CTLFireability-4-0.sara
lola: state equation: calling and running sara
sara: try reading problem file CTLFireability-4-0.sara.
sara: error: :218: error near 'TRANSITION': syntax error, unexpected KEY_TRANSITION, expecting SEMICOLON or COMMA
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: state equation:solution unknown
lola: SUBRESULT
lola: result: yes
lola: produced by: state space /EXEG
lola: The predicate eventually occurs from all successors.
lola: 65535 markings, 524287 edges
lola: ========================================
lola: SUBRESULT
lola: result: yes
lola: The Boolean predicate is true.
lola: ========================================
lola: subprocess 4 will run for 296 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: (E (X (((p75 <= 0) OR (p97 <= 0)))) AND A (F ((p99 <= 0))))
lola: ========================================
lola: SUBTASK
lola: checking a Boolean combination of formulas
lola: RUNNING
lola: subprocess 4 will run for 296 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: A (F ((p99 <= 0)))
lola: ========================================
lola: SUBTASK
lola: checking eventual occurrence
lola: rewrite Frontend/Parser/formula_rewrite.k:584
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: processed formula: (1 <= p99)
lola: processed formula length: 10
lola: 52 rewrites
lola: closed formula file CTLFireability.xml
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space / EG)
lola: state space: using search routine for EG formula (--search=depth)
lola: state space: using EG preserving stubborn set method (--stubborn=tarjan)
lola: Planning: workflow for reachability check: stateequation (--findpath=off)
lola: built state equation task
lola: RUNNING
lola: state equation task get result started, id 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:700
lola: state equation task get result rewrite finished id 0
lola: state equation task get result unparse finished++ id 0
lola: formula 0: (p99 <= 0)
lola: state equation task get result unparse finished id 0
lola: state equation: Generated DNF with 1 literals and 1 conjunctive subformulas
lola: state equation: write sara problem file to CTLFireability-4-0.sara
lola: state equation: calling and running sara
lola: SUBRESULT
lola: result: no
lola: produced by: state space / EG
lola: The predicate does not eventually occur.
lola: 31 markings, 31 edges
lola: ========================================
lola: SUBRESULT
lola: result: no
lola: The Boolean predicate is false.
lola: ========================================
lola: subprocess 5 will run for 323 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: E (F ((((1 <= p33) AND (1 <= p50)) AND (E (F (((1 <= p97) AND (1 <= p109)))) OR A (X ((1 <= p109)))))))
lola: ========================================
lola: SUBTASK
lola: checking CTL
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: processed formula: EF((((1 <= p33) AND (1 <= p50)) AND (EF(((1 <= p97) AND (1 <= p109))) OR AX((1 <= p109)))))
lola: processed formula length: 91
lola: 52 rewrites
lola: closed formula file CTLFireability.xml
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: Using CTL preserving stubborn sets
lola: RUNNING
lola: CTL formula contains 2 significant temporal operators and needs 9 bytes of payload
lola: Ignoring fairness constraints (--fair).
lola: SUBRESULT
lola: result: yes
lola: produced by: CTL model checker
lola: The net satisfies the given formula.
lola: 34752 markings, 200086 edges
lola: ========================================
lola: subprocess 6 will run for 356 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: (E (X ((A (F (((1 <= p72) AND (1 <= p95)))) AND (((1 <= p18) AND (1 <= p62)) OR ((1 <= p34) AND (1 <= p81)) OR (p28 <= 0) OR (p115 <= 0))))) AND (E (G (E (X ((1 <= p53))))) OR ((p2 <= 0) OR ((p32 <= 0) OR ((1 <= p6) AND (1 <= p11) AND ((p5 <= 0) OR (p77 <= 0)))))))
lola: ========================================
lola: SUBTASK
lola: checking a Boolean combination of formulas
lola: RUNNING
lola: subprocess 6 will run for 356 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: ((p2 <= 0) OR ((p32 <= 0) OR ((1 <= p6) AND (1 <= p11) AND ((p5 <= 0) OR (p77 <= 0)))))
lola: ========================================
lola: SUBTASK
lola: checking initial satisfaction
lola: rewrite Frontend/Parser/formula_rewrite.k:797
lola: rewrite Frontend/Parser/formula_rewrite.k:797
lola: rewrite Frontend/Parser/formula_rewrite.k:798
lola: processed formula: ((p2 <= 0) OR (p32 <= 0) OR ((1 <= p6) AND (1 <= p11) AND ((p5 <= 0) OR (p77 <= 0))))
lola: processed formula length: 86
lola: 52 rewrites
lola: closed formula file CTLFireability.xml
lola: processed formula with 6 atomic propositions
lola: RUNNING
lola: SUBRESULT
lola: result: yes
lola: produced by: preprocessing
lola: The net satisfies the property already in its initial state.
lola: 0 markings, 0 edges
lola: ========================================
lola: subprocess 7 will run for 395 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: E (X ((A (F (((1 <= p72) AND (1 <= p95)))) AND (((1 <= p18) AND (1 <= p62)) OR ((1 <= p34) AND (1 <= p81)) OR (p28 <= 0) OR (p115 <= 0)))))
lola: ========================================
lola: SUBTASK
lola: checking CTL
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: processed formula: EX((AF(((1 <= p72) AND (1 <= p95))) AND (((1 <= p18) AND (1 <= p62)) OR ((1 <= p34) AND (1 <= p81)) OR (p28 <= 0) OR (p115 <= 0))))
lola: processed formula length: 134
lola: 51 rewrites
lola: closed formula file CTLFireability.xml
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: Using CTL preserving stubborn sets
lola: RUNNING
lola: CTL formula contains 1 significant temporal operators and needs 5 bytes of payload
lola: Ignoring fairness constraints (--fair).
lola: SUBRESULT
lola: result: no
lola: produced by: CTL model checker
lola: The net does not satisfy the given formula.
lola: 257 markings, 271 edges
lola: ========================================
lola: SUBRESULT
lola: result: no
lola: The Boolean predicate is false.
lola: ========================================
lola: subprocess 7 will run for 395 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: E (X (A (F (((1 <= p34) AND (1 <= p104))))))
lola: ========================================
lola: SUBTASK
lola: checking CTL
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: processed formula: EX(AF(((1 <= p34) AND (1 <= p104))))
lola: processed formula length: 36
lola: 51 rewrites
lola: closed formula file CTLFireability.xml
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: Using CTL preserving stubborn sets
lola: RUNNING
lola: CTL formula contains 1 significant temporal operators and needs 5 bytes of payload
lola: Ignoring fairness constraints (--fair).
lola: SUBRESULT
lola: result: no
lola: produced by: CTL model checker
lola: The net does not satisfy the given formula.
lola: 257 markings, 271 edges
lola: ========================================
lola: subprocess 8 will run for 445 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: E (F (E (G ((1 <= p80)))))
lola: ========================================
lola: SUBTASK
lola: checking reachability of possible preservation
lola: rewrite Frontend/Parser/formula_rewrite.k:598
lola: rewrite Frontend/Parser/formula_rewrite.k:633
lola: rewrite Frontend/Parser/formula_rewrite.k:730
lola: processed formula: (1 <= p80)
lola: processed formula length: 10
lola: 52 rewrites
lola: closed formula file CTLFireability.xml
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH (state space /EFEG)
lola: state space: using reachability graph (EFEG version) (--search=depth)
lola: state space: using reachability preserving stubborn set method with insertion algorithm (--stubborn=tarjan)
lola: Planning: workflow for reachability check: stateequation (--findpath=off)
lola: built state equation task
lola: Planning: workflow for reachability check: stateequation (--findpath=off)
lola: built state equation task
lola: RUNNING
lola: state equation task get result started, id 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: state equation task get result rewrite finished id 0
lola: state equation task get result unparse finished++ id 0
lola: formula 0: (p80 <= 0)
lola: state equation task get result unparse finished id 0
lola: state equation: Generated DNF with 1 literals and 1 conjunctive subformulas
lola: state equation task get result started, id 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: state equation task get result rewrite finished id 1
lola: state equation task get result unparse finished++ id 1
lola: formula 1: (1 <= p80)
lola: state equation task get result unparse finished id 1
lola: state equation: Generated DNF with 1 literals and 1 conjunctive subformulas
lola: SUBRESULT
lola: result: yes
lola: produced by: state space /EFEG
lola: The predicate is possibly preserved from a reachable marking.
lola: 26 markings, 26 edges
lola: state equation: write sara problem file to CTLFireability-8-0.sara
lola: state equation: write sara problem file to CTLFireability-8-1.sara
lola: state equation: calling and running sara
sara: try reading problem file CTLFireability-8-0.sara.
sara: error: :218: error near 'TRANSITION': syntax error, unexpected KEY_TRANSITION, expecting SEMICOLON or COMMA
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: state equation: calling and running sara
lola: ========================================
sara: try reading problem file CTLFireability-8-1.sara.
sara: error: :218: error near 'TRANSITION': syntax error, unexpected KEY_TRANSITION, expecting SEMICOLON or COMMA
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: subprocess 9 will run for 509 seconds at most (--localtimelimit=0)
lola: ========================================
lola: ...considering subproblem: E (F (A (G (E (F (((1 <= p25) AND (1 <= p29))))))))
lola: ========================================
lola: SUBTASK
lola: checking possible liveness
lola: rewrite Frontend/Parser/formula_rewrite.k:588
lola: rewrite Frontend/Parser/formula_rewrite.k:608
lola: rewrite Frontend/Parser/formula_rewrite.k:742
lola: processed formula: ((1 <= p25) AND (1 <= p29))
lola: processed formula length: 27
lola: 52 rewrites
lola: closed formula file CTLFireability.xml
lola: STORE
lola: using a simple compression encoder (--encoder=simplecompressed)
lola: using a prefix tree store (--store=prefix)
lola: SEARCH
lola: using tscc preserving stubborn set method (--stubborn)
lola: Planning: workflow for reachability check: stateequation (--findpath=off)
lola: built state equation task
lola: Planning: workflow for reachability check: stateequation (--findpath=off)
lola: built state equation task
lola: RUNNING
lola: state equation task get result started, id 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: state equation task get result rewrite finished id 0
lola: state equation task get result unparse finished++ id 0
lola: formula 0: ((p25 <= 0) OR (p29 <= 0))
lola: state equation task get result unparse finished id 0
lola: state equation: Generated DNF with 2 literals and 2 conjunctive subformulas
lola: state equation: write sara problem file to CTLFireability-9-0.sara
lola: state equation task get result started, id 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: state equation task get result rewrite finished id 1
lola: state equation task get result unparse finished++ id 1
lola: formula 1: ((1 <= p25) AND (1 <= p29))
lola: state equation task get result unparse finished id 1
lola: state equation: Generated DNF with 2 literals and 1 conjunctive subformulas
lola: state equation: write sara problem file to CTLFireability-9-1.sara
lola: state equation: calling and running sara
sara: try reading problem file CTLFireability-9-1.sara.
sara: error: :218: error near 'TRANSITION': syntax error, unexpected KEY_TRANSITION, expecting SEMICOLON or COMMA
sara: error while reading Petri net from file -- aborting [#04]
sara: see manual for a documentation of this error
sara: last error message: No such file or directory
lola: state equation:solution unknown
lola: sara is running 0 secs || sara is running 0 secs || 1158099 markings, 2469603 edges, 231620 markings/sec, 0 secs
lola: sara is running 5 secs || sara is running 5 secs || 2238441 markings, 4923737 edges, 216068 markings/sec, 5 secs
lola: sara is running 10 secs || sara is running 10 secs || 3268522 markings, 7340670 edges, 206016 markings/sec, 10 secs
lola: sara is running 15 secs || sara is running 15 secs || 4211657 markings, 9668851 edges, 188627 markings/sec, 15 secs
lola: sara is running 20 secs || sara is running 20 secs || 5186574 markings, 12021610 edges, 194983 markings/sec, 20 secs
lola: sara is running 25 secs || sara is running 25 secs || 6097258 markings, 14307446 edges, 182137 markings/sec, 25 secs
lola: sara is running 30 secs || sara is running 30 secs || 6972336 markings, 16571991 edges, 175016 markings/sec, 30 secs
lola: sara is running 35 secs || sara is running 35 secs || 7824883 markings, 18809504 edges, 170509 markings/sec, 35 secs
lola: sara is running 40 secs || sara is running 40 secs || 8671894 markings, 21055303 edges, 169402 markings/sec, 40 secs
lola: sara is running 45 secs || sara is running 45 secs || 9551553 markings, 23330899 edges, 175932 markings/sec, 45 secs
lola: sara is running 50 secs || sara is running 50 secs || 10347815 markings, 25517780 edges, 159252 markings/sec, 50 secs
lola: sara is running 55 secs || sara is running 55 secs || 11148936 markings, 27722774 edges, 160224 markings/sec, 55 secs
lola: sara is running 60 secs || sara is running 60 secs || 11908762 markings, 29894243 edges, 151965 markings/sec, 60 secs
lola: sara is running 65 secs || sara is running 65 secs || 12724358 markings, 32095629 edges, 163119 markings/sec, 65 secs
lola: sara is running 70 secs || sara is running 70 secs || 13468097 markings, 34251131 edges, 148748 markings/sec, 70 secs
lola: sara is running 75 secs || sara is running 75 secs || 14208932 markings, 36334286 edges, 148167 markings/sec, 75 secs
lola: sara is running 80 secs || sara is running 80 secs || 14788542 markings, 38053708 edges, 115922 markings/sec, 80 secs
lola: sara is running 85 secs || sara is running 85 secs || 15437397 markings, 39823564 edges, 129771 markings/sec, 85 secs
lola: sara is running 90 secs || sara is running 90 secs || 16085635 markings, 41627043 edges, 129648 markings/sec, 90 secs
lola: sara is running 95 secs || sara is running 95 secs || 16701994 markings, 43401777 edges, 123272 markings/sec, 95 secs
lola: sara is running 100 secs || sara is running 100 secs || 17293044 markings, 45143713 edges, 118210 markings/sec, 100 secs
lola: sara is running 105 secs || sara is running 105 secs || 17905060 markings, 46908480 edges, 122403 markings/sec, 105 secs
lola: sara is running 110 secs || sara is running 110 secs || 18474147 markings, 48602888 edges, 113817 markings/sec, 110 secs
lola: sara is running 115 secs || sara is running 115 secs || 19049444 markings, 50320279 edges, 115059 markings/sec, 115 secs
lola: sara is running 120 secs || sara is running 120 secs || 19653782 markings, 52054618 edges, 120868 markings/sec, 120 secs
lola: sara is running 125 secs || sara is running 125 secs || 20241866 markings, 53789337 edges, 117617 markings/sec, 125 secs
lola: sara is running 130 secs || sara is running 130 secs || 20845780 markings, 55579081 edges, 120783 markings/sec, 130 secs
lola: sara is running 135 secs || sara is running 135 secs || 21437108 markings, 57345194 edges, 118266 markings/sec, 135 secs
lola: sara is running 140 secs || sara is running 140 secs || 22295662 markings, 59422637 edges, 171711 markings/sec, 140 secs
lola: sara is running 145 secs || sara is running 145 secs || 23204458 markings, 61542822 edges, 181759 markings/sec, 145 secs
lola: sara is running 150 secs || sara is running 150 secs || 24114358 markings, 63668859 edges, 181980 markings/sec, 150 secs
lola: sara is running 155 secs || sara is running 155 secs || 24919037 markings, 65669314 edges, 160936 markings/sec, 155 secs
lola: sara is running 160 secs || sara is running 160 secs || 25512577 markings, 67538151 edges, 118708 markings/sec, 160 secs
lola: sara is running 165 secs || sara is running 165 secs || 26109065 markings, 69395412 edges, 119298 markings/sec, 165 secs
lola: sara is running 170 secs || sara is running 170 secs || 26709319 markings, 71259787 edges, 120051 markings/sec, 170 secs
lola: sara is running 175 secs || sara is running 175 secs || 27325159 markings, 73127899 edges, 123168 markings/sec, 175 secs
lola: sara is running 180 secs || sara is running 180 secs || 27926407 markings, 75027637 edges, 120250 markings/sec, 180 secs
lola: sara is running 185 secs || sara is running 185 secs || 28517819 markings, 76931444 edges, 118282 markings/sec, 185 secs
lola: sara is running 190 secs || sara is running 190 secs || 29127628 markings, 78817796 edges, 121962 markings/sec, 190 secs
lola: sara is running 195 secs || sara is running 195 secs || 29717543 markings, 80703687 edges, 117983 markings/sec, 195 secs
lola: sara is running 200 secs || sara is running 200 secs || 30310243 markings, 82580758 edges, 118540 markings/sec, 200 secs
lola: sara is running 205 secs || sara is running 205 secs || 30902027 markings, 84468943 edges, 118357 markings/sec, 205 secs
lola: sara is running 210 secs || sara is running 210 secs || 31519816 markings, 86352766 edges, 123558 markings/sec, 210 secs
lola: sara is running 215 secs || sara is running 215 secs || 32128752 markings, 88211493 edges, 121787 markings/sec, 215 secs
lola: sara is running 220 secs || sara is running 220 secs || 32725169 markings, 90069313 edges, 119283 markings/sec, 220 secs
lola: sara is running 225 secs || sara is running 225 secs || 33312835 markings, 91902823 edges, 117533 markings/sec, 225 secs
lola: sara is running 230 secs || sara is running 230 secs || 33917444 markings, 93794084 edges, 120922 markings/sec, 230 secs
lola: sara is running 235 secs || sara is running 235 secs || 34509720 markings, 95689510 edges, 118455 markings/sec, 235 secs
lola: sara is running 240 secs || sara is running 240 secs || 35105862 markings, 97578592 edges, 119228 markings/sec, 240 secs
lola: sara is running 245 secs || sara is running 245 secs || 35700079 markings, 99466613 edges, 118843 markings/sec, 245 secs
lola: sara is running 250 secs || sara is running 250 secs || 36287743 markings, 101353503 edges, 117533 markings/sec, 250 secs
lola: sara is running 255 secs || sara is running 255 secs || 36869458 markings, 103214530 edges, 116343 markings/sec, 255 secs
lola: sara is running 260 secs || sara is running 260 secs || 37465147 markings, 105120225 edges, 119138 markings/sec, 260 secs
lola: sara is running 265 secs || sara is running 265 secs || 38036655 markings, 107012910 edges, 114302 markings/sec, 265 secs
lola: sara is running 270 secs || sara is running 270 secs || 38617298 markings, 108901476 edges, 116129 markings/sec, 270 secs
lola: sara is running 275 secs || sara is running 275 secs || 39194371 markings, 110787449 edges, 115415 markings/sec, 275 secs
lola: sara is running 280 secs || sara is running 280 secs || 39781226 markings, 112668267 edges, 117371 markings/sec, 280 secs
lola: sara is running 285 secs || sara is running 285 secs || 40360302 markings, 114551846 edges, 115815 markings/sec, 285 secs
lola: sara is running 290 secs || sara is running 290 secs || 40921393 markings, 116415856 edges, 112218 markings/sec, 290 secs
lola: sara is running 295 secs || sara is running 295 secs || 41487117 markings, 118286515 edges, 113145 markings/sec, 295 secs
lola: sara is running 300 secs || sara is running 300 secs || 42062253 markings, 120146348 edges, 115027 markings/sec, 300 secs
lola: sara is running 305 secs || sara is running 305 secs || 42700001 markings, 122029538 edges, 127550 markings/sec, 305 secs
lola: sara is running 310 secs || sara is running 310 secs || 43493152 markings, 123986644 edges, 158630 markings/sec, 310 secs
lola: sara is running 315 secs || sara is running 315 secs || 44254339 markings, 125922341 edges, 152237 markings/sec, 315 secs
lola: sara is running 320 secs || sara is running 320 secs || 44995408 markings, 127829879 edges, 148214 markings/sec, 320 secs
lola: sara is running 325 secs || sara is running 325 secs || 45633022 markings, 129786401 edges, 127523 markings/sec, 325 secs
lola: sara is running 330 secs || sara is running 330 secs || 46222171 markings, 131707180 edges, 117830 markings/sec, 330 secs
lola: sara is running 335 secs || sara is running 335 secs || 46792320 markings, 133608718 edges, 114030 markings/sec, 335 secs
lola: sara is running 340 secs || sara is running 340 secs || 47381469 markings, 135520934 edges, 117830 markings/sec, 340 secs
lola: sara is running 345 secs || sara is running 345 secs || 47961640 markings, 137422734 edges, 116034 markings/sec, 345 secs
lola: sara is running 350 secs || sara is running 350 secs || 48542754 markings, 139310001 edges, 116223 markings/sec, 350 secs
lola: sara is running 355 secs || sara is running 355 secs || 49114854 markings, 141214992 edges, 114420 markings/sec, 355 secs
lola: sara is running 360 secs || sara is running 360 secs || 49697281 markings, 143104987 edges, 116485 markings/sec, 360 secs
lola: sara is running 365 secs || sara is running 365 secs || 50329492 markings, 145032253 edges, 126442 markings/sec, 365 secs
lola: sara is running 370 secs || sara is running 370 secs || 50895772 markings, 146934794 edges, 113256 markings/sec, 370 secs
lola: sara is running 375 secs || sara is running 375 secs || 51466266 markings, 148828094 edges, 114099 markings/sec, 375 secs
lola: sara is running 380 secs || sara is running 380 secs || 52028776 markings, 150720532 edges, 112502 markings/sec, 380 secs
lola: sara is running 385 secs || sara is running 385 secs || 52588558 markings, 152621434 edges, 111956 markings/sec, 385 secs
lola: sara is running 390 secs || sara is running 390 secs || 53160016 markings, 154515276 edges, 114292 markings/sec, 390 secs
lola: sara is running 395 secs || sara is running 395 secs || 53720234 markings, 156401710 edges, 112044 markings/sec, 395 secs
lola: sara is running 400 secs || sara is running 400 secs || 54297122 markings, 158294629 edges, 115378 markings/sec, 400 secs
lola: sara is running 405 secs || sara is running 405 secs || 54863620 markings, 160190075 edges, 113300 markings/sec, 405 secs
lola: sara is running 410 secs || sara is running 410 secs || 55417214 markings, 162087446 edges, 110719 markings/sec, 410 secs
lola: sara is running 415 secs || sara is running 415 secs || 55998908 markings, 163991735 edges, 116339 markings/sec, 415 secs
lola: sara is running 420 secs || sara is running 420 secs || 56553543 markings, 165878349 edges, 110927 markings/sec, 420 secs
lola: sara is running 425 secs || sara is running 425 secs || 57123261 markings, 167800327 edges, 113944 markings/sec, 425 secs
lola: sara is running 430 secs || sara is running 430 secs || 57703527 markings, 169730576 edges, 116053 markings/sec, 430 secs
lola: sara is running 435 secs || sara is running 435 secs || 58270713 markings, 171680146 edges, 113437 markings/sec, 435 secs
lola: sara is running 440 secs || sara is running 440 secs || 58840085 markings, 173622896 edges, 113874 markings/sec, 440 secs
lola: sara is running 445 secs || sara is running 445 secs || 59398150 markings, 175559250 edges, 111613 markings/sec, 445 secs
lola: sara is running 450 secs || sara is running 450 secs || 59960799 markings, 177491682 edges, 112530 markings/sec, 450 secs
lola: sara is running 455 secs || sara is running 455 secs || 60516604 markings, 179412568 edges, 111161 markings/sec, 455 secs
lola: sara is running 460 secs || sara is running 460 secs || 61071009 markings, 181318839 edges, 110881 markings/sec, 460 secs
lola: sara is running 465 secs || sara is running 465 secs || 61656126 markings, 183242469 edges, 117023 markings/sec, 465 secs
lola: sara is running 470 secs || sara is running 470 secs || 62215094 markings, 185172602 edges, 111794 markings/sec, 470 secs
lola: sara is running 475 secs || sara is running 475 secs || 62779471 markings, 187125282 edges, 112875 markings/sec, 475 secs
lola: sara is running 480 secs || sara is running 480 secs || 63408234 markings, 189117831 edges, 125753 markings/sec, 480 secs
lola: sara is running 485 secs || sara is running 485 secs || 64107106 markings, 191193384 edges, 139774 markings/sec, 485 secs
lola: sara is running 490 secs || sara is running 490 secs || 64832042 markings, 193288485 edges, 144987 markings/sec, 490 secs
lola: sara is running 495 secs || sara is running 495 secs || 65429455 markings, 195268652 edges, 119483 markings/sec, 495 secs
lola: sara is running 500 secs || sara is running 500 secs || 66082242 markings, 197297653 edges, 130557 markings/sec, 500 secs
lola: local time limit reached - aborting
lola:
preliminary result: no unknown unknown unknown no yes yes unknown yes no yes unknown unknown unknown no no
lola: memory consumption: 6668548 KB
lola: time consumption: 516 seconds
lola: print data as JSON (--json)
lola: writing JSON to CTLFireability.json
lola: closed JSON file CTLFireability.json
lola: time limit reached - aborting
lola:
preliminary result: no unknown unknown unknown no yes yes unknown yes no yes unknown unknown unknown no no
lola:
preliminary result: no unknown unknown unknown no yes yes unknown yes no yes unknown unknown unknown no no
lola: memory consumption: 294856 KB
lola: time consumption: 3570 seconds
lola: print data as JSON (--json)
lola: writing JSON to CTLFireability.json
lola: closed JSON file CTLFireability.json
rslt: finished
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16427332 kB
MemFree: 15865268 kB
After kill :
MemTotal: 16427332 kB
MemFree: 15865268 kB
--------------------
content from stderr:
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CSRepetitions-PT-04"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itslola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itslola"
echo " Input is CSRepetitions-PT-04, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r182-oct2-158987914200676"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/CSRepetitions-PT-04.tgz
mv CSRepetitions-PT-04 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;