fond
Model Checking Contest 2020
10th edition, Paris, France, June 23, 2020
Execution of r180-ebro-158987900400572
Last Updated
Jun 28, 2020

About the Execution of ITS-LoLa for DLCround-PT-10b

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15756.950 3600000.00 3651467.00 3480.40 TT?FF?TTTFTTTFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2020-input.r180-ebro-158987900400572.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2020-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.........................
=====================================================================
Generated by BenchKit 2-4028
Executing tool itslola
Input is DLCround-PT-10b, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r180-ebro-158987900400572
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.7M
-rw-r--r-- 1 mcc users 3.8K Mar 30 19:59 CTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Mar 30 19:59 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Mar 29 09:57 CTLFireability.txt
-rw-r--r-- 1 mcc users 15K Mar 29 09:57 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 24 05:37 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K Mar 24 05:37 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Apr 8 14:51 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Apr 28 14:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K Apr 8 14:51 LTLFireability.txt
-rw-r--r-- 1 mcc users 14K Apr 28 14:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.2K Mar 28 05:41 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K Mar 28 05:41 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.2K Mar 27 00:08 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 21K Mar 27 00:08 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 28 14:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 28 14:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 24 05:37 instance
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 iscolored
-rw-r--r-- 1 mcc users 1.5M Mar 24 05:37 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-10b-CTLFireability-00
FORMULA_NAME DLCround-PT-10b-CTLFireability-01
FORMULA_NAME DLCround-PT-10b-CTLFireability-02
FORMULA_NAME DLCround-PT-10b-CTLFireability-03
FORMULA_NAME DLCround-PT-10b-CTLFireability-04
FORMULA_NAME DLCround-PT-10b-CTLFireability-05
FORMULA_NAME DLCround-PT-10b-CTLFireability-06
FORMULA_NAME DLCround-PT-10b-CTLFireability-07
FORMULA_NAME DLCround-PT-10b-CTLFireability-08
FORMULA_NAME DLCround-PT-10b-CTLFireability-09
FORMULA_NAME DLCround-PT-10b-CTLFireability-10
FORMULA_NAME DLCround-PT-10b-CTLFireability-11
FORMULA_NAME DLCround-PT-10b-CTLFireability-12
FORMULA_NAME DLCround-PT-10b-CTLFireability-13
FORMULA_NAME DLCround-PT-10b-CTLFireability-14
FORMULA_NAME DLCround-PT-10b-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1591252359901

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
[2020-06-04 06:32:42] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -timeout, 3600, -rebuildPNML]
[2020-06-04 06:32:42] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2020-06-04 06:32:43] [INFO ] Load time of PNML (sax parser for PT used): 557 ms
[2020-06-04 06:32:43] [INFO ] Transformed 3924 places.
[2020-06-04 06:32:43] [INFO ] Transformed 6192 transitions.
[2020-06-04 06:32:43] [INFO ] Found NUPN structural information;
[2020-06-04 06:32:43] [INFO ] Parsed PT model containing 3924 places and 6192 transitions in 802 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 435 ms.
Incomplete random walk after 100000 steps, including 0 resets, run finished after 1393 ms. (steps per millisecond=71 ) properties seen :[1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 0, 1, 0, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0]
// Phase 1: matrix 6192 rows 3924 cols
[2020-06-04 06:32:45] [INFO ] Computed 213 place invariants in 163 ms
[2020-06-04 06:32:47] [INFO ] [Real]Absence check using 213 positive place invariants in 1091 ms returned sat
[2020-06-04 06:32:47] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-06-04 06:33:05] [INFO ] [Real]Absence check using state equation in 17980 ms returned (error "Solver has unexpectedly terminated")
[2020-06-04 06:33:07] [INFO ] [Real]Absence check using 213 positive place invariants in 1030 ms returned sat
[2020-06-04 06:33:07] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-06-04 06:33:25] [INFO ] SMT solver returned unknown. Retrying;
[2020-06-04 06:33:25] [INFO ] [Real]Absence check using state equation in 18285 ms returned (error "Failed to check-sat")
[2020-06-04 06:33:27] [INFO ] [Real]Absence check using 213 positive place invariants in 1096 ms returned sat
[2020-06-04 06:33:27] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-06-04 06:33:45] [INFO ] SMT solver returned unknown. Retrying;
[2020-06-04 06:33:45] [INFO ] [Real]Absence check using state equation in 18188 ms returned unknown
[2020-06-04 06:33:47] [INFO ] [Real]Absence check using 213 positive place invariants in 1026 ms returned sat
[2020-06-04 06:33:47] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-06-04 06:34:05] [INFO ] SMT solver returned unknown. Retrying;
[2020-06-04 06:34:05] [INFO ] [Real]Absence check using state equation in 18289 ms returned unknown
[2020-06-04 06:34:07] [INFO ] [Real]Absence check using 213 positive place invariants in 1082 ms returned sat
[2020-06-04 06:34:07] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-06-04 06:34:25] [INFO ] SMT solver returned unknown. Retrying;
[2020-06-04 06:34:25] [INFO ] [Real]Absence check using state equation in 18228 ms returned (error "Failed to check-sat")
[2020-06-04 06:34:27] [INFO ] [Real]Absence check using 213 positive place invariants in 997 ms returned sat
[2020-06-04 06:34:27] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-06-04 06:34:45] [INFO ] SMT solver returned unknown. Retrying;
[2020-06-04 06:34:45] [INFO ] [Real]Absence check using state equation in 18263 ms returned (error "Failed to check-sat")
[2020-06-04 06:34:47] [INFO ] Flatten gal took : 705 ms
[2020-06-04 06:34:47] [INFO ] Flatten gal took : 371 ms
[2020-06-04 06:34:47] [INFO ] Export to MCC properties in file /home/mcc/execution/CTLFireability.sr.xml took 11 ms.
[2020-06-04 06:34:47] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml took 92 ms.
info: Time: 3600 - MCC
vrfy: Checking CTLFireability @ DLCround-PT-10b @ 3570 seconds

FORMULA DLCround-PT-10b-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA DLCround-PT-10b-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16427456 kB
MemFree: 259564 kB
After kill :
MemTotal: 16427456 kB
MemFree: 16134996 kB

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-10b"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itslola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itslola"
echo " Input is DLCround-PT-10b, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r180-ebro-158987900400572"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-10b.tgz
mv DLCround-PT-10b execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;