About the Execution of ITS-LoLa for DLCshifumi-PT-4a
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
15743.210 | 1800000.00 | 7754.00 | 32.80 | F | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/mnt/tpsp/fkordon/mcc2020-input.r179-tajo-158987887200021.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2020-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.....................
=====================================================================
Generated by BenchKit 2-4028
Executing tool itslola
Input is DLCshifumi-PT-4a, examination is ReachabilityDeadlock
Time confinement is 1800 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r179-tajo-158987887200021
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.1M
-rw-r--r-- 1 mcc users 3.4K Mar 30 23:35 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K Mar 30 23:35 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Mar 29 12:51 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K Mar 29 12:51 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 24 05:37 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 3.5K Apr 8 14:51 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Apr 28 14:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K Apr 8 14:51 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Apr 28 14:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Mar 28 08:40 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K Mar 28 08:40 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Mar 27 02:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 11K Mar 27 02:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Mar 28 14:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 28 14:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 24 05:37 instance
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 iscolored
-rw-r--r-- 1 mcc users 1.9M Mar 24 05:37 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
FORMULA_NAME ReachabilityDeadlock
=== Now, execution of the tool begins
BK_START 1591280760142
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
[2020-06-04 14:26:01] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityDeadlock, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -timeout, 1800, -rebuildPNML]
[2020-06-04 14:26:01] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2020-06-04 14:26:02] [INFO ] Load time of PNML (sax parser for PT used): 251 ms
[2020-06-04 14:26:02] [INFO ] Transformed 1178 places.
[2020-06-04 14:26:02] [INFO ] Transformed 7504 transitions.
[2020-06-04 14:26:02] [INFO ] Found NUPN structural information;
[2020-06-04 14:26:02] [INFO ] Parsed PT model containing 1178 places and 7504 transitions in 325 ms.
Ensure Unique test removed 924 transitions
Reduce redundant transitions removed 924 transitions.
Parsed 1 properties from file /home/mcc/execution/ReachabilityDeadlock.xml in 53 ms.
Working with output stream class java.io.PrintStream
Built sparse matrix representations for Structural reductions in 10 ms.21155KB memory used
Starting structural reductions, iteration 0 : 1178/1178 places, 6580/6580 transitions.
Graph (trivial) has 735 edges and 1178 vertex of which 166 / 1178 are part of one of the 79 SCC in 7 ms
Free SCC test removed 87 places
Ensure Unique test removed 1094 transitions
Reduce isomorphic transitions removed 1094 transitions.
Performed 75 Post agglomeration using F-continuation condition.Transition count delta: 75
Iterating post reduction 0 with 1169 rules applied. Total rules applied 1170 place count 1091 transition count 5411
Reduce places removed 75 places and 0 transitions.
Iterating post reduction 1 with 75 rules applied. Total rules applied 1245 place count 1016 transition count 5411
Performed 79 Post agglomeration using F-continuation condition.Transition count delta: 79
Deduced a syphon composed of 79 places in 10 ms
Reduce places removed 79 places and 0 transitions.
Iterating global reduction 2 with 158 rules applied. Total rules applied 1403 place count 937 transition count 5332
Ensure Unique test removed 612 transitions
Reduce isomorphic transitions removed 612 transitions.
Iterating post reduction 2 with 612 rules applied. Total rules applied 2015 place count 937 transition count 4720
Performed 75 Post agglomeration using F-continuation condition.Transition count delta: -150
Deduced a syphon composed of 75 places in 2 ms
Reduce places removed 75 places and 0 transitions.
Iterating global reduction 3 with 150 rules applied. Total rules applied 2165 place count 862 transition count 4870
Drop transitions removed 2160 transitions
Redundant transition composition rules discarded 2160 transitions
Iterating global reduction 3 with 2160 rules applied. Total rules applied 4325 place count 862 transition count 2710
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 3 with 1 rules applied. Total rules applied 4326 place count 861 transition count 2709
Reduce places removed 612 places and 0 transitions.
Ensure Unique test removed 2132 transitions
Reduce isomorphic transitions removed 2132 transitions.
Graph (trivial) has 577 edges and 249 vertex of which 249 / 249 are part of one of the 79 SCC in 0 ms
Free SCC test removed 170 places
Iterating post reduction 3 with 2745 rules applied. Total rules applied 7071 place count 79 transition count 577
Reduce places removed 79 places and 0 transitions.
Ensure Unique test removed 576 transitions
Reduce isomorphic transitions removed 576 transitions.
FORMULA ReachabilityDeadlock FALSE TECHNIQUES TOPOLOGICAL STRUCTURAL_REDUCTION
--------------------
content from stderr:
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCshifumi-PT-4a"
export BK_EXAMINATION="ReachabilityDeadlock"
export BK_TOOL="itslola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="1800"
export BK_MEMORY_CONFINEMENT="16384"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itslola"
echo " Input is DLCshifumi-PT-4a, examination is ReachabilityDeadlock"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r179-tajo-158987887200021"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/DLCshifumi-PT-4a.tgz
mv DLCshifumi-PT-4a execution
cd execution
if [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "UpperBounds" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] || [ "ReachabilityDeadlock" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityDeadlock" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityDeadlock" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityDeadlock.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityDeadlock.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityDeadlock.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityDeadlock" = "ReachabilityDeadlock" ] || [ "ReachabilityDeadlock" = "QuasiLiveness" ] || [ "ReachabilityDeadlock" = "StableMarking" ] || [ "ReachabilityDeadlock" = "Liveness" ] || [ "ReachabilityDeadlock" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityDeadlock"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;