Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2020-input.r153-oct2-158972909600036.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2020-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.........................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool smart
Input is RefineWMG-PT-007007, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 1
Run identifier is r153-oct2-158972909600036
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 192K
-rw-r--r-- 1 mcc users 3.1K Apr 12 10:53 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K Apr 12 10:53 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 11 11:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 11 11:58 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 24 05:38 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.8K Mar 24 05:38 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.9K Apr 14 12:48 LTLCardinality.txt
-rw-r--r-- 1 mcc users 21K Apr 28 14:02 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K Apr 14 12:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 28 14:02 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.0K Apr 10 16:31 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K Apr 10 16:31 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 9 22:55 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K Apr 9 22:55 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.4K Apr 10 22:28 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.4K Apr 10 22:28 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 24 05:38 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 24 05:38 instance
-rw-r--r-- 1 mcc users 6 Mar 24 05:38 iscolored
-rw-r--r-- 1 mcc users 18K Mar 24 05:38 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME n0-CTLFireability-00
FORMULA_NAME n0-CTLFireability-01
FORMULA_NAME n0-CTLFireability-02
FORMULA_NAME n0-CTLFireability-03
FORMULA_NAME n0-CTLFireability-04
FORMULA_NAME n0-CTLFireability-05
FORMULA_NAME n0-CTLFireability-06
FORMULA_NAME n0-CTLFireability-07
FORMULA_NAME n0-CTLFireability-08
FORMULA_NAME n0-CTLFireability-09
FORMULA_NAME n0-CTLFireability-10
FORMULA_NAME n0-CTLFireability-11
FORMULA_NAME n0-CTLFireability-12
FORMULA_NAME n0-CTLFireability-13
FORMULA_NAME n0-CTLFireability-14
FORMULA_NAME n0-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1589740469112

======================================================
========== this is Smart for the MCC'2018 ============
======================================================
Running RefineWMG (PT), instance 007007
Examination CTLFireability
Parser /home/mcc/BenchKit/bin/parser/CTLFire.jar
Model checker /home/mcc/BenchKit/bin/rem_exec/smart

GOT IT HERE. BS
Petri model created: 39 places, 31 transitions, 92 arcs.
AT ITER 0 NEW BEST:: SOT 660 SOS 174 HAS SOPS 174 HAS SOUS 156 HAS SOUPS 156 WITH SCORE 156.174
AT ITER 29 NEW BEST:: SOT 658 SOS 170 HAS SOPS 170 HAS SOUS 152 HAS SOUPS 152 WITH SCORE 152.17
AT ITER 75 NEW BEST:: SOT 657 SOS 168 HAS SOPS 168 HAS SOUS 150 HAS SOUPS 150 WITH SCORE 150.168
AT ITER 80 NEW BEST:: SOT 656 SOS 166 HAS SOPS 166 HAS SOUS 148 HAS SOUPS 148 WITH SCORE 148.166
AT ITER 126 NEW BEST:: SOT 655 SOS 164 HAS SOPS 164 HAS SOUS 146 HAS SOUPS 146 WITH SCORE 146.164
AT ITER 174 NEW BEST:: SOT 653 SOS 159 HAS SOPS 159 HAS SOUS 143 HAS SOUPS 143 WITH SCORE 143.159
AT ITER 393 NEW BEST:: SOT 652 SOS 157 HAS SOPS 157 HAS SOUS 141 HAS SOUPS 141 WITH SCORE 141.157
AT ITER 462 NEW BEST:: SOT 651 SOS 155 HAS SOPS 155 HAS SOUS 139 HAS SOUPS 139 WITH SCORE 139.155
AT ITER 536 NEW BEST:: SOT 650 SOS 153 HAS SOPS 153 HAS SOUS 137 HAS SOUPS 137 WITH SCORE 137.153
AT ITER 544 NEW BEST:: SOT 648 SOS 148 HAS SOPS 148 HAS SOUS 134 HAS SOUPS 134 WITH SCORE 134.148
AT ITER 546 NEW BEST:: SOT 648 SOS 146 HAS SOPS 146 HAS SOUS 134 HAS SOUPS 134 WITH SCORE 134.146
AT ITER 569 NEW BEST:: SOT 648 SOS 144 HAS SOPS 144 HAS SOUS 134 HAS SOUPS 134 WITH SCORE 134.144
AT ITER 667 NEW BEST:: SOT 648 SOS 143 HAS SOPS 143 HAS SOUS 133 HAS SOUPS 133 WITH SCORE 133.143
AT ITER 714 NEW BEST:: SOT 648 SOS 142 HAS SOPS 142 HAS SOUS 132 HAS SOUPS 132 WITH SCORE 132.142
AT ITER 943 NEW BEST:: SOT 649 SOS 141 HAS SOPS 141 HAS SOUS 131 HAS SOUPS 131 WITH SCORE 131.141
AT ITER 1021 NEW BEST:: SOT 649 SOS 140 HAS SOPS 140 HAS SOUS 130 HAS SOUPS 130 WITH SCORE 130.14
AT ITER 1040 NEW BEST:: SOT 648 SOS 138 HAS SOPS 138 HAS SOUS 128 HAS SOUPS 128 WITH SCORE 128.138
AT ITER 1106 NEW BEST:: SOT 648 SOS 136 HAS SOPS 136 HAS SOUS 128 HAS SOUPS 128 WITH SCORE 128.136
AT ITER 1157 NEW BEST:: SOT 647 SOS 135 HAS SOPS 135 HAS SOUS 127 HAS SOUPS 127 WITH SCORE 127.135
AT ITER 1177 NEW BEST:: SOT 647 SOS 134 HAS SOPS 134 HAS SOUS 126 HAS SOUPS 126 WITH SCORE 126.134
AT ITER 1507 NEW BEST:: SOT 647 SOS 132 HAS SOPS 132 HAS SOUS 124 HAS SOUPS 124 WITH SCORE 124.132
AT ITER 2081 NEW BEST:: SOT 646 SOS 130 HAS SOPS 130 HAS SOUS 122 HAS SOUPS 122 WITH SCORE 122.13
Bounds file is: CTLFireability.xml
PROPERTY: n0-CTLFireability-00 ( (AG( ((potential((tk(P33)>=1)))))) | ((potential((tk(P22)>=1) & (tk(P23)>=1) & (tk(P25)>=1)))) )
PROPERTY: n0-CTLFireability-01 ( ((potential((tk(P33)>=1)))) & (AG( ( ( (! ((potential((tk(P6)>=1))))) & (! ((potential((tk(P21)>=1))))) ) | ( ((potential((tk(P23)>=1)))) & ( ((potential((tk(P36)>=1)))) | ((potential((tk(P32)>=1) & (tk(P33)>=1) & (tk(P35)>=1)))) ) ) ))) )
PROPERTY: n0-CTLFireability-02 (AG( (AG( ( ( ((potential((tk(P18)>=1)))) | ((potential((tk(P5)>=5)))) ) | (! ((potential((tk(P8)>=1))))) )))))
PROPERTY: n0-CTLFireability-03 ( (! (EF( (EX( ((potential((tk(P7)>=1) & (tk(P8)>=1) & (tk(P10)>=1))))))))) & ( (EF( (! ( ((potential((tk(P16)>=1)))) & ((potential((tk(P9)>=1)))) )))) & (! ( ( ((potential((tk(P31)>=1)))) & ((potential((tk(P3)>=2) & (tk(P2)>=2)))) ) & ( ((potential((tk(P38)>=1)))) & ((potential((tk(P37)>=1) & (tk(P38)>=1) & (tk(P1)>=1)))) ) )) ) )
PROPERTY: n0-CTLFireability-04 (EU( (AX( ((potential((tk(P36)>=1)))))) , (! (AG( ((potential((tk(P38)>=1))))))) ))
PROPERTY: n0-CTLFireability-05 (EU( (EF( ( ((potential((tk(P5)>=5)))) & ((potential((tk(P27)>=1) & (tk(P28)>=1) & (tk(P30)>=1)))) ))) , (EX( ((potential((tk(P16)>=1)))))) ))
PROPERTY: n0-CTLFireability-06 (AG( ( ((potential((tk(P12)>=1) & (tk(P13)>=1) & (tk(P15)>=1)))) | ( (EX( ((potential((tk(P16)>=1)))))) | ( ( ((potential((tk(P38)>=1)))) | ((potential((tk(P9)>=1)))) ) & ( ((potential((tk(P13)>=1)))) | ((potential((tk(P23)>=1)))) ) ) ) )))
PROPERTY: n0-CTLFireability-07 (AG( (EF( (! ( ((potential((tk(P11)>=1)))) & ((potential((tk(P5)>=5)))) ))))))
PROPERTY: n0-CTLFireability-08 ( ( ( ((potential((tk(P7)>=1) & (tk(P8)>=1) & (tk(P10)>=1)))) | ( (! (! ((potential((tk(P4)>=3)))))) & ((potential((tk(P21)>=1)))) ) ) & ( (! (! (! ((potential((tk(P39)>=1))))))) | ( ( ( ((potential((tk(P4)>=3)))) | ((potential((tk(P6)>=1)))) ) | ( ((potential((tk(P21)>=1)))) & ((potential((tk(P17)>=1) & (tk(P18)>=1) & (tk(P20)>=1)))) ) ) | (AG( ((potential((tk(P17)>=1) & (tk(P18)>=1) & (tk(P20)>=1)))))) ) ) ) | (! (EF( (! (! ((potential((tk(P7)>=1) & (tk(P8)>=1) & (tk(P10)>=1))))))))) )
PROPERTY: n0-CTLFireability-09 (EF( (AX( ((potential((tk(P22)>=1) & (tk(P23)>=1) & (tk(P25)>=1))))))))
PROPERTY: n0-CTLFireability-10 ( ((potential((tk(P7)>=1) & (tk(P8)>=1) & (tk(P10)>=1)))) | (AG( ( (EF( ((potential((tk(P32)>=1) & (tk(P33)>=1) & (tk(P35)>=1)))))) & ((potential((tk(P18)>=1)))) ))) )
PROPERTY: n0-CTLFireability-11 ( (EU( (AG( ((potential((tk(P28)>=1)))))) , ((potential((tk(P36)>=1)))) )) | (AU( ( ((potential((tk(P27)>=1) & (tk(P28)>=1) & (tk(P30)>=1)))) | ((potential((tk(P29)>=1)))) ) , (AX( ((potential((tk(P27)>=1) & (tk(P28)>=1) & (tk(P30)>=1)))))) )) )
PROPERTY: n0-CTLFireability-12 ( (EF( (AG( (! ((potential((tk(P38)>=1))))))))) | (EF( ( ( (! ((potential((tk(P13)>=1))))) & ((potential((tk(P16)>=1)))) ) & ( ((potential((tk(P12)>=1) & (tk(P13)>=1) & (tk(P15)>=1)))) | (! ((potential((tk(P16)>=1))))) ) ))) )
PROPERTY: n0-CTLFireability-13 (EF( (AG( ( ( ((potential((tk(P16)>=1)))) & ((potential((tk(P37)>=1) & (tk(P38)>=1) & (tk(P1)>=1)))) ) | ( ((potential((tk(P34)>=1)))) | ((potential((tk(P14)>=1)))) ) )))))
PROPERTY: n0-CTLFireability-14 (EU( (! ((potential((tk(P29)>=1))))) , ( (AG( ((potential((tk(P16)>=1)))))) & ((potential((tk(P38)>=1)))) ) ))
PROPERTY: n0-CTLFireability-15 ( (EU( ( ((potential((tk(P23)>=1)))) & ((potential((tk(P36)>=1)))) ) , ( ( ((potential((tk(P3)>=2) & (tk(P2)>=2)))) | ((potential((tk(P37)>=1) & (tk(P38)>=1) & (tk(P1)>=1)))) ) & ( ((potential((tk(P18)>=1)))) | ((potential((tk(P32)>=1) & (tk(P33)>=1) & (tk(P35)>=1)))) ) ) )) & (EU( ((potential((tk(P28)>=1)))) , (! ((potential((tk(P38)>=1))))) )) )
FORMULA n0-CTLFireability-00 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA n0-CTLFireability-01 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA n0-CTLFireability-02 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA n0-CTLFireability-03 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA n0-CTLFireability-04 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA n0-CTLFireability-05 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA n0-CTLFireability-06 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA n0-CTLFireability-07 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA n0-CTLFireability-08 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RefineWMG-PT-007007"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="smart"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool smart"
echo " Input is RefineWMG-PT-007007, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 1"
echo " Run identifier is r153-oct2-158972909600036"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RefineWMG-PT-007007.tgz
mv RefineWMG-PT-007007 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;