Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2020-input.r153-oct2-158972909600020.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2020-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool smart
Input is RefineWMG-PT-005005, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 1
Run identifier is r153-oct2-158972909600020
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 196K
-rw-r--r-- 1 mcc users 2.9K Apr 12 10:52 CTLCardinality.txt
-rw-r--r-- 1 mcc users 17K Apr 12 10:52 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Apr 11 11:57 CTLFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 11 11:57 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 24 05:38 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.8K Mar 24 05:38 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K Apr 14 12:48 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 28 14:02 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K Apr 14 12:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Apr 28 14:02 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.2K Apr 10 16:31 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K Apr 10 16:31 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Apr 9 22:55 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 22K Apr 9 22:55 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.4K Apr 10 22:28 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.4K Apr 10 22:28 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 24 05:38 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 24 05:38 instance
-rw-r--r-- 1 mcc users 6 Mar 24 05:38 iscolored
-rw-r--r-- 1 mcc users 14K Mar 24 05:38 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME n0-CTLFireability-00
FORMULA_NAME n0-CTLFireability-01
FORMULA_NAME n0-CTLFireability-02
FORMULA_NAME n0-CTLFireability-03
FORMULA_NAME n0-CTLFireability-04
FORMULA_NAME n0-CTLFireability-05
FORMULA_NAME n0-CTLFireability-06
FORMULA_NAME n0-CTLFireability-07
FORMULA_NAME n0-CTLFireability-08
FORMULA_NAME n0-CTLFireability-09
FORMULA_NAME n0-CTLFireability-10
FORMULA_NAME n0-CTLFireability-11
FORMULA_NAME n0-CTLFireability-12
FORMULA_NAME n0-CTLFireability-13
FORMULA_NAME n0-CTLFireability-14
FORMULA_NAME n0-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1589740475358

======================================================
========== this is Smart for the MCC'2018 ============
======================================================
Running RefineWMG (PT), instance 005005
Examination CTLFireability
Parser /home/mcc/BenchKit/bin/parser/CTLFire.jar
Model checker /home/mcc/BenchKit/bin/rem_exec/smart

GOT IT HERE. BS
Petri model created: 29 places, 23 transitions, 68 arcs.
AT ITER 0 NEW BEST:: SOT 372 SOS 120 HAS SOPS 120 HAS SOUS 108 HAS SOUPS 108 WITH SCORE 108.12
AT ITER 4 NEW BEST:: SOT 370 SOS 118 HAS SOPS 118 HAS SOUS 106 HAS SOUPS 106 WITH SCORE 106.118
AT ITER 7 NEW BEST:: SOT 369 SOS 115 HAS SOPS 115 HAS SOUS 103 HAS SOUPS 103 WITH SCORE 103.115
AT ITER 38 NEW BEST:: SOT 368 SOS 113 HAS SOPS 113 HAS SOUS 101 HAS SOUPS 101 WITH SCORE 101.113
AT ITER 101 NEW BEST:: SOT 367 SOS 112 HAS SOPS 112 HAS SOUS 100 HAS SOUPS 100 WITH SCORE 100.112
AT ITER 123 NEW BEST:: SOT 366 SOS 110 HAS SOPS 110 HAS SOUS 98 HAS SOUPS 98 WITH SCORE 98.11
AT ITER 189 NEW BEST:: SOT 366 SOS 109 HAS SOPS 109 HAS SOUS 97 HAS SOUPS 97 WITH SCORE 97.109
AT ITER 239 NEW BEST:: SOT 365 SOS 107 HAS SOPS 107 HAS SOUS 95 HAS SOUPS 95 WITH SCORE 95.107
AT ITER 252 NEW BEST:: SOT 363 SOS 102 HAS SOPS 102 HAS SOUS 92 HAS SOUPS 92 WITH SCORE 92.102
AT ITER 302 NEW BEST:: SOT 363 SOS 100 HAS SOPS 100 HAS SOUS 92 HAS SOUPS 92 WITH SCORE 92.1
AT ITER 897 NEW BEST:: SOT 362 SOS 98 HAS SOPS 98 HAS SOUS 90 HAS SOUPS 90 WITH SCORE 90.098
AT ITER 1143 NEW BEST:: SOT 362 SOS 96 HAS SOPS 96 HAS SOUS 90 HAS SOUPS 90 WITH SCORE 90.096
Bounds file is: CTLFireability.xml
PROPERTY: n0-CTLFireability-00 ( (EF( ( (! ( ((potential((tk(P12)>=1) & (tk(P13)>=1) & (tk(P15)>=1)))) | ((potential((tk(P23)>=1)))) )) & ( (! ((potential((tk(P9)>=1))))) & ( ((potential((tk(P29)>=1)))) & ((potential((tk(P11)>=1)))) ) ) ))) & (EU( ((potential((tk(P23)>=1)))) , (AX( ((potential((tk(P4)>=3)))))) )) )
PROPERTY: n0-CTLFireability-01 (AG( (EX( (! ( ((potential((tk(P16)>=1)))) & ((potential((tk(P18)>=1)))) ))))))
PROPERTY: n0-CTLFireability-02 ( ( ( (AG( ( ((potential((tk(P22)>=1) & (tk(P23)>=1) & (tk(P25)>=1)))) | ((potential((tk(P28)>=1)))) ))) & ( (EX( ((potential((tk(P4)>=3)))))) | ( ((potential((tk(P11)>=1)))) & ( ((potential((tk(P28)>=1)))) & ((potential((tk(P14)>=1)))) ) ) ) ) | (EF( (AG( ((potential((tk(P29)>=1)))))))) ) | ((potential((tk(P14)>=1)))) )
PROPERTY: n0-CTLFireability-03 (AG( ( (AG( ( ((potential((tk(P26)>=1)))) & ((potential((tk(P19)>=1)))) ))) | ( ((potential((tk(P26)>=1)))) | (! ( ((potential((tk(P22)>=1) & (tk(P23)>=1) & (tk(P25)>=1)))) & ((potential((tk(P6)>=1)))) )) ) )))
PROPERTY: n0-CTLFireability-04 (AG( (EX( (EF( ((potential((tk(P19)>=1))))))))))
PROPERTY: n0-CTLFireability-05 ( (EU( ( ( ((potential((tk(P6)>=1)))) & ((potential((tk(P28)>=1)))) ) | (! ((potential((tk(P29)>=1))))) ) , ( ( ((potential((tk(P9)>=1)))) & ((potential((tk(P16)>=1)))) ) & ( ((potential((tk(P11)>=1)))) | ((potential((tk(P13)>=1)))) ) ) )) | ( ((potential((tk(P5)>=5)))) | (! (EF( ( ((potential((tk(P19)>=1)))) | ((potential((tk(P21)>=1)))) )))) ) )
PROPERTY: n0-CTLFireability-06 (EF( (AX( (AG( ((potential((tk(P12)>=1) & (tk(P13)>=1) & (tk(P15)>=1))))))))))
PROPERTY: n0-CTLFireability-07 (AF( (! (EF( ((potential((tk(P5)>=5)))))))))
PROPERTY: n0-CTLFireability-08 ( ( (AG( (EF( ((potential((tk(P11)>=1)))))))) & ((potential((tk(P18)>=1)))) ) | ( (AF( (! ((potential((tk(P16)>=1))))))) & ((potential((tk(P14)>=1)))) ) )
PROPERTY: n0-CTLFireability-09 (! (EU( (! (! ((potential((tk(P28)>=1)))))) , (AG( ((potential((tk(P14)>=1)))))) )))
PROPERTY: n0-CTLFireability-10 ( (! (EU( (! ((potential((tk(P22)>=1) & (tk(P23)>=1) & (tk(P25)>=1))))) , ( ((potential((tk(P12)>=1) & (tk(P13)>=1) & (tk(P15)>=1)))) & ((potential((tk(P13)>=1)))) ) ))) & ( ( (AF( ( ((potential((tk(P24)>=1)))) | ((potential((tk(P21)>=1)))) ))) & (! ( ( ((potential((tk(P7)>=1) & (tk(P8)>=1) & (tk(P10)>=1)))) & ((potential((tk(P23)>=1)))) ) | (! ((potential((tk(P26)>=1))))) )) ) | ( ( ( ( ((potential((tk(P9)>=1)))) & ((potential((tk(P24)>=1)))) ) | ( ((potential((tk(P18)>=1)))) & ((potential((tk(P16)>=1)))) ) ) & ( ( ((potential((tk(P19)>=1)))) & ((potential((tk(P13)>=1)))) ) & ((potential((tk(P9)>=1)))) ) ) | ( (AF( ((potential((tk(P26)>=1)))))) | (EF( ((potential((tk(P11)>=1)))))) ) ) ) )
PROPERTY: n0-CTLFireability-11 (EF( ( (AX( ( ((potential((tk(P29)>=1)))) & ((potential((tk(P16)>=1)))) ))) & (EU( ((potential((tk(P18)>=1)))) , ((potential((tk(P16)>=1)))) )) )))
PROPERTY: n0-CTLFireability-12 (! (EU( ((potential((tk(P24)>=1)))) , ((potential((tk(P3)>=2) & (tk(P2)>=2)))) )))
PROPERTY: n0-CTLFireability-13 ( ( ((potential((tk(P3)>=2) & (tk(P2)>=2)))) & (! ((potential((tk(P12)>=1) & (tk(P13)>=1) & (tk(P15)>=1))))) ) | ( ((potential((tk(P28)>=1)))) & ( ( (! ( ((potential((tk(P5)>=5)))) & ((potential((tk(P5)>=5)))) )) | (AX( ((potential((tk(P11)>=1)))))) ) | ( (EX( ((potential((tk(P27)>=1) & (tk(P28)>=1) & (tk(P1)>=1)))))) | (EF( ((potential((tk(P18)>=1)))))) ) ) ) )
PROPERTY: n0-CTLFireability-14 (AG( ( ((potential((tk(P27)>=1) & (tk(P28)>=1) & (tk(P1)>=1)))) & (! (EX( ((potential((tk(P16)>=1))))))) )))
PROPERTY: n0-CTLFireability-15 (! (! ( ( ((potential((tk(P9)>=1)))) | (EF( ((potential((tk(P29)>=1)))))) ) & ( (! ((potential((tk(P27)>=1) & (tk(P28)>=1) & (tk(P1)>=1))))) | (AG( ((potential((tk(P5)>=5)))))) ) )))
FORMULA n0-CTLFireability-00 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA n0-CTLFireability-01 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA n0-CTLFireability-02 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA n0-CTLFireability-03 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA n0-CTLFireability-04 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA n0-CTLFireability-05 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA n0-CTLFireability-06 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA n0-CTLFireability-07 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA n0-CTLFireability-08 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA n0-CTLFireability-09 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA n0-CTLFireability-10 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA n0-CTLFireability-11 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA n0-CTLFireability-12 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA n0-CTLFireability-13 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA n0-CTLFireability-14 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA n0-CTLFireability-15 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS

BK_STOP 1589740541483

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RefineWMG-PT-005005"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="smart"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool smart"
echo " Input is RefineWMG-PT-005005, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 1"
echo " Run identifier is r153-oct2-158972909600020"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RefineWMG-PT-005005.tgz
mv RefineWMG-PT-005005 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;