fond
Model Checking Contest 2020
10th edition, Paris, France, June 23, 2020
Execution of r140-smll-158961510100436
Last Updated
Jun 28, 2020

About the Execution of GreatSPN for Referendum-PT-0200

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
15742.050 5813.00 12326.00 174.00 FFFFFTTTFFTTTTFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2020-input.r140-smll-158961510100436.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2020-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
..............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool gspn
Input is Referendum-PT-0200, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r140-smll-158961510100436
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.2M
-rw-r--r-- 1 mcc users 90K Apr 12 08:52 CTLCardinality.txt
-rw-r--r-- 1 mcc users 285K Apr 12 08:52 CTLCardinality.xml
-rw-r--r-- 1 mcc users 29K Apr 11 10:00 CTLFireability.txt
-rw-r--r-- 1 mcc users 150K Apr 11 10:00 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 24 05:38 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Mar 24 05:38 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 106K Apr 14 12:47 LTLCardinality.txt
-rw-r--r-- 1 mcc users 364K Apr 28 14:02 LTLCardinality.xml
-rw-r--r-- 1 mcc users 26K Apr 14 12:47 LTLFireability.txt
-rw-r--r-- 1 mcc users 138K Apr 28 14:02 LTLFireability.xml
-rw-r--r-- 1 mcc users 85K Apr 10 15:03 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 266K Apr 10 15:03 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 42K Apr 9 21:37 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 217K Apr 9 21:37 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 22K Apr 10 22:28 UpperBounds.txt
-rw-r--r-- 1 mcc users 52K Apr 10 22:28 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 24 05:38 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 24 05:38 instance
-rw-r--r-- 1 mcc users 6 Mar 24 05:38 iscolored
-rw-r--r-- 1 mcc users 228K Mar 24 05:38 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Referendum-PT-0200-CTLFireability-00
FORMULA_NAME Referendum-PT-0200-CTLFireability-01
FORMULA_NAME Referendum-PT-0200-CTLFireability-02
FORMULA_NAME Referendum-PT-0200-CTLFireability-03
FORMULA_NAME Referendum-PT-0200-CTLFireability-04
FORMULA_NAME Referendum-PT-0200-CTLFireability-05
FORMULA_NAME Referendum-PT-0200-CTLFireability-06
FORMULA_NAME Referendum-PT-0200-CTLFireability-07
FORMULA_NAME Referendum-PT-0200-CTLFireability-08
FORMULA_NAME Referendum-PT-0200-CTLFireability-09
FORMULA_NAME Referendum-PT-0200-CTLFireability-10
FORMULA_NAME Referendum-PT-0200-CTLFireability-11
FORMULA_NAME Referendum-PT-0200-CTLFireability-12
FORMULA_NAME Referendum-PT-0200-CTLFireability-13
FORMULA_NAME Referendum-PT-0200-CTLFireability-14
FORMULA_NAME Referendum-PT-0200-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1589995006950

----------------------------------------------------------------------
GreatSPN-meddly tool, MCC 2020
----------------------------------------------------------------------

Running Referendum (PT), instance 0200

LOADING model.pnml ...
MODEL CLASS: P/T NET WITH NUPN EXTENSION
PLACES: 601
TRANSITIONS: 401
CONSTANTS: 0
TEMPLATE VARS: 0
ARCS: 1001
NUPN UNITS: 201
LOADING TIME: 0.639

SAVING AS /home/mcc/execution/model.(net/def) ...
SAVING TIME: 0.071
SAVING NAME MAP FILE /home/mcc/execution/model.id2name ...
SAVING NUPN UNITS AS FILE /home/mcc/execution/model.nu ...
TOTAL TIME: 1.175
OK.
----------------------------------------------------------------------
GreatSPN/Meddly.
Copyright (C) 1987-2020, University of Torino, Italy.

Based on MEDDLY version 0.16.0
Copyright (C) 2009, Iowa State University Research Foundation, Inc.
website: http://meddly.sourceforge.net

Process ID: 459
MODEL NAME: /home/mcc/execution/model
601 places, 401 transitions.

FORMULA Referendum-PT-0200-CTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA Referendum-PT-0200-CTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA Referendum-PT-0200-CTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA Referendum-PT-0200-CTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA Referendum-PT-0200-CTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA Referendum-PT-0200-CTLFireability-05 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA Referendum-PT-0200-CTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA Referendum-PT-0200-CTLFireability-10 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA Referendum-PT-0200-CTLFireability-11 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA Referendum-PT-0200-CTLFireability-12 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA Referendum-PT-0200-CTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA Referendum-PT-0200-CTLFireability-13 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA Referendum-PT-0200-CTLFireability-06 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA Referendum-PT-0200-CTLFireability-07 TRUE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA Referendum-PT-0200-CTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
FORMULA Referendum-PT-0200-CTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS PARALLEL_PROCESSING UNFOLDING_TO_PT USE_NUPN TOPOLOGICAL
Ok.
EXITCODE: 0
----------------------------------------------------------------------

BK_STOP 1589995012763

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Referendum-PT-0200"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="gspn"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool gspn"
echo " Input is Referendum-PT-0200, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r140-smll-158961510100436"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Referendum-PT-0200.tgz
mv Referendum-PT-0200 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;