Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2020-input.r093-oct2-158940140500388.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2020-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...........................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-4028
Executing tool smart
Input is JoinFreeModules-PT-0003, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 1
Run identifier is r093-oct2-158940140500388
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 192K
-rw-r--r-- 1 mcc users 3.2K Apr 7 18:52 CTLCardinality.txt
-rw-r--r-- 1 mcc users 16K Apr 7 18:52 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Apr 6 20:35 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K Apr 6 20:35 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 24 05:37 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.7K Mar 24 05:37 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.2K Apr 14 12:40 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 28 14:01 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K Apr 14 12:40 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Apr 28 14:01 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Apr 6 04:06 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 22K Apr 6 04:06 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Apr 5 10:36 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K Apr 5 10:36 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Apr 6 20:24 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Apr 6 20:24 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 24 05:37 instance
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 iscolored
-rw-r--r-- 1 mcc users 18K Mar 24 05:37 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME JoinFreeModules-PT-0003-CTLFireability-00
FORMULA_NAME JoinFreeModules-PT-0003-CTLFireability-01
FORMULA_NAME JoinFreeModules-PT-0003-CTLFireability-02
FORMULA_NAME JoinFreeModules-PT-0003-CTLFireability-03
FORMULA_NAME JoinFreeModules-PT-0003-CTLFireability-04
FORMULA_NAME JoinFreeModules-PT-0003-CTLFireability-05
FORMULA_NAME JoinFreeModules-PT-0003-CTLFireability-06
FORMULA_NAME JoinFreeModules-PT-0003-CTLFireability-07
FORMULA_NAME JoinFreeModules-PT-0003-CTLFireability-08
FORMULA_NAME JoinFreeModules-PT-0003-CTLFireability-09
FORMULA_NAME JoinFreeModules-PT-0003-CTLFireability-10
FORMULA_NAME JoinFreeModules-PT-0003-CTLFireability-11
FORMULA_NAME JoinFreeModules-PT-0003-CTLFireability-12
FORMULA_NAME JoinFreeModules-PT-0003-CTLFireability-13
FORMULA_NAME JoinFreeModules-PT-0003-CTLFireability-14
FORMULA_NAME JoinFreeModules-PT-0003-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1589616420946

======================================================
========== this is Smart for the MCC'2018 ============
======================================================
Running JoinFreeModules (PT), instance 0003
Examination CTLFireability
Parser /home/mcc/BenchKit/bin/parser/CTLFire.jar
Model checker /home/mcc/BenchKit/bin/rem_exec/smart

GOT IT HERE. BS
Petri model created: 16 places, 25 transitions, 71 arcs.
AT ITER 0 NEW BEST:: SOT 280 SOS 199 HAS SOPS 195 HAS SOUS 199 HAS SOUPS 195 WITH SCORE 195.199
AT ITER 1 NEW BEST:: SOT 264 SOS 184 HAS SOPS 173 HAS SOUS 184 HAS SOUPS 173 WITH SCORE 173.184
AT ITER 11 NEW BEST:: SOT 264 SOS 177 HAS SOPS 166 HAS SOUS 177 HAS SOUPS 166 WITH SCORE 166.177
AT ITER 18 NEW BEST:: SOT 254 SOS 157 HAS SOPS 146 HAS SOUS 157 HAS SOUPS 146 WITH SCORE 146.157
AT ITER 29 NEW BEST:: SOT 250 SOS 141 HAS SOPS 130 HAS SOUS 141 HAS SOUPS 130 WITH SCORE 130.141
AT ITER 39 NEW BEST:: SOT 249 SOS 136 HAS SOPS 125 HAS SOUS 136 HAS SOUPS 125 WITH SCORE 125.136
AT ITER 40 NEW BEST:: SOT 249 SOS 133 HAS SOPS 123 HAS SOUS 133 HAS SOUPS 123 WITH SCORE 123.133
AT ITER 43 NEW BEST:: SOT 247 SOS 125 HAS SOPS 115 HAS SOUS 125 HAS SOUPS 115 WITH SCORE 115.125
AT ITER 46 NEW BEST:: SOT 247 SOS 123 HAS SOPS 113 HAS SOUS 123 HAS SOUPS 113 WITH SCORE 113.123
AT ITER 51 NEW BEST:: SOT 246 SOS 123 HAS SOPS 112 HAS SOUS 123 HAS SOUPS 112 WITH SCORE 112.123
AT ITER 56 NEW BEST:: SOT 243 SOS 111 HAS SOPS 100 HAS SOUS 109 HAS SOUPS 98 WITH SCORE 98.111
AT ITER 57 NEW BEST:: SOT 246 SOS 110 HAS SOPS 99 HAS SOUS 108 HAS SOUPS 97 WITH SCORE 97.11
AT ITER 80 NEW BEST:: SOT 245 SOS 111 HAS SOPS 97 HAS SOUS 109 HAS SOUPS 95 WITH SCORE 95.111
AT ITER 93 NEW BEST:: SOT 246 SOS 109 HAS SOPS 95 HAS SOUS 109 HAS SOUPS 95 WITH SCORE 95.109
AT ITER 94 NEW BEST:: SOT 238 SOS 95 HAS SOPS 81 HAS SOUS 95 HAS SOUPS 81 WITH SCORE 81.095
AT ITER 135 NEW BEST:: SOT 239 SOS 94 HAS SOPS 80 HAS SOUS 94 HAS SOUPS 80 WITH SCORE 80.094
AT ITER 147 NEW BEST:: SOT 238 SOS 93 HAS SOPS 79 HAS SOUS 93 HAS SOUPS 79 WITH SCORE 79.093
AT ITER 158 NEW BEST:: SOT 237 SOS 92 HAS SOPS 78 HAS SOUS 92 HAS SOUPS 78 WITH SCORE 78.092
AT ITER 163 NEW BEST:: SOT 237 SOS 91 HAS SOPS 77 HAS SOUS 91 HAS SOUPS 77 WITH SCORE 77.091
AT ITER 166 NEW BEST:: SOT 233 SOS 84 HAS SOPS 70 HAS SOUS 84 HAS SOUPS 70 WITH SCORE 70.084
AT ITER 314 NEW BEST:: SOT 232 SOS 82 HAS SOPS 69 HAS SOUS 82 HAS SOUPS 69 WITH SCORE 69.082
AT ITER 514 NEW BEST:: SOT 232 SOS 81 HAS SOPS 69 HAS SOUS 81 HAS SOUPS 69 WITH SCORE 69.081
Bounds file is: CTLFireability.xml
PROPERTY: JoinFreeModules-PT-0003-CTLFireability-00 (AG( ( (AF( ( ((potential((tk(P3)>=2)))) & ((potential((tk(P4)>=2)))) ))) | (EF( (! ((potential((tk(P12)>=3))))))) )))
PROPERTY: JoinFreeModules-PT-0003-CTLFireability-01 (EF( (! (EF( (! ((potential((tk(P10)>=4))))))))))
PROPERTY: JoinFreeModules-PT-0003-CTLFireability-02 (EU( ((potential((tk(P14)>=1)))) , ( ( ( ((potential((tk(P2)>=3)))) & ((potential((tk(P16)>=5)))) ) & ((potential((tk(P5)>=4)))) ) | (AG( ((potential((tk(P7)>=3)))))) ) ))
PROPERTY: JoinFreeModules-PT-0003-CTLFireability-03 ( ((potential((tk(P9)>=2)))) & (EF( (EG( ((potential((tk(P16)>=5)))))))) )
PROPERTY: JoinFreeModules-PT-0003-CTLFireability-04 (AX( (! (AG( (! ((potential((tk(P7)>=5))))))))))
PROPERTY: JoinFreeModules-PT-0003-CTLFireability-05 (EF( ( ( ((potential((tk(P2)>=3)))) | ((potential((tk(P8)>=2)))) ) & ( ((potential((tk(P12)>=3)))) & (AG( ((potential((tk(P15)>=4)))))) ) )))
PROPERTY: JoinFreeModules-PT-0003-CTLFireability-06 ( (AG( (! ( (! ((potential((tk(P15)>=4))))) & ((potential((tk(P12)>=5)))) )))) | (AG( ( ( ((potential((tk(P7)>=5)))) | ( ((potential((tk(P10)>=4)))) | ((potential((tk(P9)>=2)))) ) ) & ( (! ((potential((tk(P7)>=3))))) | (! ((potential((tk(P7)>=5))))) ) ))) )
PROPERTY: JoinFreeModules-PT-0003-CTLFireability-07 (! (EU( ( (! ((potential((tk(P15)>=3))))) & (! ((potential((tk(P8)>=2))))) ) , ( ( ((potential((tk(P16)>=5)))) & ((potential((tk(P14)>=1)))) ) & ( ((potential((tk(P2)>=5)))) & ((potential((tk(P7)>=3)))) ) ) )))
PROPERTY: JoinFreeModules-PT-0003-CTLFireability-08 ( (EU( (! ( ((potential((tk(P12)>=5)))) | ((potential((tk(P16)>=5)))) )) , ( ((potential((tk(P12)>=5)))) & ((potential((tk(P7)>=3)))) ) )) | (! (EF( ( ((potential((tk(P3)>=2)))) & ( ((potential((tk(P3)>=2)))) & ((potential((tk(P10)>=3)))) ) )))) )
PROPERTY: JoinFreeModules-PT-0003-CTLFireability-09 (EF( ( ( ( ((potential((tk(P5)>=3)))) & ( ((potential((tk(P4)>=2)))) | ((potential((tk(P7)>=3)))) ) ) & ( ((potential((tk(P14)>=1)))) & ( ((potential((tk(P13)>=2)))) & ((potential((tk(P2)>=3)))) ) ) ) & ((potential((tk(P5)>=3)))) )))
PROPERTY: JoinFreeModules-PT-0003-CTLFireability-10 (AG( (EF( ( (! ((potential((tk(P9)>=2))))) & ( ((potential((tk(P5)>=4)))) & ((potential((tk(P7)>=3)))) ) )))))
PROPERTY: JoinFreeModules-PT-0003-CTLFireability-11 ( ( (AG( (! ( ((potential((tk(P5)>=3)))) & ((potential((tk(P7)>=5)))) )))) & (! (EX( ( ((potential((tk(P16)>=5)))) & ((potential((tk(P14)>=2)))) )))) ) & ((potential((tk(P4)>=2)))) )
PROPERTY: JoinFreeModules-PT-0003-CTLFireability-12 (EF( ( ( ( ((potential((tk(P10)>=4)))) | ( ((potential((tk(P9)>=2)))) | ((potential((tk(P7)>=3)))) ) ) & (EF( ((potential((tk(P3)>=2)))))) ) & ((potential((tk(P7)>=5)))) )))
PROPERTY: JoinFreeModules-PT-0003-CTLFireability-13 (EF( (AF( ( ( ((potential((tk(P14)>=2)))) | ((potential((tk(P16)>=5)))) ) | ((potential((tk(P9)>=1)))) )))))
PROPERTY: JoinFreeModules-PT-0003-CTLFireability-14 (EF( (! ((potential((tk(P8)>=2)))))))
PROPERTY: JoinFreeModules-PT-0003-CTLFireability-15 ( (AG( ((potential((tk(P4)>=1)))))) | (! ( ( (EX( ((potential((tk(P16)>=5)))))) | (EF( ((potential((tk(P9)>=1)))))) ) & (! ( ( ((potential((tk(P5)>=4)))) | ((potential((tk(P12)>=5)))) ) | (! ((potential((tk(P15)>=4))))) )) )) )
FORMULA JoinFreeModules-PT-0003-CTLFireability-00 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA JoinFreeModules-PT-0003-CTLFireability-01 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA JoinFreeModules-PT-0003-CTLFireability-02 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA JoinFreeModules-PT-0003-CTLFireability-03 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA JoinFreeModules-PT-0003-CTLFireability-04 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA JoinFreeModules-PT-0003-CTLFireability-05 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA JoinFreeModules-PT-0003-CTLFireability-06 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA JoinFreeModules-PT-0003-CTLFireability-07 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA JoinFreeModules-PT-0003-CTLFireability-08 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA JoinFreeModules-PT-0003-CTLFireability-09 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA JoinFreeModules-PT-0003-CTLFireability-10 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA JoinFreeModules-PT-0003-CTLFireability-11 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA JoinFreeModules-PT-0003-CTLFireability-12 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA JoinFreeModules-PT-0003-CTLFireability-13 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA JoinFreeModules-PT-0003-CTLFireability-14 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA JoinFreeModules-PT-0003-CTLFireability-15 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS

BK_STOP 1589616422288

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="JoinFreeModules-PT-0003"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="smart"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool smart"
echo " Input is JoinFreeModules-PT-0003, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 1"
echo " Run identifier is r093-oct2-158940140500388"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/JoinFreeModules-PT-0003.tgz
mv JoinFreeModules-PT-0003 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;