Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2020-input.r078-smll-158922972000012.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2020-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
....................
=====================================================================
Generated by BenchKit 2-4028
Executing tool smart
Input is FMS-PT-00005, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 1
Run identifier is r078-smll-158922972000012
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 208K
-rw-r--r-- 1 mcc users 3.1K Apr 1 20:17 CTLCardinality.txt
-rw-r--r-- 1 mcc users 17K Apr 1 20:17 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Apr 1 13:42 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 1 13:42 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 24 05:37 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K Mar 24 05:37 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K Apr 8 14:55 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 28 14:01 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K Apr 8 14:55 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 28 14:01 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K Apr 1 10:49 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 21K Apr 1 10:49 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Apr 1 06:32 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 19K Apr 1 06:32 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Apr 1 13:18 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Apr 1 13:18 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 instance
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 iscolored
-rw-r--r-- 1 mcc users 17K Mar 24 05:37 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FMS-PT-00005-CTLFireability-00
FORMULA_NAME FMS-PT-00005-CTLFireability-01
FORMULA_NAME FMS-PT-00005-CTLFireability-02
FORMULA_NAME FMS-PT-00005-CTLFireability-03
FORMULA_NAME FMS-PT-00005-CTLFireability-04
FORMULA_NAME FMS-PT-00005-CTLFireability-05
FORMULA_NAME FMS-PT-00005-CTLFireability-06
FORMULA_NAME FMS-PT-00005-CTLFireability-07
FORMULA_NAME FMS-PT-00005-CTLFireability-08
FORMULA_NAME FMS-PT-00005-CTLFireability-09
FORMULA_NAME FMS-PT-00005-CTLFireability-10
FORMULA_NAME FMS-PT-00005-CTLFireability-11
FORMULA_NAME FMS-PT-00005-CTLFireability-12
FORMULA_NAME FMS-PT-00005-CTLFireability-13
FORMULA_NAME FMS-PT-00005-CTLFireability-14
FORMULA_NAME FMS-PT-00005-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1589322204240

======================================================
========== this is Smart for the MCC'2018 ============
======================================================
Running FMS (PT), instance 00005
Examination CTLFireability
Parser /home/mcc/BenchKit/bin/parser/CTLFire.jar
Model checker /home/mcc/BenchKit/bin/rem_exec/smart

GOT IT HERE. BS
Petri model created: 22 places, 20 transitions, 50 arcs.
AT ITER 0 NEW BEST:: SOT 274 SOS 122 HAS SOPS 122 HAS SOUS 121 HAS SOUPS 121 WITH SCORE 121.122
AT ITER 3 NEW BEST:: SOT 274 SOS 119 HAS SOPS 119 HAS SOUS 118 HAS SOUPS 118 WITH SCORE 118.119
AT ITER 8 NEW BEST:: SOT 275 SOS 116 HAS SOPS 116 HAS SOUS 107 HAS SOUPS 107 WITH SCORE 107.116
AT ITER 12 NEW BEST:: SOT 275 SOS 115 HAS SOPS 115 HAS SOUS 106 HAS SOUPS 106 WITH SCORE 106.115
AT ITER 18 NEW BEST:: SOT 272 SOS 105 HAS SOPS 105 HAS SOUS 99 HAS SOUPS 99 WITH SCORE 99.105
AT ITER 35 NEW BEST:: SOT 272 SOS 103 HAS SOPS 103 HAS SOUS 98 HAS SOUPS 98 WITH SCORE 98.103
AT ITER 37 NEW BEST:: SOT 270 SOS 97 HAS SOPS 97 HAS SOUS 94 HAS SOUPS 94 WITH SCORE 94.097
AT ITER 64 NEW BEST:: SOT 268 SOS 95 HAS SOPS 95 HAS SOUS 92 HAS SOUPS 92 WITH SCORE 92.095
AT ITER 152 NEW BEST:: SOT 267 SOS 94 HAS SOPS 94 HAS SOUS 91 HAS SOUPS 91 WITH SCORE 91.094
AT ITER 200 NEW BEST:: SOT 266 SOS 92 HAS SOPS 92 HAS SOUS 89 HAS SOUPS 89 WITH SCORE 89.092
AT ITER 202 NEW BEST:: SOT 266 SOS 94 HAS SOPS 94 HAS SOUS 88 HAS SOUPS 88 WITH SCORE 88.094
AT ITER 251 NEW BEST:: SOT 265 SOS 93 HAS SOPS 93 HAS SOUS 86 HAS SOUPS 86 WITH SCORE 86.093
AT ITER 328 NEW BEST:: SOT 264 SOS 90 HAS SOPS 90 HAS SOUS 83 HAS SOUPS 83 WITH SCORE 83.09
AT ITER 680 NEW BEST:: SOT 263 SOS 89 HAS SOPS 89 HAS SOUS 82 HAS SOUPS 82 WITH SCORE 82.089
Bounds file is: CTLFireability.xml
PROPERTY: FMS-PT-00005-CTLFireability-00 ( ((potential((tk(P8)>=1) & (tk(P6)>=1)))) | ( ( (AG( ((potential((tk(P19)>=1) & (tk(P3)>=1)))))) | ( ( ((potential((tk(P20)>=1)))) & ( ((potential((tk(P18)>=1) & (tk(P11)>=1)))) & ((potential((tk(P18)>=1) & (tk(P11)>=1)))) ) ) | (! ( ((potential((tk(P4)>=1)))) & ((potential((tk(P13)>=1)))) )) ) ) & (! (EF( ((potential((tk(P13)>=1))))))) ) )
PROPERTY: FMS-PT-00005-CTLFireability-01 (EF( ((potential((tk(P13)>=1))))))
PROPERTY: FMS-PT-00005-CTLFireability-02 (! (EU( (EG( ((potential((tk(P21)>=1)))))) , (AG( ((potential((tk(P21)>=1)))))) )))
PROPERTY: FMS-PT-00005-CTLFireability-03 (EF( (! (EX( ( ((potential((tk(P10)>=1)))) | ((potential((tk(P21)>=1)))) ))))))
PROPERTY: FMS-PT-00005-CTLFireability-04 ( (! (EF( (EX( ((potential((tk(P13)>=1))))))))) & (AU( (! ((potential((tk(P15)>=1))))) , (! ((potential((tk(P12)>=1))))) )) )
PROPERTY: FMS-PT-00005-CTLFireability-05 (AG( (EX( ( ( ((potential((tk(P5)>=1)))) | ((potential((tk(P8)>=1) & (tk(P6)>=1)))) ) | ((potential((tk(P15)>=1)))) )))))
PROPERTY: FMS-PT-00005-CTLFireability-06 (AG( (EU( (! ((potential((tk(P1)>=1))))) , ( ((potential((tk(P2)>=1)))) | ((potential((tk(P1)>=1)))) ) ))))
PROPERTY: FMS-PT-00005-CTLFireability-07 ( ((potential((tk(P9)>=1) & (tk(P11)>=1)))) | (EF( (AG( (! ((potential((tk(P7)>=1))))))))) )
PROPERTY: FMS-PT-00005-CTLFireability-08 ( (EG( (EF( ( ((potential((tk(P4)>=1)))) & ((potential((tk(P1)>=1)))) ))))) | ((potential((tk(P7)>=1)))) )
PROPERTY: FMS-PT-00005-CTLFireability-09 (EF( ( ( ((potential((tk(P13)>=1)))) & ( ( ((potential((tk(P8)>=1) & (tk(P6)>=1)))) | ((potential((tk(P8)>=1) & (tk(P6)>=1)))) ) & ( ((potential((tk(P17)>=1)))) & ((potential((tk(P10)>=1)))) ) ) ) & (! ( ( ((potential((tk(P9)>=1) & (tk(P11)>=1)))) & ((potential((tk(P19)>=1) & (tk(P3)>=1)))) ) & (! ((potential((tk(P20)>=1))))) )) )))
PROPERTY: FMS-PT-00005-CTLFireability-10 (! ( ( ( ( ( ((potential((tk(P9)>=1) & (tk(P11)>=1)))) & ((potential((tk(P5)>=1)))) ) | ((potential((tk(P9)>=1) & (tk(P11)>=1)))) ) & (EX( ((potential((tk(P7)>=1)))))) ) | (EU( ((potential((tk(P17)>=1)))) , ((potential((tk(P9)>=1) & (tk(P11)>=1)))) )) ) | (EU( (! ((potential((tk(P1)>=1))))) , ((potential((tk(P13)>=1)))) )) ))
PROPERTY: FMS-PT-00005-CTLFireability-11 (EG( (EU( ( ((potential((tk(P21)>=1)))) | ((potential((tk(P22)>=1)))) ) , ( ((potential((tk(P9)>=1) & (tk(P11)>=1)))) & ((potential((tk(P14)>=1) & (tk(P16)>=1)))) ) ))))
PROPERTY: FMS-PT-00005-CTLFireability-12 ( (AG( ((potential((tk(P8)>=1) & (tk(P6)>=1)))))) & (! (! ( (! (! ((potential((tk(P9)>=1) & (tk(P11)>=1)))))) | (! ( ((potential((tk(P14)>=1) & (tk(P16)>=1)))) | ((potential((tk(P5)>=1)))) )) ))) )
PROPERTY: FMS-PT-00005-CTLFireability-13 ( ( ( ((potential((tk(P4)>=1)))) | ( (EX( ((potential((tk(P13)>=1)))))) | ( ( ((potential((tk(P5)>=1)))) | ((potential((tk(P21)>=1)))) ) | ((potential((tk(P2)>=1)))) ) ) ) | ( (! (AG( ((potential((tk(P7)>=1))))))) & ( ( ( ((potential((tk(P15)>=1)))) | ((potential((tk(P14)>=1) & (tk(P16)>=1)))) ) & ((potential((tk(P5)>=1)))) ) | (! ( ((potential((tk(P13)>=1)))) | ((potential((tk(P19)>=1) & (tk(P3)>=1)))) )) ) ) ) & (AX( (EG( ( ((potential((tk(P10)>=1)))) | ((potential((tk(P4)>=1)))) ))))) )
PROPERTY: FMS-PT-00005-CTLFireability-14 ( (EF( (EF( ((potential((tk(P1)>=1)))))))) & ((potential((tk(P20)>=1)))) )
PROPERTY: FMS-PT-00005-CTLFireability-15 ( ((potential((tk(P9)>=1) & (tk(P11)>=1)))) | ( (! ((potential((tk(P1)>=1))))) & (EF( ( ( ((potential((tk(P1)>=1)))) & ((potential((tk(P14)>=1) & (tk(P16)>=1)))) ) & (! ((potential((tk(P14)>=1) & (tk(P16)>=1))))) ))) ) )
FORMULA FMS-PT-00005-CTLFireability-00 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA FMS-PT-00005-CTLFireability-01 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA FMS-PT-00005-CTLFireability-02 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA FMS-PT-00005-CTLFireability-03 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA FMS-PT-00005-CTLFireability-04 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA FMS-PT-00005-CTLFireability-05 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA FMS-PT-00005-CTLFireability-06 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA FMS-PT-00005-CTLFireability-07 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA FMS-PT-00005-CTLFireability-08 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA FMS-PT-00005-CTLFireability-09 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA FMS-PT-00005-CTLFireability-10 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA FMS-PT-00005-CTLFireability-11 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA FMS-PT-00005-CTLFireability-12 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA FMS-PT-00005-CTLFireability-13 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA FMS-PT-00005-CTLFireability-14 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA FMS-PT-00005-CTLFireability-15 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS

BK_STOP 1589322207450

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FMS-PT-00005"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="smart"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool smart"
echo " Input is FMS-PT-00005, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 1"
echo " Run identifier is r078-smll-158922972000012"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FMS-PT-00005.tgz
mv FMS-PT-00005 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;