Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2020-input.r066-tajo-158922814000204.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2020-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
....................
=====================================================================
Generated by BenchKit 2-4028
Executing tool itstools
Input is DNAwalker-PT-16redondantChoiceR, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r066-tajo-158922814000204
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 396K
-rw-r--r-- 1 mcc users 3.9K Mar 31 05:00 CTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Mar 31 05:00 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Mar 29 20:56 CTLFireability.txt
-rw-r--r-- 1 mcc users 19K Mar 29 20:56 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 24 05:37 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.6K Mar 24 05:37 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K Apr 8 14:52 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Apr 28 14:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Apr 8 14:52 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Apr 28 14:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 28 13:43 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 21K Mar 28 13:43 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.3K Mar 27 06:27 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 20K Mar 27 06:27 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Mar 28 14:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Mar 28 14:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 equiv_col
-rw-r--r-- 1 mcc users 19 Mar 24 05:37 instance
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 iscolored
-rw-r--r-- 1 mcc users 211K Mar 24 05:37 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-CTLFireability-00
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-CTLFireability-01
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-CTLFireability-02
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-CTLFireability-03
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-CTLFireability-04
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-CTLFireability-05
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-CTLFireability-06
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-CTLFireability-07
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-CTLFireability-08
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-CTLFireability-09
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-CTLFireability-10
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-CTLFireability-11
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-CTLFireability-12
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-CTLFireability-13
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-CTLFireability-14
FORMULA_NAME DNAwalker-PT-16redondantChoiceR-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1590103312312

[2020-05-21 23:21:53] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2020-05-21 23:21:53] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2020-05-21 23:21:53] [INFO ] Load time of PNML (sax parser for PT used): 66 ms
[2020-05-21 23:21:53] [INFO ] Transformed 43 places.
[2020-05-21 23:21:54] [INFO ] Transformed 490 transitions.
[2020-05-21 23:21:54] [INFO ] Parsed PT model containing 43 places and 490 transitions in 106 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 16 ms.
Incomplete random walk after 100000 steps, including 3811 resets, run finished after 448 ms. (steps per millisecond=223 ) properties seen :[0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1]
[2020-05-21 23:21:54] [INFO ] Flow matrix only has 489 transitions (discarded 1 similar events)
// Phase 1: matrix 489 rows 43 cols
[2020-05-21 23:21:54] [INFO ] Computed 0 place invariants in 9 ms
[2020-05-21 23:21:54] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-05-21 23:21:54] [INFO ] [Real]Absence check using state equation in 149 ms returned sat
[2020-05-21 23:21:54] [INFO ] Solution in real domain found non-integer solution.
[2020-05-21 23:21:54] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2020-05-21 23:21:57] [INFO ] [Nat]Absence check using state equation in 2781 ms returned unsat
[2020-05-21 23:21:57] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-05-21 23:21:57] [INFO ] [Real]Absence check using state equation in 128 ms returned sat
[2020-05-21 23:21:57] [INFO ] Solution in real domain found non-integer solution.
[2020-05-21 23:21:57] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2020-05-21 23:21:59] [INFO ] [Nat]Absence check using state equation in 1670 ms returned unsat
[2020-05-21 23:21:59] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-05-21 23:21:59] [INFO ] [Real]Absence check using state equation in 80 ms returned sat
[2020-05-21 23:21:59] [INFO ] Solution in real domain found non-integer solution.
[2020-05-21 23:21:59] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2020-05-21 23:21:59] [INFO ] [Nat]Absence check using state equation in 415 ms returned unsat
[2020-05-21 23:21:59] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-05-21 23:22:00] [INFO ] [Real]Absence check using state equation in 64 ms returned sat
[2020-05-21 23:22:00] [INFO ] Solution in real domain found non-integer solution.
[2020-05-21 23:22:00] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2020-05-21 23:22:00] [INFO ] [Nat]Absence check using state equation in 390 ms returned unsat
[2020-05-21 23:22:00] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-05-21 23:22:00] [INFO ] [Real]Absence check using state equation in 92 ms returned sat
[2020-05-21 23:22:00] [INFO ] Solution in real domain found non-integer solution.
[2020-05-21 23:22:00] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2020-05-21 23:22:01] [INFO ] [Nat]Absence check using state equation in 1075 ms returned unsat
Successfully simplified 5 atomic propositions for a total of 5 simplifications.
[2020-05-21 23:22:01] [INFO ] Flatten gal took : 56 ms
[2020-05-21 23:22:01] [INFO ] Flatten gal took : 26 ms
[2020-05-21 23:22:01] [INFO ] Applying decomposition
[2020-05-21 23:22:01] [INFO ] Flatten gal took : 24 ms
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202005100927/bin/convert-linux64, -i, /tmp/graph12899349705072832249.txt, -o, /tmp/graph12899349705072832249.bin, -w, /tmp/graph12899349705072832249.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202005100927/bin/louvain-linux64, /tmp/graph12899349705072832249.bin, -l, -1, -v, -w, /tmp/graph12899349705072832249.weights, -q, 0, -e, 0.001], workingDir=null]
[2020-05-21 23:22:02] [INFO ] Decomposing Gal with order
[2020-05-21 23:22:02] [INFO ] Rewriting arrays to variables to allow decomposition.
[2020-05-21 23:22:02] [INFO ] Removed a total of 872 redundant transitions.
[2020-05-21 23:22:02] [INFO ] Flatten gal took : 55 ms
[2020-05-21 23:22:02] [INFO ] Fuse similar labels procedure discarded/fused a total of 0 labels/synchronizations in 4 ms.
[2020-05-21 23:22:02] [INFO ] Time to serialize gal into /home/mcc/execution/CTLFireability.pnml.gal : 5 ms
[2020-05-21 23:22:02] [INFO ] Time to serialize properties into /home/mcc/execution/CTLFireability.ctl : 1 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/CTLFireability.pnml.gal, -t, CGAL, -ctl, /home/mcc/execution/CTLFireability.ctl], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/CTLFireability.pnml.gal -t CGAL -ctl /home/mcc/execution/CTLFireability.ctl
No direction supplied, using forward translation only.
Parsed 16 CTL formulae.
built 240 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,8.0032e+11,54.6351,1567564,21112,9,2.61078e+06,286,569,6.3389e+06,14,270,0


Converting to forward existential form...Done !
original formula: AF(((AX(FALSE) + AG(((u27.A28>=1)&&(u28.A29>=2)))) + ((u18.A19>=2)&&(u25.A26>=1))))
=> equivalent forward existential formula: [FwdG(Init,!(((!(EX(!(FALSE))) + !(E(TRUE U !(((u27.A28>=1)&&(u28.A29>=2)))))) + ((u18.A19>=2)&&(u25.A26>=1)))))] = FALSE
Reverse transition relation is NOT exact ! Due to transitions t1_2, t1_3, t1_4, t1_5, t1_9, t2_3, t2_4, t2_5, t2_6, t2_9, t2_10, t3_2, t3_4, t3_5, t3_6, t3_7, t3_9, t3_10, t3_11, t4_2, t4_3, t4_5, t4_6, t4_7, t4_8, t4_9, t4_10, t4_11, t4_12, t4_23, t4_24, t4_28, t4_29, t5_2, t5_3, t5_4, t5_6, t5_7, t5_8, t5_9, t5_10, t5_11, t5_13, t5_23, t5_24, t5_25, t5_28, t5_29, t6_2, t6_3, t6_4, t6_5, t6_7, t6_8, t6_9, t6_10, t6_13, t6_14, t6_23, t6_24, t6_25, t6_29, t6_30, t7_3, t7_4, t7_5, t7_6, t7_8, t7_9, t7_13, t7_14, t7_15, t7_23, t7_24, t7_25, t7_30, t7_31, t8_4, t8_5, t8_6, t8_7, t8_13, t8_14, t8_15, t8_16, t8_23, t8_24, t8_25, t8_29, t8_30, t8_31, t9_2, t9_3, t9_4, t9_5, t9_6, t9_7, t9_10, t9_11, t9_12, t9_18, t9_23, t9_24, t9_25, t9_28, t9_29, t10_2, t10_3, t10_4, t10_5, t10_6, t10_9, t10_11, t10_12, t10_18, t10_19, t10_24, t10_25, t10_26, t10_28, t10_29, t11_3, t11_4, t11_5, t11_9, t11_10, t11_12, t11_18, t11_19, t11_20, t11_25, t11_26, t11_27, t11_28, t11_29, t12_4, t12_9, t12_10, t12_11, t12_18, t12_19, t12_20, t12_21, t12_24, t12_25, t12_26, t12_27, t12_28, t12_29, t13_5, t13_6, t13_7, t13_8, t13_14, t13_15, t13_16, t13_17, t13_23, t13_24, t13_25, t13_26, t13_29, t13_30, t13_31, t14_6, t14_7, t14_8, t14_13, t14_15, t14_16, t14_17, t14_23, t14_24, t14_25, t14_26, t14_29, t14_30, t14_31, t14_32, t15_7, t15_8, t15_13, t15_14, t15_16, t15_17, t15_23, t15_24, t15_25, t15_26, t15_29, t15_30, t15_31, t15_32, t16_8, t16_13, t16_14, t16_15, t16_17, t16_23, t16_24, t16_25, t16_26, t16_30, t16_31, t16_32, t17_13, t17_14, t17_15, t17_23, t17_24, t17_25, t17_30, t17_31, t18_9, t18_10, t18_11, t18_12, t18_19, t18_20, t18_21, t18_22, t18_24, t18_25, t18_26, t18_27, t18_28, t18_29, t18_30, t19_10, t19_11, t19_12, t19_18, t19_20, t19_21, t19_22, t19_24, t19_25, t19_26, t19_27, t19_28, t19_29, t19_30, t19_33, t20_11, t20_12, t20_18, t20_19, t20_21, t20_22, t20_24, t20_25, t20_26, t20_27, t20_28, t20_29, t20_30, t20_33, t21_12, t21_18, t21_19, t21_20, t21_25, t21_26, t21_27, t21_28, t21_29, t21_30, t21_33, t22_18, t22_19, t22_20, t22_25, t22_26, t22_27, t22_28, t22_29, t23_4, t23_5, t23_6, t23_7, t23_8, t23_9, t23_13, t23_14, t23_15, t23_16, t23_17, t23_24, t23_25, t23_26, t23_28, t23_29, t23_30, t23_31, t24_4, t24_5, t24_6, t24_7, t24_8, t24_9, t24_10, t24_12, t24_13, t24_14, t24_15, t24_16, t24_17, t24_18, t24_19, t24_20, t24_23, t24_25, t24_26, t24_27, t24_28, t24_29, t24_30, t24_31, t25_5, t25_6, t25_7, t25_8, t25_9, t25_10, t25_11, t25_12, t25_13, t25_14, t25_15, t25_16, t25_17, t25_18, t25_19, t25_20, t25_21, t25_22, t25_23, t25_24, t25_26, t25_27, t25_28, t25_29, t25_30, t25_31, t26_10, t26_11, t26_12, t26_13, t26_14, t26_15, t26_16, t26_18, t26_19, t26_20, t26_21, t26_22, t26_23, t26_24, t26_25, t26_27, t26_28, t26_29, t26_30, t26_31, t26_33, t27_11, t27_12, t27_18, t27_19, t27_20, t27_21, t27_22, t27_24, t27_25, t27_26, t27_28, t27_29, t27_30, t27_31, t27_33, t28_4, t28_5, t28_9, t28_10, t28_11, t28_12, t28_18, t28_19, t28_20, t28_21, t28_22, t28_23, t28_24, t28_25, t28_26, t28_27, t28_29, t28_30, t29_4, t29_5, t29_6, t29_8, t29_9, t29_10, t29_11, t29_12, t29_13, t29_14, t29_15, t29_18, t29_19, t29_20, t29_21, t29_22, t29_23, t29_24, t29_25, t29_26, t29_27, t29_28, t29_30, t29_31, t30_6, t30_7, t30_8, t30_13, t30_14, t30_15, t30_16, t30_17, t30_18, t30_19, t30_20, t30_21, t30_23, t30_24, t30_25, t30_26, t30_27, t30_28, t30_29, t30_31, t30_32, t31_7, t31_8, t31_13, t31_14, t31_15, t31_16, t31_17, t31_23, t31_24, t31_25, t31_26, t31_27, t31_29, t31_30, t31_32, u4.tb5, u4.tAb5, u5.tb6, u5.tAb6, u12.tb13, u12.tAb13, u13.tb14, u13.tAb14, u14.tb15, u14.tAb15, u15.tb16, u15.tAb16, u27.tb28, u27.tAb28, u28.tb29, u28.tAb29, u29.tb30, u29.tAb30, u30.tb31, u30.tAb31, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :5/7/478/490
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Fast SCC detection found a local SCC at level 26
Fast SCC detection found an SCC at level 27
Fast SCC detection found an SCC at level 28
Fast SCC detection found an SCC at level 29
Fast SCC detection found an SCC at level 30
Fast SCC detection found an SCC at level 31
Fast SCC detection found an SCC at level 32
Detected timeout of ITS tools.
[2020-05-21 23:42:06] [INFO ] Flatten gal took : 160 ms
[2020-05-21 23:42:06] [INFO ] Time to serialize gal into /home/mcc/execution/CTLFireability.pnml.gal : 53 ms
[2020-05-21 23:42:06] [INFO ] Time to serialize properties into /home/mcc/execution/CTLFireability.ctl : 9 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/CTLFireability.pnml.gal, -t, CGAL, -ctl, /home/mcc/execution/CTLFireability.ctl, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/CTLFireability.pnml.gal -t CGAL -ctl /home/mcc/execution/CTLFireability.ctl --gen-order FOLLOW
No direction supplied, using forward translation only.
Parsed 16 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,8.0032e+11,140.73,2362512,2,72956,5,8.20083e+06,6,0,705,1.39365e+07,0


Converting to forward existential form...Done !
original formula: AF(((AX(FALSE) + AG(((A28>=1)&&(A29>=2)))) + ((A19>=2)&&(A26>=1))))
=> equivalent forward existential formula: [FwdG(Init,!(((!(EX(!(FALSE))) + !(E(TRUE U !(((A28>=1)&&(A29>=2)))))) + ((A19>=2)&&(A26>=1)))))] = FALSE
Reverse transition relation is NOT exact ! Due to transitions tb5, tAb5, tb6, tAb6, tb13, tAb13, tb14, tAb14, tb15, tAb15, tb16, tAb16, tb28, tAb28, tb29, tAb29, tb30, tAb30, tb31, tAb31, t1_2, t1_3, t1_4, t1_5, t1_9, t2_3, t2_4, t2_5, t2_6, t2_9, t2_10, t3_2, t3_4, t3_5, t3_6, t3_7, t3_9, t3_10, t3_11, t4_2, t4_3, t4_5, t4_6, t4_7, t4_8, t4_9, t4_10, t4_11, t4_12, t4_23, t4_24, t4_28, t4_29, t5_2, t5_3, t5_4, t5_6, t5_7, t5_8, t5_9, t5_10, t5_11, t5_13, t5_23, t5_24, t5_25, t5_28, t5_29, t6_2, t6_3, t6_4, t6_5, t6_7, t6_8, t6_9, t6_10, t6_13, t6_14, t6_23, t6_24, t6_25, t6_29, t6_30, t7_3, t7_4, t7_5, t7_6, t7_8, t7_9, t7_13, t7_14, t7_15, t7_23, t7_24, t7_25, t7_30, t7_31, t8_4, t8_5, t8_6, t8_7, t8_13, t8_14, t8_15, t8_16, t8_23, t8_24, t8_25, t8_29, t8_30, t8_31, t9_2, t9_3, t9_4, t9_5, t9_6, t9_7, t9_10, t9_11, t9_12, t9_18, t9_23, t9_24, t9_25, t9_28, t9_29, t10_2, t10_3, t10_4, t10_5, t10_6, t10_9, t10_11, t10_12, t10_18, t10_19, t10_24, t10_25, t10_26, t10_28, t10_29, t11_3, t11_4, t11_5, t11_9, t11_10, t11_12, t11_18, t11_19, t11_20, t11_25, t11_26, t11_27, t11_28, t11_29, t12_4, t12_9, t12_10, t12_11, t12_18, t12_19, t12_20, t12_21, t12_24, t12_25, t12_26, t12_27, t12_28, t12_29, t13_5, t13_6, t13_7, t13_8, t13_14, t13_15, t13_16, t13_17, t13_23, t13_24, t13_25, t13_26, t13_29, t13_30, t13_31, t14_6, t14_7, t14_8, t14_13, t14_15, t14_16, t14_17, t14_23, t14_24, t14_25, t14_26, t14_29, t14_30, t14_31, t14_32, t15_7, t15_8, t15_13, t15_14, t15_16, t15_17, t15_23, t15_24, t15_25, t15_26, t15_29, t15_30, t15_31, t15_32, t16_8, t16_13, t16_14, t16_15, t16_17, t16_23, t16_24, t16_25, t16_26, t16_30, t16_31, t16_32, t17_13, t17_14, t17_15, t17_23, t17_24, t17_25, t17_30, t17_31, t18_9, t18_10, t18_11, t18_12, t18_19, t18_20, t18_21, t18_22, t18_24, t18_25, t18_26, t18_27, t18_28, t18_29, t18_30, t19_10, t19_11, t19_12, t19_18, t19_20, t19_21, t19_22, t19_24, t19_25, t19_26, t19_27, t19_28, t19_29, t19_30, t19_33, t20_11, t20_12, t20_18, t20_19, t20_21, t20_22, t20_24, t20_25, t20_26, t20_27, t20_28, t20_29, t20_30, t20_33, t21_12, t21_18, t21_19, t21_20, t21_25, t21_26, t21_27, t21_28, t21_29, t21_30, t21_33, t22_18, t22_19, t22_20, t22_25, t22_26, t22_27, t22_28, t22_29, t23_4, t23_5, t23_6, t23_7, t23_8, t23_9, t23_13, t23_14, t23_15, t23_16, t23_17, t23_24, t23_25, t23_26, t23_28, t23_29, t23_30, t23_31, t24_4, t24_5, t24_6, t24_7, t24_8, t24_9, t24_10, t24_12, t24_13, t24_14, t24_15, t24_16, t24_17, t24_18, t24_19, t24_20, t24_23, t24_25, t24_26, t24_27, t24_28, t24_29, t24_30, t24_31, t25_5, t25_6, t25_7, t25_8, t25_9, t25_10, t25_11, t25_12, t25_13, t25_14, t25_15, t25_16, t25_17, t25_18, t25_19, t25_20, t25_21, t25_22, t25_23, t25_24, t25_26, t25_27, t25_28, t25_29, t25_30, t25_31, t26_10, t26_11, t26_12, t26_13, t26_14, t26_15, t26_16, t26_18, t26_19, t26_20, t26_21, t26_22, t26_23, t26_24, t26_25, t26_27, t26_28, t26_29, t26_30, t26_31, t26_33, t27_11, t27_12, t27_18, t27_19, t27_20, t27_21, t27_22, t27_24, t27_25, t27_26, t27_28, t27_29, t27_30, t27_31, t27_33, t28_4, t28_5, t28_9, t28_10, t28_11, t28_12, t28_18, t28_19, t28_20, t28_21, t28_22, t28_23, t28_24, t28_25, t28_26, t28_27, t28_29, t28_30, t29_4, t29_5, t29_6, t29_8, t29_9, t29_10, t29_11, t29_12, t29_13, t29_14, t29_15, t29_18, t29_19, t29_20, t29_21, t29_22, t29_23, t29_24, t29_25, t29_26, t29_27, t29_28, t29_30, t29_31, t30_6, t30_7, t30_8, t30_13, t30_14, t30_15, t30_16, t30_17, t30_18, t30_19, t30_20, t30_21, t30_23, t30_24, t30_25, t30_26, t30_27, t30_28, t30_29, t30_31, t30_32, t31_7, t31_8, t31_13, t31_14, t31_15, t31_16, t31_17, t31_23, t31_24, t31_25, t31_26, t31_27, t31_29, t31_30, t31_32, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :5/7/478/490
Detected timeout of ITS tools.
[2020-05-22 00:02:08] [INFO ] Flatten gal took : 102 ms
[2020-05-22 00:02:09] [INFO ] Input system was already deterministic with 490 transitions.
[2020-05-22 00:02:09] [INFO ] Transformed 43 places.
[2020-05-22 00:02:09] [INFO ] Transformed 490 transitions.
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
[2020-05-22 00:02:09] [INFO ] Time to serialize gal into /home/mcc/execution/CTLFireability.pnml.gal : 7 ms
[2020-05-22 00:02:09] [INFO ] Time to serialize properties into /home/mcc/execution/CTLFireability.ctl : 1 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/CTLFireability.pnml.gal, -t, CGAL, -ctl, /home/mcc/execution/CTLFireability.ctl, --load-order, /home/mcc/execution/model.ord, --gen-order, FOLLOW], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/CTLFireability.pnml.gal -t CGAL -ctl /home/mcc/execution/CTLFireability.ctl --load-order /home/mcc/execution/model.ord --gen-order FOLLOW
Successfully loaded order from file /home/mcc/execution/model.ord
No direction supplied, using forward translation only.
Parsed 16 CTL formulae.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,8.0032e+11,661.886,10134308,2,302460,5,3.90108e+07,6,0,705,5.7971e+07,0


Converting to forward existential form...Done !
original formula: AF(((AX(FALSE) + AG(((A28>=1)&&(A29>=2)))) + ((A19>=2)&&(A26>=1))))
=> equivalent forward existential formula: [FwdG(Init,!(((!(EX(!(FALSE))) + !(E(TRUE U !(((A28>=1)&&(A29>=2)))))) + ((A19>=2)&&(A26>=1)))))] = FALSE
Reverse transition relation is NOT exact ! Due to transitions t0, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10, t11, t12, t13, t14, t15, t16, t17, t18, t19, t20, t21, t22, t23, t24, t26, t27, t28, t29, t30, t31, t33, t34, t35, t36, t37, t38, t39, t40, t42, t43, t44, t45, t46, t47, t48, t49, t50, t51, t52, t53, t54, t55, t57, t58, t59, t60, t61, t62, t63, t64, t65, t66, t67, t68, t69, t70, t71, t72, t73, t74, t75, t76, t77, t78, t79, t80, t81, t82, t83, t84, t85, t86, t87, t88, t89, t90, t91, t92, t93, t94, t95, t96, t97, t98, t99, t100, t101, t102, t103, t104, t105, t106, t107, t108, t109, t110, t111, t112, t113, t114, t116, t117, t118, t119, t120, t121, t122, t123, t124, t125, t126, t127, t128, t129, t130, t131, t132, t133, t134, t135, t136, t137, t138, t139, t140, t141, t142, t143, t144, t145, t146, t147, t148, t149, t150, t151, t152, t153, t154, t155, t156, t157, t158, t159, t160, t161, t162, t163, t164, t165, t166, t167, t168, t169, t170, t171, t172, t173, t174, t175, t176, t177, t178, t179, t180, t181, t182, t183, t184, t185, t186, t187, t188, t189, t190, t191, t192, t193, t194, t195, t196, t197, t198, t199, t200, t201, t202, t203, t204, t205, t206, t207, t208, t209, t210, t211, t212, t213, t214, t215, t216, t217, t218, t219, t220, t221, t222, t223, t224, t225, t226, t227, t228, t229, t230, t231, t232, t234, t235, t236, t237, t238, t240, t241, t242, t243, t244, t245, t246, t247, t248, t249, t250, t251, t252, t253, t254, t255, t256, t257, t258, t259, t260, t261, t262, t263, t264, t265, t266, t267, t268, t269, t270, t271, t272, t273, t274, t275, t276, t277, t278, t279, t280, t281, t282, t283, t284, t285, t286, t287, t289, t290, t291, t292, t293, t294, t295, t296, t297, t298, t300, t301, t302, t303, t304, t306, t307, t308, t309, t310, t311, t312, t313, t314, t315, t316, t317, t318, t319, t320, t321, t322, t323, t324, t325, t326, t327, t328, t329, t330, t331, t332, t333, t334, t335, t336, t337, t338, t339, t340, t341, t342, t343, t344, t345, t346, t347, t348, t349, t350, t351, t352, t353, t354, t355, t356, t357, t358, t359, t360, t361, t362, t363, t364, t365, t366, t367, t368, t369, t370, t371, t372, t373, t374, t375, t376, t377, t378, t379, t380, t381, t382, t383, t384, t385, t386, t387, t388, t389, t390, t391, t392, t393, t394, t395, t396, t397, t398, t399, t400, t401, t402, t403, t404, t405, t406, t407, t408, t409, t410, t411, t412, t413, t414, t415, t416, t417, t418, t419, t420, t421, t422, t423, t424, t425, t426, t427, t428, t429, t430, t431, t432, t433, t434, t435, t436, t437, t438, t439, t440, t441, t442, t443, t444, t445, t446, t447, t448, t449, t450, t451, t452, t453, t454, t455, t456, t457, t458, t459, t460, t461, t462, t463, t464, t465, t466, t467, t468, t469, t470, t471, t472, t473, t474, t475, t476, t477, t478, t479, t480, t481, t482, t483, t484, t485, t486, t487, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :5/7/478/490

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ CTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution CTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination CTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -timeout 3600 -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss128m -Xms40m -Xmx16000m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DNAwalker-PT-16redondantChoiceR"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itstools"
echo " Input is DNAwalker-PT-16redondantChoiceR, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r066-tajo-158922814000204"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DNAwalker-PT-16redondantChoiceR.tgz
mv DNAwalker-PT-16redondantChoiceR execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;