Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2020-input.r033-smll-158901925600012.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2020-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.....................
=====================================================================
Generated by BenchKit 2-4028
Executing tool smart
Input is CircadianClock-PT-000010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 1
Run identifier is r033-smll-158901925600012
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 192K
-rw-r--r-- 1 mcc users 3.4K Mar 30 00:59 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K Mar 30 00:59 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Mar 28 15:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 13K Mar 28 15:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 24 05:37 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K Mar 24 05:37 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Apr 8 14:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Apr 28 14:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Apr 8 14:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Apr 28 14:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K Mar 27 08:12 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K Mar 27 08:12 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Mar 26 07:34 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K Mar 26 07:34 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Mar 28 14:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Mar 28 14:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 24 05:37 instance
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 iscolored
-rw-r--r-- 1 mcc users 11K Mar 24 05:37 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME CircadianClock-PT-000010-CTLFireability-00
FORMULA_NAME CircadianClock-PT-000010-CTLFireability-01
FORMULA_NAME CircadianClock-PT-000010-CTLFireability-02
FORMULA_NAME CircadianClock-PT-000010-CTLFireability-03
FORMULA_NAME CircadianClock-PT-000010-CTLFireability-04
FORMULA_NAME CircadianClock-PT-000010-CTLFireability-05
FORMULA_NAME CircadianClock-PT-000010-CTLFireability-06
FORMULA_NAME CircadianClock-PT-000010-CTLFireability-07
FORMULA_NAME CircadianClock-PT-000010-CTLFireability-08
FORMULA_NAME CircadianClock-PT-000010-CTLFireability-09
FORMULA_NAME CircadianClock-PT-000010-CTLFireability-10
FORMULA_NAME CircadianClock-PT-000010-CTLFireability-11
FORMULA_NAME CircadianClock-PT-000010-CTLFireability-12
FORMULA_NAME CircadianClock-PT-000010-CTLFireability-13
FORMULA_NAME CircadianClock-PT-000010-CTLFireability-14
FORMULA_NAME CircadianClock-PT-000010-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1589031294211

======================================================
========== this is Smart for the MCC'2018 ============
======================================================
Running CircadianClock (PT), instance 000010
Examination CTLFireability
Parser /home/mcc/BenchKit/bin/parser/CTLFire.jar
Model checker /home/mcc/BenchKit/bin/rem_exec/smart

GOT IT HERE. BS
Petri model created: 14 places, 16 transitions, 58 arcs.
AT ITER 0 NEW BEST:: SOT 145 SOS 83 HAS SOPS 70 HAS SOUS 73 HAS SOUPS 60 WITH SCORE 60.083
AT ITER 77 NEW BEST:: SOT 145 SOS 81 HAS SOPS 68 HAS SOUS 70 HAS SOUPS 57 WITH SCORE 57.081
AT ITER 87 NEW BEST:: SOT 144 SOS 80 HAS SOPS 64 HAS SOUS 70 HAS SOUPS 54 WITH SCORE 54.08
AT ITER 140 NEW BEST:: SOT 144 SOS 79 HAS SOPS 64 HAS SOUS 69 HAS SOUPS 54 WITH SCORE 54.079
AT ITER 321 NEW BEST:: SOT 144 SOS 78 HAS SOPS 64 HAS SOUS 68 HAS SOUPS 54 WITH SCORE 54.078
Bounds file is: CTLFireability.xml
PROPERTY: CircadianClock-PT-000010-CTLFireability-00 (EF( (AX( (AF( ((potential((tk(P4)>=1) & (tk(P12)>=1))))))))))
PROPERTY: CircadianClock-PT-000010-CTLFireability-01 (EF( (EG( (AX( ((potential((tk(P6)>=1) & (tk(P14)>=1))))))))))
PROPERTY: CircadianClock-PT-000010-CTLFireability-02 (EU( (EX( ((potential((tk(P8)>=1)))))) , ( (EF( ((potential((tk(P4)>=1) & (tk(P14)>=1)))))) & (AG( ((potential((tk(P3)>=1) & (tk(P1)>=1)))))) ) ))
PROPERTY: CircadianClock-PT-000010-CTLFireability-03 (AG( (! (AX( ((potential((tk(P6)>=1) & (tk(P11)>=1)))))))))
PROPERTY: CircadianClock-PT-000010-CTLFireability-04 (AF( (! (! (AG( ((potential((tk(P4)>=1) & (tk(P12)>=1))))))))))
PROPERTY: CircadianClock-PT-000010-CTLFireability-05 (! (EX( (EX( (! ((potential((tk(P7)>=1) & (tk(P14)>=1))))))))))
PROPERTY: CircadianClock-PT-000010-CTLFireability-06 ( (! ( ( ( ( ((potential((tk(P6)>=1) & (tk(P11)>=1)))) & ((potential((tk(P8)>=1)))) ) | ( ((potential((tk(P1)>=1)))) & ((potential((tk(P1)>=1) & (tk(P9)>=1) & (tk(P13)>=1)))) ) ) | ( (! ((potential((tk(P1)>=1))))) & ( ((potential((tk(P5)>=1) & (tk(P11)>=1)))) | ((potential((tk(P5)>=1) & (tk(P11)>=1)))) ) ) ) | (EG( ( ((potential((tk(P9)>=1)))) | ((potential((tk(P5)>=1) & (tk(P11)>=1)))) ))) )) | (! (AU( ( ((potential((tk(P6)>=1) & (tk(P14)>=1)))) | ((potential((tk(P8)>=1)))) ) , ( ((potential((tk(P4)>=1) & (tk(P12)>=1)))) & ((potential((tk(P1)>=1) & (tk(P5)>=1)))) ) ))) )
PROPERTY: CircadianClock-PT-000010-CTLFireability-07 ((potential((tk(P4)>=1) & (tk(P12)>=1))))
PROPERTY: CircadianClock-PT-000010-CTLFireability-08 (EG( (! ((potential((tk(P3)>=1) & (tk(P12)>=1)))))))
PROPERTY: CircadianClock-PT-000010-CTLFireability-09 ( ((potential((tk(P1)>=1)))) | ( ( (AG( ( ((potential((tk(P9)>=1)))) | ((potential((tk(P4)>=1) & (tk(P14)>=1)))) ))) & (EF( ( ((potential((tk(P3)>=1) & (tk(P1)>=1)))) & ((potential((tk(P1)>=1)))) ))) ) & (EX( ( (! ((potential((tk(P8)>=1) & (tk(P10)>=1))))) | ( ((potential((tk(P4)>=1) & (tk(P12)>=1)))) & ((potential((tk(P9)>=1)))) ) ))) ) )
PROPERTY: CircadianClock-PT-000010-CTLFireability-10 ((potential((tk(P7)>=1))))
PROPERTY: CircadianClock-PT-000010-CTLFireability-11 (AX( ( ( ( ((potential((tk(P3)>=1) & (tk(P1)>=1)))) | ( ((potential((tk(P3)>=1) & (tk(P1)>=1)))) | ((potential((tk(P4)>=1) & (tk(P14)>=1)))) ) ) & ((potential((tk(P9)>=1)))) ) & (AU( ((potential((tk(P4)>=1) & (tk(P12)>=1)))) , ((potential((tk(P3)>=1) & (tk(P1)>=1)))) )) )))
PROPERTY: CircadianClock-PT-000010-CTLFireability-12 (! ((potential((tk(P3)>=1) & (tk(P12)>=1)))))
PROPERTY: CircadianClock-PT-000010-CTLFireability-13 ((potential((tk(P9)>=1))))
PROPERTY: CircadianClock-PT-000010-CTLFireability-14 (AU( ( (AG( ((potential((tk(P5)>=1) & (tk(P11)>=1)))))) & (AG( ((potential((tk(P2)>=1) & (tk(P10)>=1)))))) ) , (! (! ( ((potential((tk(P8)>=1)))) & ((potential((tk(P1)>=1)))) ))) ))
PROPERTY: CircadianClock-PT-000010-CTLFireability-15 ( ((potential((tk(P1)>=1) & (tk(P5)>=1)))) | (AF( ( ((potential((tk(P1)>=1) & (tk(P9)>=1) & (tk(P13)>=1)))) | ((potential((tk(P9)>=1)))) ))) )
FORMULA CircadianClock-PT-000010-CTLFireability-00 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA CircadianClock-PT-000010-CTLFireability-01 TRUE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA CircadianClock-PT-000010-CTLFireability-02 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS
FORMULA CircadianClock-PT-000010-CTLFireability-03 FALSE TECHNIQUES SEQUENTIAL_PROCESSING DECISION_DIAGRAMS

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="CircadianClock-PT-000010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="smart"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool smart"
echo " Input is CircadianClock-PT-000010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 1"
echo " Run identifier is r033-smll-158901925600012"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/CircadianClock-PT-000010.tgz
mv CircadianClock-PT-000010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;