Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2020-input.r006-smll-158897515400004.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2020-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
........................
=====================================================================
Generated by BenchKit 2-4028
Executing tool itstools
Input is ARMCacheCoherence-PT-none, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r006-smll-158897515400004
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 14M
-rw-r--r-- 1 mcc users 3.4K Mar 25 09:43 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K Mar 25 09:43 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Mar 25 09:36 CTLFireability.txt
-rw-r--r-- 1 mcc users 20K Mar 25 09:36 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 24 05:37 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K Mar 24 05:37 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.3K Apr 8 14:40 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Apr 28 14:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Apr 8 14:41 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Apr 28 14:00 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Mar 25 09:02 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K Mar 25 09:02 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Mar 25 08:56 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K Mar 25 08:56 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Mar 25 09:04 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Mar 25 09:04 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 24 05:37 instance
-rw-r--r-- 1 mcc users 6 Mar 24 05:37 iscolored
-rw-r--r-- 1 mcc users 14M Mar 24 05:37 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-00
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-01
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-02
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-03
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-04
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-05
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-06
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-07
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-08
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-09
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-10
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-11
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-12
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-13
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-14
FORMULA_NAME ARMCacheCoherence-PT-none-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1589197711151

[2020-05-11 11:48:34] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt, -timeout, 3600]
[2020-05-11 11:48:34] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2020-05-11 11:48:35] [INFO ] Load time of PNML (sax parser for PT used): 1354 ms
[2020-05-11 11:48:35] [INFO ] Transformed 87 places.
[2020-05-11 11:48:35] [INFO ] Transformed 33676 transitions.
[2020-05-11 11:48:35] [INFO ] Found NUPN structural information;
[2020-05-11 11:48:35] [INFO ] Parsed PT model containing 87 places and 33676 transitions in 1599 ms.
Ensure Unique test removed 32425 transitions
Reduce redundant transitions removed 32425 transitions.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 231 ms.
Incomplete random walk after 100000 steps, including 67 resets, run finished after 1301 ms. (steps per millisecond=76 ) properties seen :[0, 0, 1, 1, 1, 1, 1, 0, 0, 1, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0, 1, 1, 1, 1, 0, 1, 1, 0]
[2020-05-11 11:48:37] [INFO ] Flow matrix only has 500 transitions (discarded 751 similar events)
// Phase 1: matrix 500 rows 87 cols
[2020-05-11 11:48:37] [INFO ] Computed 12 place invariants in 19 ms
[2020-05-11 11:48:37] [INFO ] [Real]Absence check using 12 positive place invariants in 29 ms returned sat
[2020-05-11 11:48:37] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-05-11 11:48:38] [INFO ] [Real]Absence check using state equation in 354 ms returned sat
[2020-05-11 11:48:38] [INFO ] State equation strengthened by 192 read => feed constraints.
[2020-05-11 11:48:38] [INFO ] [Real]Added 192 Read/Feed constraints in 447 ms returned sat
[2020-05-11 11:48:38] [INFO ] Solution in real domain found non-integer solution.
[2020-05-11 11:48:38] [INFO ] [Nat]Absence check using 12 positive place invariants in 25 ms returned sat
[2020-05-11 11:48:38] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2020-05-11 11:48:39] [INFO ] [Nat]Absence check using state equation in 273 ms returned sat
[2020-05-11 11:48:39] [INFO ] [Nat]Added 192 Read/Feed constraints in 381 ms returned sat
[2020-05-11 11:48:40] [INFO ] Computed and/alt/rep : 1250/122617/499 causal constraints in 505 ms.
[2020-05-11 11:48:49] [INFO ] Added : 75 causal constraints over 15 iterations in 9617 ms. Result :unknown
[2020-05-11 11:48:49] [INFO ] [Real]Absence check using 12 positive place invariants in 14 ms returned unsat
[2020-05-11 11:48:49] [INFO ] [Real]Absence check using 12 positive place invariants in 8 ms returned sat
[2020-05-11 11:48:49] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-05-11 11:48:49] [INFO ] [Real]Absence check using state equation in 203 ms returned sat
[2020-05-11 11:48:49] [INFO ] [Real]Added 192 Read/Feed constraints in 312 ms returned sat
[2020-05-11 11:48:49] [INFO ] Solution in real domain found non-integer solution.
[2020-05-11 11:48:49] [INFO ] [Nat]Absence check using 12 positive place invariants in 15 ms returned sat
[2020-05-11 11:48:49] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2020-05-11 11:48:50] [INFO ] [Nat]Absence check using state equation in 301 ms returned sat
[2020-05-11 11:48:50] [INFO ] [Nat]Added 192 Read/Feed constraints in 412 ms returned sat
[2020-05-11 11:48:50] [INFO ] Computed and/alt/rep : 1250/122617/499 causal constraints in 175 ms.
[2020-05-11 11:49:01] [INFO ] Added : 95 causal constraints over 19 iterations in 10668 ms. Result :unknown
[2020-05-11 11:49:01] [INFO ] [Real]Absence check using 12 positive place invariants in 8 ms returned unsat
[2020-05-11 11:49:01] [INFO ] [Real]Absence check using 12 positive place invariants in 7 ms returned unsat
[2020-05-11 11:49:01] [INFO ] [Real]Absence check using 12 positive place invariants in 7 ms returned unsat
[2020-05-11 11:49:01] [INFO ] [Real]Absence check using 12 positive place invariants in 8 ms returned unsat
[2020-05-11 11:49:01] [INFO ] [Real]Absence check using 12 positive place invariants in 7 ms returned unsat
[2020-05-11 11:49:01] [INFO ] [Real]Absence check using 12 positive place invariants in 7 ms returned unsat
[2020-05-11 11:49:01] [INFO ] [Real]Absence check using 12 positive place invariants in 7 ms returned unsat
[2020-05-11 11:49:01] [INFO ] [Real]Absence check using 12 positive place invariants in 8 ms returned unsat
[2020-05-11 11:49:01] [INFO ] [Real]Absence check using 12 positive place invariants in 7 ms returned unsat
[2020-05-11 11:49:01] [INFO ] [Real]Absence check using 12 positive place invariants in 7 ms returned unsat
[2020-05-11 11:49:01] [INFO ] [Real]Absence check using 12 positive place invariants in 7 ms returned sat
[2020-05-11 11:49:01] [INFO ] [Real]Adding state equation constraints to refine reachable states.
[2020-05-11 11:49:01] [INFO ] [Real]Absence check using state equation in 175 ms returned sat
[2020-05-11 11:49:02] [INFO ] [Real]Added 192 Read/Feed constraints in 416 ms returned sat
[2020-05-11 11:49:02] [INFO ] Solution in real domain found non-integer solution.
[2020-05-11 11:49:02] [INFO ] [Nat]Absence check using 12 positive place invariants in 9 ms returned sat
[2020-05-11 11:49:02] [INFO ] [Nat]Adding state equation constraints to refine reachable states.
[2020-05-11 11:49:02] [INFO ] [Nat]Absence check using state equation in 211 ms returned sat
[2020-05-11 11:49:02] [INFO ] [Nat]Added 192 Read/Feed constraints in 282 ms returned sat
[2020-05-11 11:49:03] [INFO ] Computed and/alt/rep : 1250/122617/499 causal constraints in 248 ms.
[2020-05-11 11:49:22] [INFO ] Added : 140 causal constraints over 28 iterations in 19459 ms. Result :unknown
[2020-05-11 11:49:22] [INFO ] [Real]Absence check using 12 positive place invariants in 12 ms returned unsat
[2020-05-11 11:49:22] [INFO ] [Real]Absence check using 12 positive place invariants in 5 ms returned unsat
[2020-05-11 11:49:22] [INFO ] [Real]Absence check using 12 positive place invariants in 9 ms returned unsat
Successfully simplified 14 atomic propositions for a total of 14 simplifications.
[2020-05-11 11:49:22] [INFO ] Initial state reduction rules for CTL removed 4 formulas.
[2020-05-11 11:49:23] [INFO ] Flatten gal took : 376 ms
[2020-05-11 11:49:23] [INFO ] Initial state reduction rules for CTL removed 4 formulas.
[2020-05-11 11:49:23] [INFO ] Flatten gal took : 183 ms
FORMULA ARMCacheCoherence-PT-none-CTLFireability-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-CTLFireability-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-CTLFireability-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ARMCacheCoherence-PT-none-CTLFireability-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2020-05-11 11:49:23] [INFO ] Applying decomposition
[2020-05-11 11:49:23] [INFO ] Flatten gal took : 112 ms
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202005100927/bin/convert-linux64, -i, /tmp/graph11706952974751021906.txt, -o, /tmp/graph11706952974751021906.bin, -w, /tmp/graph11706952974751021906.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.202005100927/bin/louvain-linux64, /tmp/graph11706952974751021906.bin, -l, -1, -v, -w, /tmp/graph11706952974751021906.weights, -q, 0, -e, 0.001], workingDir=null]
[2020-05-11 11:49:23] [INFO ] Decomposing Gal with order
[2020-05-11 11:49:23] [INFO ] Rewriting arrays to variables to allow decomposition.
[2020-05-11 11:49:24] [INFO ] Removed a total of 4394 redundant transitions.
[2020-05-11 11:49:24] [INFO ] Flatten gal took : 305 ms
[2020-05-11 11:49:24] [INFO ] Fuse similar labels procedure discarded/fused a total of 104 labels/synchronizations in 87 ms.
[2020-05-11 11:49:24] [INFO ] Time to serialize gal into /home/mcc/execution/CTLFireability.pnml.gal : 15 ms
[2020-05-11 11:49:24] [INFO ] Time to serialize properties into /home/mcc/execution/CTLFireability.ctl : 2 ms
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/CTLFireability.pnml.gal, -t, CGAL, -ctl, /home/mcc/execution/CTLFireability.ctl], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.202005100927/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/CTLFireability.pnml.gal -t CGAL -ctl /home/mcc/execution/CTLFireability.ctl
No direction supplied, using forward translation only.
Parsed 12 CTL formulae.
built 26 ordering constraints for composite.
built 15 ordering constraints for composite.
built 25 ordering constraints for composite.
built 42 ordering constraints for composite.
built 43 ordering constraints for composite.
built 25 ordering constraints for composite.
built 29 ordering constraints for composite.
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
reachable,3.20568e+08,1.07764,28952,186,130,35315,6219,1049,120368,92,42665,0


Converting to forward existential form...Done !
original formula: EF(((((i4.u1.p4==1)&&(i4.u7.p37==1))&&(i1.u13.p76==1))&&((((i4.u1.p3==1)&&(i5.i1.u11.p67==1))&&(u15.p84==1))||((((((((i4.u1.p4==1)&&(i5.i0.u9.p54==1))&&(i5.i1.u11.p69==1))&&(u15.p84==1))&&(i4.u1.p4==1))&&(i5.i0.u9.p54==1))&&(i5.i1.u11.p69==1))&&(i4.u14.p80==1)))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * ((((i4.u1.p4==1)&&(i4.u7.p37==1))&&(i1.u13.p76==1))&&((((i4.u1.p3==1)&&(i5.i1.u11.p67==1))&&(u15.p84==1))||((((((((i4.u1.p4==1)&&(i5.i0.u9.p54==1))&&(i5.i1.u11.p69==1))&&(u15.p84==1))&&(i4.u1.p4==1))&&(i5.i0.u9.p54==1))&&(i5.i1.u11.p69==1))&&(i4.u14.p80==1)))))] != FALSE
(forward)formula 0,1,1.08264,28952,1,0,35315,6219,1118,120368,101,42665,157
FORMULA ARMCacheCoherence-PT-none-CTLFireability-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is TRUE !

***************************************

original formula: EX((EX(((((i4.u1.p5==1)&&(i5.i0.u9.p54==1))&&(i5.i1.u11.p67==1))&&(u15.p84==1))) * (((((i4.u1.p5==1)&&(i5.i0.u9.p52==1))&&(i5.i1.u11.p67==1))&&(u15.p84==1))||(((((((i4.u1.p3==1)&&(i2.u5.p22==1))&&(i4.u7.p37==1))&&(u15.p84==1))&&(i4.u1.p5==1))&&(i5.i0.u9.p54==1))&&(i5.i1.u11.p67==1)))))
=> equivalent forward existential formula: [(EY((EY(Init) * (((((i4.u1.p5==1)&&(i5.i0.u9.p52==1))&&(i5.i1.u11.p67==1))&&(u15.p84==1))||(((((((i4.u1.p3==1)&&(i2.u5.p22==1))&&(i4.u7.p37==1))&&(u15.p84==1))&&(i4.u1.p5==1))&&(i5.i0.u9.p54==1))&&(i5.i1.u11.p67==1))))) * ((((i4.u1.p5==1)&&(i5.i0.u9.p54==1))&&(i5.i1.u11.p67==1))&&(u15.p84==1)))] != FALSE
(forward)formula 1,0,1.08945,28952,1,0,35315,6219,1715,120368,125,42665,704
FORMULA ARMCacheCoherence-PT-none-CTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is FALSE !

***************************************

original formula: EX(EF(((((i4.u1.p3==1)&&(i5.i0.u9.p52==1))&&(i5.i1.u11.p69==1))&&(i4.u14.p80==1))))
=> equivalent forward existential formula: [(FwdU(EY(Init),TRUE) * ((((i4.u1.p3==1)&&(i5.i0.u9.p52==1))&&(i5.i1.u11.p69==1))&&(i4.u14.p80==1)))] != FALSE
(forward)formula 2,1,2.15574,33496,1,0,41241,6360,2226,147768,173,46616,111422
FORMULA ARMCacheCoherence-PT-none-CTLFireability-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is TRUE !

***************************************

original formula: !(EF(((((i4.u1.p3==1)&&(i5.i0.u9.p52==1))&&(i5.i1.u11.p67==1))&&(i4.u14.p80==1))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * ((((i4.u1.p3==1)&&(i5.i0.u9.p52==1))&&(i5.i1.u11.p67==1))&&(i4.u14.p80==1)))] = FALSE
(forward)formula 3,0,2.15835,34024,1,0,41247,6360,2230,147777,173,46616,111454
FORMULA ARMCacheCoherence-PT-none-CTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is FALSE !

***************************************

original formula: !(EF((((i1.u0.p2==1)&&(i5.i1.u11.p67==1))&&(u15.p83==1))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * (((i1.u0.p2==1)&&(i5.i1.u11.p67==1))&&(u15.p83==1)))] = FALSE
(forward)formula 4,0,2.16028,34024,1,0,41257,6360,2236,147790,173,46616,111484
FORMULA ARMCacheCoherence-PT-none-CTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is FALSE !

***************************************

original formula: EX(((((i4.u1.p5==1)&&(i5.i0.u9.p52==1))&&(i5.i1.u11.p67==1))&&(u15.p84==1)))
=> equivalent forward existential formula: [(EY(Init) * ((((i4.u1.p5==1)&&(i5.i0.u9.p52==1))&&(i5.i1.u11.p67==1))&&(u15.p84==1)))] != FALSE
(forward)formula 5,0,2.16216,34024,1,0,41260,6360,2236,147790,173,46616,111489
FORMULA ARMCacheCoherence-PT-none-CTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is FALSE !

***************************************

original formula: AG(EX((((i1.u0.p2!=1)||(i4.u7.p37!=1))||(i1.u13.p76!=1))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(EX((((i1.u0.p2!=1)||(i4.u7.p37!=1))||(i1.u13.p76!=1)))))] = FALSE
Reverse transition relation is NOT exact ! Due to transitions u15.t4, i1.u13.t20, i2.u5.t109, i2.u5.t111, i4.u7.t83, i4.u7.t85, i4.u14.t13, i5.i0.u9.t57, i5.i0.u9.t59, i5.i1.u11.t31, i5.i1.u11.t33, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/526/11/537
(forward)formula 6,1,2.44978,40360,1,0,50568,7799,6934,186030,485,51716,140265
FORMULA ARMCacheCoherence-PT-none-CTLFireability-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is TRUE !

***************************************

original formula: AG(((((!(EF((((i4.u1.p3==1)&&(i5.i0.u9.p52==1))&&(u15.p83==1)))) + (i4.u1.p3!=1)) + (i4.u7.p37!=1)) + (i1.u13.p76!=1)) + (((i1.u0.p1==1)&&(i4.u7.p37==1))&&(u15.p83==1))))
=> equivalent forward existential formula: [(FwdU(((((FwdU(Init,TRUE) * !((((i1.u0.p1==1)&&(i4.u7.p37==1))&&(u15.p83==1)))) * !((i1.u13.p76!=1))) * !((i4.u7.p37!=1))) * !((i4.u1.p3!=1))),TRUE) * (((i4.u1.p3==1)&&(i5.i0.u9.p52==1))&&(u15.p83==1)))] = FALSE
(forward)formula 7,0,2.54236,41944,1,0,53018,7937,6945,194835,486,52801,146756
FORMULA ARMCacheCoherence-PT-none-CTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is FALSE !

***************************************

original formula: AG(EX(EF(((((i1.u0.p2==1)&&(i2.u5.p22==1))&&(i4.u7.p39==1))&&(u15.p84==1)))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(EX(E(TRUE U ((((i1.u0.p2==1)&&(i2.u5.p22==1))&&(i4.u7.p39==1))&&(u15.p84==1))))))] = FALSE
(forward)formula 8,0,4.95322,88936,1,0,107552,12590,7296,482552,510,72076,333985
FORMULA ARMCacheCoherence-PT-none-CTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is FALSE !

***************************************

original formula: EF(EG(((((i4.u1.p4==1)&&(i5.i0.u9.p52==1))&&(i5.i1.u11.p67==1))&&(u15.p84==1))))
=> equivalent forward existential formula: [FwdG(FwdU(Init,TRUE),((((i4.u1.p4==1)&&(i5.i0.u9.p52==1))&&(i5.i1.u11.p67==1))&&(u15.p84==1)))] != FALSE
Using saturation style SCC detection
Using saturation style SCC detection
Using saturation style SCC detection
Fast SCC detection found an SCC at level 1
Fast SCC detection found an SCC at level 2
Fast SCC detection found an SCC at level 3
Fast SCC detection found an SCC at level 4
Fast SCC detection found an SCC at level 5
(forward)formula 9,1,4.99538,89200,1,0,108059,12593,7365,483963,528,72268,335250
FORMULA ARMCacheCoherence-PT-none-CTLFireability-11 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is TRUE !

***************************************

original formula: EF(((EG(((((i4.u1.p4==1)&&(i2.u5.p22==1))&&(i4.u7.p37==1))&&(i4.u14.p80==1))) * AF(((((i4.u1.p5!=1)||(i2.u5.p22!=1))||(i4.u7.p39!=1))||(u15.p84!=1)))) * (((i1.u0.p2!=1)||(i5.i0.u9.p52!=1))||(i1.u13.p76!=1))))
=> equivalent forward existential formula: [(((FwdU(Init,TRUE) * (((i1.u0.p2!=1)||(i5.i0.u9.p52!=1))||(i1.u13.p76!=1))) * EG(((((i4.u1.p4==1)&&(i2.u5.p22==1))&&(i4.u7.p37==1))&&(i4.u14.p80==1)))) * !(EG(!(((((i4.u1.p5!=1)||(i2.u5.p22!=1))||(i4.u7.p39!=1))||(u15.p84!=1))))))] != FALSE
(forward)formula 10,1,5.0162,89992,1,0,108530,12614,7418,485598,531,72513,336624
FORMULA ARMCacheCoherence-PT-none-CTLFireability-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is TRUE !

***************************************

original formula: EF(AG((((((i4.u1.p3!=1)||(i2.u5.p22!=1))||(i4.u7.p37!=1))||(u15.p84!=1))&&((((i4.u1.p4!=1)||(i2.u5.p22!=1))||(i4.u7.p39!=1))||(i4.u14.p80!=1)))))
=> equivalent forward existential formula: [(FwdU(Init,TRUE) * !(E(TRUE U !((((((i4.u1.p3!=1)||(i2.u5.p22!=1))||(i4.u7.p37!=1))||(u15.p84!=1))&&((((i4.u1.p4!=1)||(i2.u5.p22!=1))||(i4.u7.p39!=1))||(i4.u14.p80!=1)))))))] != FALSE
(forward)formula 11,1,6.60366,118504,1,0,138839,13038,7436,685478,531,75666,437247
FORMULA ARMCacheCoherence-PT-none-CTLFireability-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Formula is TRUE !

***************************************


BK_STOP 1589197772668

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ CTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution CTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -timeout 3600
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination CTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -timeout 3600 -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss128m -Xms40m -Xmx16000m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ARMCacheCoherence-PT-none"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-4028"
echo " Executing tool itstools"
echo " Input is ARMCacheCoherence-PT-none, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r006-smll-158897515400004"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ARMCacheCoherence-PT-none.tgz
mv ARMCacheCoherence-PT-none execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;