Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/local/x2003239/mcc2019-input.r203-csrt-155344537800201.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2019-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-3954
Executing tool itstoolsm
Input is FamilyReunion-PT-L00050M0005C002P002G001, examination is GlobalProperties
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r203-csrt-155344537800201
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 9.5M
-rw-r--r-- 1 mcc users 5.1K Mar 24 07:04 CTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Mar 24 07:04 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.4K Mar 24 06:55 CTLFireability.txt
-rw-r--r-- 1 mcc users 22K Mar 24 06:55 CTLFireability.xml
-rw-r--r-- 1 mcc users 127 Apr 5 12:35 GlobalProperties.txt
-rw-r--r-- 1 mcc users 365 Apr 5 12:35 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.7K Mar 24 06:51 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Mar 24 06:51 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Mar 24 06:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 13K Mar 24 06:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 24 00:18 NewModel
-rw-r--r-- 1 mcc users 4.5K Mar 24 06:38 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 22K Mar 24 06:38 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.7K Mar 24 06:30 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K Mar 24 06:30 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Mar 24 06:46 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Mar 24 06:46 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 24 00:18 equiv_col
-rw-r--r-- 1 mcc users 24 Mar 24 00:18 instance
-rw-r--r-- 1 mcc users 6 Mar 24 00:18 iscolored
-rw-r--r-- 1 mcc users 9.3M Mar 24 00:18 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-PT-L00050M0005C002P002G001-GlobalProperties-0

=== Now, execution of the tool begins

BK_START 1554499344430

Working with output stream class java.io.PrintStream
Flatten gal took : 3334 ms
Constant places removed 224 places and 51 transitions.
Implicit places reduction removed 1836 places :[l7_50_5, l7_49_5, l7_48_5, l7_47_5, l7_46_5, l7_45_5, l7_44_5, l7_43_5, l7_42_5, l7_41_5, l7_40_5, l7_39_5, l7_38_5, l7_37_5, l7_36_5, l7_35_5, l7_34_5, l7_33_5, l7_32_5, l7_31_5, l7_30_5, l7_29_5, l7_28_5, l7_27_5, l7_26_5, l7_25_5, l7_24_5, l7_23_5, l7_22_5, l7_21_5, l7_20_5, l7_19_5, l7_18_5, l7_17_5, l7_16_5, l7_15_5, l7_14_5, l7_13_5, l7_12_5, l7_11_5, l7_10_5, l7_9_5, l7_8_5, l7_7_5, l7_6_5, l7_5_5, l7_4_5, l7_3_5, l7_2_5, l7_1_5, l7_0_5, l7_50_4, l7_49_4, l7_48_4, l7_47_4, l7_46_4, l7_45_4, l7_44_4, l7_43_4, l7_42_4, l7_41_4, l7_40_4, l7_39_4, l7_38_4, l7_37_4, l7_36_4, l7_35_4, l7_34_4, l7_33_4, l7_32_4, l7_31_4, l7_30_4, l7_29_4, l7_28_4, l7_27_4, l7_26_4, l7_25_4, l7_24_4, l7_23_4, l7_22_4, l7_21_4, l7_20_4, l7_19_4, l7_18_4, l7_17_4, l7_16_4, l7_15_4, l7_14_4, l7_13_4, l7_12_4, l7_11_4, l7_10_4, l7_9_4, l7_8_4, l7_7_4, l7_6_4, l7_5_4, l7_4_4, l7_3_4, l7_2_4, l7_1_4, l7_0_4, l7_50_3, l7_49_3, l7_48_3, l7_47_3, l7_46_3, l7_45_3, l7_44_3, l7_43_3, l7_42_3, l7_41_3, l7_40_3, l7_39_3, l7_38_3, l7_37_3, l7_36_3, l7_35_3, l7_34_3, l7_33_3, l7_32_3, l7_31_3, l7_30_3, l7_29_3, l7_28_3, l7_27_3, l7_26_3, l7_25_3, l7_24_3, l7_23_3, l7_22_3, l7_21_3, l7_20_3, l7_19_3, l7_18_3, l7_17_3, l7_16_3, l7_15_3, l7_14_3, l7_13_3, l7_12_3, l7_11_3, l7_10_3, l7_9_3, l7_8_3, l7_7_3, l7_6_3, l7_5_3, l7_4_3, l7_3_3, l7_2_3, l7_1_3, l7_0_3, l7_50_2, l7_49_2, l7_48_2, l7_47_2, l7_46_2, l7_45_2, l7_44_2, l7_43_2, l7_42_2, l7_41_2, l7_40_2, l7_39_2, l7_38_2, l7_37_2, l7_36_2, l7_35_2, l7_34_2, l7_33_2, l7_32_2, l7_31_2, l7_30_2, l7_29_2, l7_28_2, l7_27_2, l7_26_2, l7_25_2, l7_24_2, l7_23_2, l7_22_2, l7_21_2, l7_20_2, l7_19_2, l7_18_2, l7_17_2, l7_16_2, l7_15_2, l7_14_2, l7_13_2, l7_12_2, l7_11_2, l7_10_2, l7_9_2, l7_8_2, l7_7_2, l7_6_2, l7_5_2, l7_4_2, l7_3_2, l7_2_2, l7_1_2, l7_0_2, l7_50_1, l7_49_1, l7_48_1, l7_47_1, l7_46_1, l7_45_1, l7_44_1, l7_43_1, l7_42_1, l7_41_1, l7_40_1, l7_39_1, l7_38_1, l7_37_1, l7_36_1, l7_35_1, l7_34_1, l7_33_1, l7_32_1, l7_31_1, l7_30_1, l7_29_1, l7_28_1, l7_27_1, l7_26_1, l7_25_1, l7_24_1, l7_23_1, l7_22_1, l7_21_1, l7_20_1, l7_19_1, l7_18_1, l7_17_1, l7_16_1, l7_15_1, l7_14_1, l7_13_1, l7_12_1, l7_11_1, l7_10_1, l7_9_1, l7_8_1, l7_7_1, l7_6_1, l7_5_1, l7_4_1, l7_3_1, l7_2_1, l7_1_1, l7_0_1, l7_50_0, l7_49_0, l7_48_0, l7_47_0, l7_46_0, l7_45_0, l7_44_0, l7_43_0, l7_42_0, l7_41_0, l7_40_0, l7_39_0, l7_38_0, l7_37_0, l7_36_0, l7_35_0, l7_34_0, l7_33_0, l7_32_0, l7_31_0, l7_30_0, l7_29_0, l7_28_0, l7_27_0, l7_26_0, l7_25_0, l7_24_0, l7_23_0, l7_22_0, l7_21_0, l7_20_0, l7_19_0, l7_18_0, l7_17_0, l7_16_0, l7_15_0, l7_14_0, l7_13_0, l7_12_0, l7_11_0, l7_10_0, l7_9_0, l7_8_0, l7_7_0, l7_6_0, l7_5_0, l7_4_0, l7_3_0, l7_2_0, l7_1_0, l7_0_0, m6_50_5, m6_49_5, m6_48_5, m6_47_5, m6_46_5, m6_45_5, m6_44_5, m6_43_5, m6_42_5, m6_41_5, m6_40_5, m6_39_5, m6_38_5, m6_37_5, m6_36_5, m6_35_5, m6_34_5, m6_33_5, m6_32_5, m6_31_5, m6_30_5, m6_29_5, m6_28_5, m6_27_5, m6_26_5, m6_25_5, m6_24_5, m6_23_5, m6_22_5, m6_21_5, m6_20_5, m6_19_5, m6_18_5, m6_17_5, m6_16_5, m6_15_5, m6_14_5, m6_13_5, m6_12_5, m6_11_5, m6_10_5, m6_9_5, m6_8_5, m6_7_5, m6_6_5, m6_5_5, m6_4_5, m6_3_5, m6_2_5, m6_1_5, m6_0_5, m6_50_4, m6_49_4, m6_48_4, m6_47_4, m6_46_4, m6_45_4, m6_44_4, m6_43_4, m6_42_4, m6_41_4, m6_40_4, m6_39_4, m6_38_4, m6_37_4, m6_36_4, m6_35_4, m6_34_4, m6_33_4, m6_32_4, m6_31_4, m6_30_4, m6_29_4, m6_28_4, m6_27_4, m6_26_4, m6_25_4, m6_24_4, m6_23_4, m6_22_4, m6_21_4, m6_20_4, m6_19_4, m6_18_4, m6_17_4, m6_16_4, m6_15_4, m6_14_4, m6_13_4, m6_12_4, m6_11_4, m6_10_4, m6_9_4, m6_8_4, m6_7_4, m6_6_4, m6_5_4, m6_4_4, m6_3_4, m6_2_4, m6_1_4, m6_0_4, m6_50_3, m6_49_3, m6_48_3, m6_47_3, m6_46_3, m6_45_3, m6_44_3, m6_43_3, m6_42_3, m6_41_3, m6_40_3, m6_39_3, m6_38_3, m6_37_3, m6_36_3, m6_35_3, m6_34_3, m6_33_3, m6_32_3, m6_31_3, m6_30_3, m6_29_3, m6_28_3, m6_27_3, m6_26_3, m6_25_3, m6_24_3, m6_23_3, m6_22_3, m6_21_3, m6_20_3, m6_19_3, m6_18_3, m6_17_3, m6_16_3, m6_15_3, m6_14_3, m6_13_3, m6_12_3, m6_11_3, m6_10_3, m6_9_3, m6_8_3, m6_7_3, m6_6_3, m6_5_3, m6_4_3, m6_3_3, m6_2_3, m6_1_3, m6_0_3, m6_50_2, m6_49_2, m6_48_2, m6_47_2, m6_46_2, m6_45_2, m6_44_2, m6_43_2, m6_42_2, m6_41_2, m6_40_2, m6_39_2, m6_38_2, m6_37_2, m6_36_2, m6_35_2, m6_34_2, m6_33_2, m6_32_2, m6_31_2, m6_30_2, m6_29_2, m6_28_2, m6_27_2, m6_26_2, m6_25_2, m6_24_2, m6_23_2, m6_22_2, m6_21_2, m6_20_2, m6_19_2, m6_18_2, m6_17_2, m6_16_2, m6_15_2, m6_14_2, m6_13_2, m6_12_2, m6_11_2, m6_10_2, m6_9_2, m6_8_2, m6_7_2, m6_6_2, m6_5_2, m6_4_2, m6_3_2, m6_2_2, m6_1_2, m6_0_2, m6_50_1, m6_49_1, m6_48_1, m6_47_1, m6_46_1, m6_45_1, m6_44_1, m6_43_1, m6_42_1, m6_41_1, m6_40_1, m6_39_1, m6_38_1, m6_37_1, m6_36_1, m6_35_1, m6_34_1, m6_33_1, m6_32_1, m6_31_1, m6_30_1, m6_29_1, m6_28_1, m6_27_1, m6_26_1, m6_25_1, m6_24_1, m6_23_1, m6_22_1, m6_21_1, m6_20_1, m6_19_1, m6_18_1, m6_17_1, m6_16_1, m6_15_1, m6_14_1, m6_13_1, m6_12_1, m6_11_1, m6_10_1, m6_9_1, m6_8_1, m6_7_1, m6_6_1, m6_5_1, m6_4_1, m6_3_1, m6_2_1, m6_1_1, m6_0_1, m6_50_0, m6_49_0, m6_48_0, m6_47_0, m6_46_0, m6_45_0, m6_44_0, m6_43_0, m6_42_0, m6_41_0, m6_40_0, m6_39_0, m6_38_0, m6_37_0, m6_36_0, m6_35_0, m6_34_0, m6_33_0, m6_32_0, m6_31_0, m6_30_0, m6_29_0, m6_28_0, m6_27_0, m6_26_0, m6_25_0, m6_24_0, m6_23_0, m6_22_0, m6_21_0, m6_20_0, m6_19_0, m6_18_0, m6_17_0, m6_16_0, m6_15_0, m6_14_0, m6_13_0, m6_12_0, m6_11_0, m6_10_0, m6_9_0, m6_8_0, m6_7_0, m6_6_0, m6_5_0, m6_4_0, m6_3_0, m6_2_0, m6_1_0, m6_0_0, l5_50_5, l5_49_5, l5_48_5, l5_47_5, l5_46_5, l5_45_5, l5_44_5, l5_43_5, l5_42_5, l5_41_5, l5_40_5, l5_39_5, l5_38_5, l5_37_5, l5_36_5, l5_35_5, l5_34_5, l5_33_5, l5_32_5, l5_31_5, l5_30_5, l5_29_5, l5_28_5, l5_27_5, l5_26_5, l5_25_5, l5_24_5, l5_23_5, l5_22_5, l5_21_5, l5_20_5, l5_19_5, l5_18_5, l5_17_5, l5_16_5, l5_15_5, l5_14_5, l5_13_5, l5_12_5, l5_11_5, l5_10_5, l5_9_5, l5_8_5, l5_7_5, l5_6_5, l5_5_5, l5_4_5, l5_3_5, l5_2_5, l5_1_5, l5_0_5, l5_50_4, l5_49_4, l5_48_4, l5_47_4, l5_46_4, l5_45_4, l5_44_4, l5_43_4, l5_42_4, l5_41_4, l5_40_4, l5_39_4, l5_38_4, l5_37_4, l5_36_4, l5_35_4, l5_34_4, l5_33_4, l5_32_4, l5_31_4, l5_30_4, l5_29_4, l5_28_4, l5_27_4, l5_26_4, l5_25_4, l5_24_4, l5_23_4, l5_22_4, l5_21_4, l5_20_4, l5_19_4, l5_18_4, l5_17_4, l5_16_4, l5_15_4, l5_14_4, l5_13_4, l5_12_4, l5_11_4, l5_10_4, l5_9_4, l5_8_4, l5_7_4, l5_6_4, l5_5_4, l5_4_4, l5_3_4, l5_2_4, l5_1_4, l5_0_4, l5_50_3, l5_49_3, l5_48_3, l5_47_3, l5_46_3, l5_45_3, l5_44_3, l5_43_3, l5_42_3, l5_41_3, l5_40_3, l5_39_3, l5_38_3, l5_37_3, l5_36_3, l5_35_3, l5_34_3, l5_33_3, l5_32_3, l5_31_3, l5_30_3, l5_29_3, l5_28_3, l5_27_3, l5_26_3, l5_25_3, l5_24_3, l5_23_3, l5_22_3, l5_21_3, l5_20_3, l5_19_3, l5_18_3, l5_17_3, l5_16_3, l5_15_3, l5_14_3, l5_13_3, l5_12_3, l5_11_3, l5_10_3, l5_9_3, l5_8_3, l5_7_3, l5_6_3, l5_5_3, l5_4_3, l5_3_3, l5_2_3, l5_1_3, l5_0_3, l5_50_2, l5_49_2, l5_48_2, l5_47_2, l5_46_2, l5_45_2, l5_44_2, l5_43_2, l5_42_2, l5_41_2, l5_40_2, l5_39_2, l5_38_2, l5_37_2, l5_36_2, l5_35_2, l5_34_2, l5_33_2, l5_32_2, l5_31_2, l5_30_2, l5_29_2, l5_28_2, l5_27_2, l5_26_2, l5_25_2, l5_24_2, l5_23_2, l5_22_2, l5_21_2, l5_20_2, l5_19_2, l5_18_2, l5_17_2, l5_16_2, l5_15_2, l5_14_2, l5_13_2, l5_12_2, l5_11_2, l5_10_2, l5_9_2, l5_8_2, l5_7_2, l5_6_2, l5_5_2, l5_4_2, l5_3_2, l5_2_2, l5_1_2, l5_0_2, l5_50_1, l5_49_1, l5_48_1, l5_47_1, l5_46_1, l5_45_1, l5_44_1, l5_43_1, l5_42_1, l5_41_1, l5_40_1, l5_39_1, l5_38_1, l5_37_1, l5_36_1, l5_35_1, l5_34_1, l5_33_1, l5_32_1, l5_31_1, l5_30_1, l5_29_1, l5_28_1, l5_27_1, l5_26_1, l5_25_1, l5_24_1, l5_23_1, l5_22_1, l5_21_1, l5_20_1, l5_19_1, l5_18_1, l5_17_1, l5_16_1, l5_15_1, l5_14_1, l5_13_1, l5_12_1, l5_11_1, l5_10_1, l5_9_1, l5_8_1, l5_7_1, l5_6_1, l5_5_1, l5_4_1, l5_3_1, l5_2_1, l5_1_1, l5_0_1, l5_50_0, l5_49_0, l5_48_0, l5_47_0, l5_46_0, l5_45_0, l5_44_0, l5_43_0, l5_42_0, l5_41_0, l5_40_0, l5_39_0, l5_38_0, l5_37_0, l5_36_0, l5_35_0, l5_34_0, l5_33_0, l5_32_0, l5_31_0, l5_30_0, l5_29_0, l5_28_0, l5_27_0, l5_26_0, l5_25_0, l5_24_0, l5_23_0, l5_22_0, l5_21_0, l5_20_0, l5_19_0, l5_18_0, l5_17_0, l5_16_0, l5_15_0, l5_14_0, l5_13_0, l5_12_0, l5_11_0, l5_10_0, l5_9_0, l5_8_0, l5_7_0, l5_6_0, l5_5_0, l5_4_0, l5_3_0, l5_2_0, l5_1_0, l5_0_0, m4_50_5, m4_49_5, m4_48_5, m4_47_5, m4_46_5, m4_45_5, m4_44_5, m4_43_5, m4_42_5, m4_41_5, m4_40_5, m4_39_5, m4_38_5, m4_37_5, m4_36_5, m4_35_5, m4_34_5, m4_33_5, m4_32_5, m4_31_5, m4_30_5, m4_29_5, m4_28_5, m4_27_5, m4_26_5, m4_25_5, m4_24_5, m4_23_5, m4_22_5, m4_21_5, m4_20_5, m4_19_5, m4_18_5, m4_17_5, m4_16_5, m4_15_5, m4_14_5, m4_13_5, m4_12_5, m4_11_5, m4_10_5, m4_9_5, m4_8_5, m4_7_5, m4_6_5, m4_5_5, m4_4_5, m4_3_5, m4_2_5, m4_1_5, m4_0_5, m4_50_4, m4_49_4, m4_48_4, m4_47_4, m4_46_4, m4_45_4, m4_44_4, m4_43_4, m4_42_4, m4_41_4, m4_40_4, m4_39_4, m4_38_4, m4_37_4, m4_36_4, m4_35_4, m4_34_4, m4_33_4, m4_32_4, m4_31_4, m4_30_4, m4_29_4, m4_28_4, m4_27_4, m4_26_4, m4_25_4, m4_24_4, m4_23_4, m4_22_4, m4_21_4, m4_20_4, m4_19_4, m4_18_4, m4_17_4, m4_16_4, m4_15_4, m4_14_4, m4_13_4, m4_12_4, m4_11_4, m4_10_4, m4_9_4, m4_8_4, m4_7_4, m4_6_4, m4_5_4, m4_4_4, m4_3_4, m4_2_4, m4_1_4, m4_0_4, m4_50_3, m4_49_3, m4_48_3, m4_47_3, m4_46_3, m4_45_3, m4_44_3, m4_43_3, m4_42_3, m4_41_3, m4_40_3, m4_39_3, m4_38_3, m4_37_3, m4_36_3, m4_35_3, m4_34_3, m4_33_3, m4_32_3, m4_31_3, m4_30_3, m4_29_3, m4_28_3, m4_27_3, m4_26_3, m4_25_3, m4_24_3, m4_23_3, m4_22_3, m4_21_3, m4_20_3, m4_19_3, m4_18_3, m4_17_3, m4_16_3, m4_15_3, m4_14_3, m4_13_3, m4_12_3, m4_11_3, m4_10_3, m4_9_3, m4_8_3, m4_7_3, m4_6_3, m4_5_3, m4_4_3, m4_3_3, m4_2_3, m4_1_3, m4_0_3, m4_50_2, m4_49_2, m4_48_2, m4_47_2, m4_46_2, m4_45_2, m4_44_2, m4_43_2, m4_42_2, m4_41_2, m4_40_2, m4_39_2, m4_38_2, m4_37_2, m4_36_2, m4_35_2, m4_34_2, m4_33_2, m4_32_2, m4_31_2, m4_30_2, m4_29_2, m4_28_2, m4_27_2, m4_26_2, m4_25_2, m4_24_2, m4_23_2, m4_22_2, m4_21_2, m4_20_2, m4_19_2, m4_18_2, m4_17_2, m4_16_2, m4_15_2, m4_14_2, m4_13_2, m4_12_2, m4_11_2, m4_10_2, m4_9_2, m4_8_2, m4_7_2, m4_6_2, m4_5_2, m4_4_2, m4_3_2, m4_2_2, m4_1_2, m4_0_2, m4_50_1, m4_49_1, m4_48_1, m4_47_1, m4_46_1, m4_45_1, m4_44_1, m4_43_1, m4_42_1, m4_41_1, m4_40_1, m4_39_1, m4_38_1, m4_37_1, m4_36_1, m4_35_1, m4_34_1, m4_33_1, m4_32_1, m4_31_1, m4_30_1, m4_29_1, m4_28_1, m4_27_1, m4_26_1, m4_25_1, m4_24_1, m4_23_1, m4_22_1, m4_21_1, m4_20_1, m4_19_1, m4_18_1, m4_17_1, m4_16_1, m4_15_1, m4_14_1, m4_13_1, m4_12_1, m4_11_1, m4_10_1, m4_9_1, m4_8_1, m4_7_1, m4_6_1, m4_5_1, m4_4_1, m4_3_1, m4_2_1, m4_1_1, m4_0_1, m4_50_0, m4_49_0, m4_48_0, m4_47_0, m4_46_0, m4_45_0, m4_44_0, m4_43_0, m4_42_0, m4_41_0, m4_40_0, m4_39_0, m4_38_0, m4_37_0, m4_36_0, m4_35_0, m4_34_0, m4_33_0, m4_32_0, m4_31_0, m4_30_0, m4_29_0, m4_28_0, m4_27_0, m4_26_0, m4_25_0, m4_24_0, m4_23_0, m4_22_0, m4_21_0, m4_20_0, m4_19_0, m4_18_0, m4_17_0, m4_16_0, m4_15_0, m4_14_0, m4_13_0, m4_12_0, m4_11_0, m4_10_0, m4_9_0, m4_8_0, m4_7_0, m4_6_0, m4_5_0, m4_4_0, m4_3_0, m4_2_0, m4_1_0, m4_0_0, l3_50_5, l3_49_5, l3_48_5, l3_47_5, l3_46_5, l3_45_5, l3_44_5, l3_43_5, l3_42_5, l3_41_5, l3_40_5, l3_39_5, l3_38_5, l3_37_5, l3_36_5, l3_35_5, l3_34_5, l3_33_5, l3_32_5, l3_31_5, l3_30_5, l3_29_5, l3_28_5, l3_27_5, l3_26_5, l3_25_5, l3_24_5, l3_23_5, l3_22_5, l3_21_5, l3_20_5, l3_19_5, l3_18_5, l3_17_5, l3_16_5, l3_15_5, l3_14_5, l3_13_5, l3_12_5, l3_11_5, l3_10_5, l3_9_5, l3_8_5, l3_7_5, l3_6_5, l3_5_5, l3_4_5, l3_3_5, l3_2_5, l3_1_5, l3_0_5, l3_50_4, l3_49_4, l3_48_4, l3_47_4, l3_46_4, l3_45_4, l3_44_4, l3_43_4, l3_42_4, l3_41_4, l3_40_4, l3_39_4, l3_38_4, l3_37_4, l3_36_4, l3_35_4, l3_34_4, l3_33_4, l3_32_4, l3_31_4, l3_30_4, l3_29_4, l3_28_4, l3_27_4, l3_26_4, l3_25_4, l3_24_4, l3_23_4, l3_22_4, l3_21_4, l3_20_4, l3_19_4, l3_18_4, l3_17_4, l3_16_4, l3_15_4, l3_14_4, l3_13_4, l3_12_4, l3_11_4, l3_10_4, l3_9_4, l3_8_4, l3_7_4, l3_6_4, l3_5_4, l3_4_4, l3_3_4, l3_2_4, l3_1_4, l3_0_4, l3_50_3, l3_49_3, l3_48_3, l3_47_3, l3_46_3, l3_45_3, l3_44_3, l3_43_3, l3_42_3, l3_41_3, l3_40_3, l3_39_3, l3_38_3, l3_37_3, l3_36_3, l3_35_3, l3_34_3, l3_33_3, l3_32_3, l3_31_3, l3_30_3, l3_29_3, l3_28_3, l3_27_3, l3_26_3, l3_25_3, l3_24_3, l3_23_3, l3_22_3, l3_21_3, l3_20_3, l3_19_3, l3_18_3, l3_17_3, l3_16_3, l3_15_3, l3_14_3, l3_13_3, l3_12_3, l3_11_3, l3_10_3, l3_9_3, l3_8_3, l3_7_3, l3_6_3, l3_5_3, l3_4_3, l3_3_3, l3_2_3, l3_1_3, l3_0_3, l3_50_2, l3_49_2, l3_48_2, l3_47_2, l3_46_2, l3_45_2, l3_44_2, l3_43_2, l3_42_2, l3_41_2, l3_40_2, l3_39_2, l3_38_2, l3_37_2, l3_36_2, l3_35_2, l3_34_2, l3_33_2, l3_32_2, l3_31_2, l3_30_2, l3_29_2, l3_28_2, l3_27_2, l3_26_2, l3_25_2, l3_24_2, l3_23_2, l3_22_2, l3_21_2, l3_20_2, l3_19_2, l3_18_2, l3_17_2, l3_16_2, l3_15_2, l3_14_2, l3_13_2, l3_12_2, l3_11_2, l3_10_2, l3_9_2, l3_8_2, l3_7_2, l3_6_2, l3_5_2, l3_4_2, l3_3_2, l3_2_2, l3_1_2, l3_0_2, l3_50_1, l3_49_1, l3_48_1, l3_47_1, l3_46_1, l3_45_1, l3_44_1, l3_43_1, l3_42_1, l3_41_1, l3_40_1, l3_39_1, l3_38_1, l3_37_1, l3_36_1, l3_35_1, l3_34_1, l3_33_1, l3_32_1, l3_31_1, l3_30_1, l3_29_1, l3_28_1, l3_27_1, l3_26_1, l3_25_1, l3_24_1, l3_23_1, l3_22_1, l3_21_1, l3_20_1, l3_19_1, l3_18_1, l3_17_1, l3_16_1, l3_15_1, l3_14_1, l3_13_1, l3_12_1, l3_11_1, l3_10_1, l3_9_1, l3_8_1, l3_7_1, l3_6_1, l3_5_1, l3_4_1, l3_3_1, l3_2_1, l3_1_1, l3_0_1, l3_50_0, l3_49_0, l3_48_0, l3_47_0, l3_46_0, l3_45_0, l3_44_0, l3_43_0, l3_42_0, l3_41_0, l3_40_0, l3_39_0, l3_38_0, l3_37_0, l3_36_0, l3_35_0, l3_34_0, l3_33_0, l3_32_0, l3_31_0, l3_30_0, l3_29_0, l3_28_0, l3_27_0, l3_26_0, l3_25_0, l3_24_0, l3_23_0, l3_22_0, l3_21_0, l3_20_0, l3_19_0, l3_18_0, l3_17_0, l3_16_0, l3_15_0, l3_14_0, l3_13_0, l3_12_0, l3_11_0, l3_10_0, l3_9_0, l3_8_0, l3_7_0, l3_6_0, l3_5_0, l3_4_0, l3_3_0, l3_2_0, l3_1_0, l3_0_0, m2_50_5, m2_49_5, m2_48_5, m2_47_5, m2_46_5, m2_45_5, m2_44_5, m2_43_5, m2_42_5, m2_41_5, m2_40_5, m2_39_5, m2_38_5, m2_37_5, m2_36_5, m2_35_5, m2_34_5, m2_33_5, m2_32_5, m2_31_5, m2_30_5, m2_29_5, m2_28_5, m2_27_5, m2_26_5, m2_25_5, m2_24_5, m2_23_5, m2_22_5, m2_21_5, m2_20_5, m2_19_5, m2_18_5, m2_17_5, m2_16_5, m2_15_5, m2_14_5, m2_13_5, m2_12_5, m2_11_5, m2_10_5, m2_9_5, m2_8_5, m2_7_5, m2_6_5, m2_5_5, m2_4_5, m2_3_5, m2_2_5, m2_1_5, m2_0_5, m2_50_4, m2_49_4, m2_48_4, m2_47_4, m2_46_4, m2_45_4, m2_44_4, m2_43_4, m2_42_4, m2_41_4, m2_40_4, m2_39_4, m2_38_4, m2_37_4, m2_36_4, m2_35_4, m2_34_4, m2_33_4, m2_32_4, m2_31_4, m2_30_4, m2_29_4, m2_28_4, m2_27_4, m2_26_4, m2_25_4, m2_24_4, m2_23_4, m2_22_4, m2_21_4, m2_20_4, m2_19_4, m2_18_4, m2_17_4, m2_16_4, m2_15_4, m2_14_4, m2_13_4, m2_12_4, m2_11_4, m2_10_4, m2_9_4, m2_8_4, m2_7_4, m2_6_4, m2_5_4, m2_4_4, m2_3_4, m2_2_4, m2_1_4, m2_0_4, m2_50_3, m2_49_3, m2_48_3, m2_47_3, m2_46_3, m2_45_3, m2_44_3, m2_43_3, m2_42_3, m2_41_3, m2_40_3, m2_39_3, m2_38_3, m2_37_3, m2_36_3, m2_35_3, m2_34_3, m2_33_3, m2_32_3, m2_31_3, m2_30_3, m2_29_3, m2_28_3, m2_27_3, m2_26_3, m2_25_3, m2_24_3, m2_23_3, m2_22_3, m2_21_3, m2_20_3, m2_19_3, m2_18_3, m2_17_3, m2_16_3, m2_15_3, m2_14_3, m2_13_3, m2_12_3, m2_11_3, m2_10_3, m2_9_3, m2_8_3, m2_7_3, m2_6_3, m2_5_3, m2_4_3, m2_3_3, m2_2_3, m2_1_3, m2_0_3, m2_50_2, m2_49_2, m2_48_2, m2_47_2, m2_46_2, m2_45_2, m2_44_2, m2_43_2, m2_42_2, m2_41_2, m2_40_2, m2_39_2, m2_38_2, m2_37_2, m2_36_2, m2_35_2, m2_34_2, m2_33_2, m2_32_2, m2_31_2, m2_30_2, m2_29_2, m2_28_2, m2_27_2, m2_26_2, m2_25_2, m2_24_2, m2_23_2, m2_22_2, m2_21_2, m2_20_2, m2_19_2, m2_18_2, m2_17_2, m2_16_2, m2_15_2, m2_14_2, m2_13_2, m2_12_2, m2_11_2, m2_10_2, m2_9_2, m2_8_2, m2_7_2, m2_6_2, m2_5_2, m2_4_2, m2_3_2, m2_2_2, m2_1_2, m2_0_2, m2_50_1, m2_49_1, m2_48_1, m2_47_1, m2_46_1, m2_45_1, m2_44_1, m2_43_1, m2_42_1, m2_41_1, m2_40_1, m2_39_1, m2_38_1, m2_37_1, m2_36_1, m2_35_1, m2_34_1, m2_33_1, m2_32_1, m2_31_1, m2_30_1, m2_29_1, m2_28_1, m2_27_1, m2_26_1, m2_25_1, m2_24_1, m2_23_1, m2_22_1, m2_21_1, m2_20_1, m2_19_1, m2_18_1, m2_17_1, m2_16_1, m2_15_1, m2_14_1, m2_13_1, m2_12_1, m2_11_1, m2_10_1, m2_9_1, m2_8_1, m2_7_1, m2_6_1, m2_5_1, m2_4_1, m2_3_1, m2_2_1, m2_1_1, m2_0_1, m2_50_0, m2_49_0, m2_48_0, m2_47_0, m2_46_0, m2_45_0, m2_44_0, m2_43_0, m2_42_0, m2_41_0, m2_40_0, m2_39_0, m2_38_0, m2_37_0, m2_36_0, m2_35_0, m2_34_0, m2_33_0, m2_32_0, m2_31_0, m2_30_0, m2_29_0, m2_28_0, m2_27_0, m2_26_0, m2_25_0, m2_24_0, m2_23_0, m2_22_0, m2_21_0, m2_20_0, m2_19_0, m2_18_0, m2_17_0, m2_16_0, m2_15_0, m2_14_0, m2_13_0, m2_12_0, m2_11_0, m2_10_0, m2_9_0, m2_8_0, m2_7_0, m2_6_0, m2_5_0, m2_4_0, m2_3_0, m2_2_0, m2_1_0, m2_0_0]
Performed 6579 Post agglomeration using F-continuation condition.
Iterating post reduction 0 with 8639 rules applied. Total rules applied 8639 place count 10117 transition count 3930
Constant places removed 6885 places and 0 transitions.
Performed 204 Post agglomeration using F-continuation condition.
Iterating post reduction 1 with 7089 rules applied. Total rules applied 15728 place count 3232 transition count 3726
Constant places removed 204 places and 0 transitions.
Iterating post reduction 2 with 204 rules applied. Total rules applied 15932 place count 3028 transition count 3726
Symmetric choice reduction at 3 with 920 rule applications. Total rules 16852 place count 3028 transition count 3726
Constant places removed 920 places and 971 transitions.
Reduce isomorphic transitions removed 153 transitions.
Performed 306 Post agglomeration using F-continuation condition.
Iterating post reduction 3 with 1379 rules applied. Total rules applied 18231 place count 2108 transition count 2296
Constant places removed 357 places and 0 transitions.
Implicit places reduction removed 51 places :[l16_50, l16_49, l16_48, l16_47, l16_46, l16_45, l16_44, l16_43, l16_42, l16_41, l16_40, l16_39, l16_38, l16_37, l16_36, l16_35, l16_34, l16_33, l16_32, l16_31, l16_30, l16_29, l16_28, l16_27, l16_26, l16_25, l16_24, l16_23, l16_22, l16_21, l16_20, l16_19, l16_18, l16_17, l16_16, l16_15, l16_14, l16_13, l16_12, l16_11, l16_10, l16_9, l16_8, l16_7, l16_6, l16_5, l16_4, l16_3, l16_2, l16_1, l16_0]
Performed 102 Post agglomeration using F-continuation condition.
Iterating post reduction 4 with 510 rules applied. Total rules applied 18741 place count 1700 transition count 2194
Constant places removed 102 places and 0 transitions.
Iterating post reduction 5 with 102 rules applied. Total rules applied 18843 place count 1598 transition count 2194
Performed 102 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 6 with 102 Pre rules applied. Total rules applied 18843 place count 1598 transition count 2092
Constant places removed 102 places and 0 transitions.
Iterating post reduction 6 with 102 rules applied. Total rules applied 18945 place count 1496 transition count 2092
Symmetric choice reduction at 7 with 10 rule applications. Total rules 18955 place count 1496 transition count 2092
Constant places removed 10 places and 510 transitions.
Reduce isomorphic transitions removed 204 transitions.
Implicit places reduction removed 255 places :[l20_50, l20_49, l20_48, l20_47, l20_46, l20_45, l20_44, l20_43, l20_42, l20_41, l20_40, l20_39, l20_38, l20_37, l20_36, l20_35, l20_34, l20_33, l20_32, l20_31, l20_30, l20_29, l20_28, l20_27, l20_26, l20_25, l20_24, l20_23, l20_22, l20_21, l20_20, l20_19, l20_18, l20_17, l20_16, l20_15, l20_14, l20_13, l20_12, l20_11, l20_10, l20_9, l20_8, l20_7, l20_6, l20_5, l20_4, l20_3, l20_2, l20_1, l20_0, l18_50, l18_49, l18_48, l18_47, l18_46, l18_45, l18_44, l18_43, l18_42, l18_41, l18_40, l18_39, l18_38, l18_37, l18_36, l18_35, l18_34, l18_33, l18_32, l18_31, l18_30, l18_29, l18_28, l18_27, l18_26, l18_25, l18_24, l18_23, l18_22, l18_21, l18_20, l18_19, l18_18, l18_17, l18_16, l18_15, l18_14, l18_13, l18_12, l18_11, l18_10, l18_9, l18_8, l18_7, l18_6, l18_5, l18_4, l18_3, l18_2, l18_1, l18_0, l10_50, l10_49, l10_48, l10_47, l10_46, l10_45, l10_44, l10_43, l10_42, l10_41, l10_40, l10_39, l10_38, l10_37, l10_36, l10_35, l10_34, l10_33, l10_32, l10_31, l10_30, l10_29, l10_28, l10_27, l10_26, l10_25, l10_24, l10_23, l10_22, l10_21, l10_20, l10_19, l10_18, l10_17, l10_16, l10_15, l10_14, l10_13, l10_12, l10_11, l10_10, l10_9, l10_8, l10_7, l10_6, l10_5, l10_4, l10_3, l10_2, l10_1, l10_0, l36_50, l36_49, l36_48, l36_47, l36_46, l36_45, l36_44, l36_43, l36_42, l36_41, l36_40, l36_39, l36_38, l36_37, l36_36, l36_35, l36_34, l36_33, l36_32, l36_31, l36_30, l36_29, l36_28, l36_27, l36_26, l36_25, l36_24, l36_23, l36_22, l36_21, l36_20, l36_19, l36_18, l36_17, l36_16, l36_15, l36_14, l36_13, l36_12, l36_11, l36_10, l36_9, l36_8, l36_7, l36_6, l36_5, l36_4, l36_3, l36_2, l36_1, l36_0, l31_50, l31_49, l31_48, l31_47, l31_46, l31_45, l31_44, l31_43, l31_42, l31_41, l31_40, l31_39, l31_38, l31_37, l31_36, l31_35, l31_34, l31_33, l31_32, l31_31, l31_30, l31_29, l31_28, l31_27, l31_26, l31_25, l31_24, l31_23, l31_22, l31_21, l31_20, l31_19, l31_18, l31_17, l31_16, l31_15, l31_14, l31_13, l31_12, l31_11, l31_10, l31_9, l31_8, l31_7, l31_6, l31_5, l31_4, l31_3, l31_2, l31_1, l31_0]
Performed 357 Post agglomeration using F-continuation condition.
Iterating post reduction 7 with 826 rules applied. Total rules applied 19781 place count 1231 transition count 1021
Constant places removed 357 places and 0 transitions.
Iterating post reduction 8 with 357 rules applied. Total rules applied 20138 place count 874 transition count 1021
Performed 102 Pre agglomeration using Quasi-Persistent + HF-interchangeable + Divergent Free condition.
Pre-agglomeration after 9 with 102 Pre rules applied. Total rules applied 20138 place count 874 transition count 919
Constant places removed 102 places and 0 transitions.
Iterating post reduction 9 with 102 rules applied. Total rules applied 20240 place count 772 transition count 919
Symmetric choice reduction at 10 with 256 rule applications. Total rules 20496 place count 772 transition count 919
Constant places removed 256 places and 306 transitions.
Reduce isomorphic transitions removed 255 transitions.
Iterating post reduction 10 with 511 rules applied. Total rules applied 21007 place count 516 transition count 358
Constant places removed 51 places and 51 transitions.
Iterating post reduction 11 with 51 rules applied. Total rules applied 21058 place count 465 transition count 307
Constant places removed 51 places and 0 transitions.
Iterating post reduction 12 with 51 rules applied. Total rules applied 21109 place count 414 transition count 307
Constant places removed 51 places and 51 transitions.
Iterating post reduction 13 with 51 rules applied. Total rules applied 21160 place count 363 transition count 256
Performed 1 Post agglomeration using F-continuation condition.
Constant places removed 1 places and 0 transitions.
Iterating post reduction 14 with 1 rules applied. Total rules applied 21161 place count 362 transition count 255
Applied a total of 21161 rules in 18640 ms. Remains 362 /12177 variables (removed 11815) and now considering 255/10560 (removed 10305) transitions.
Random walk for 250 k steps run took 9656 ms.
// Phase 1: matrix 255 rows 362 cols
Random walk for 4 * 500 k steps run took 79844 ms.
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/GlobalProperties.pnml.gal, -t, CGAL, -ctl, DEADLOCK, --load-order, /home/mcc/execution/model.ord], workingDir=/home/mcc/execution]

Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 255 rows 362 cols
its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/GlobalProperties.pnml.gal -t CGAL -ctl DEADLOCK --load-order /home/mcc/execution/model.ord
Successfully loaded order from file /home/mcc/execution/model.ord
No direction supplied, using forward translation only.
Detected timeout of ITS tools.
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/GlobalProperties.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/GlobalProperties.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 9168 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 171 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
Detected timeout of ITS tools.
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/GlobalProperties.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/GlobalProperties.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
255

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ GlobalProperties = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution GlobalProperties -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination GlobalProperties -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Apr 05, 2019 9:22:29 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, GlobalProperties, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt]
Apr 05, 2019 9:22:29 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Apr 05, 2019 9:22:31 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 1025 ms
Apr 05, 2019 9:22:31 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 12194 places.
Apr 05, 2019 9:22:32 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 10560 transitions.
Apr 05, 2019 9:22:35 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 17 fixed domain variables (out of 12194 variables) in GAL type FamilyReunion_PT_L00050M0005C002P002G001
Apr 05, 2019 9:22:35 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 17 constant array cells/variables (out of 12194 variables) in type FamilyReunion_PT_L00050M0005C002P002G001
Apr 05, 2019 9:22:35 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: m0_0,m0_3,m0_4,c2_1,m0_2,m0_1,r0_Y,p0_0,m0_5,c0_0,c2_0,p0_1,p0_2,c2_2,c0_1,c0_2,r0_N,
Apr 05, 2019 9:22:35 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed 17 constant variables :m0_0=1, m0_3=1, m0_4=1, c2_1=1, m0_2=1, m0_1=1, r0_Y=1, p0_0=1, m0_5=1, c0_0=1, c2_0=1, p0_1=1, p0_2=1, c2_2=1, c0_1=1, c0_2=1, r0_N=1
Apr 05, 2019 9:22:35 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Simplified 969 expressions due to constant valuations.
Apr 05, 2019 9:22:35 PM fr.lip6.move.gal.instantiate.PropertySimplifier evalInInitialState
WARNING: Unexpected boolean logic operator in evalInInitialState fr.lip6.move.gal.impl.EXImpl
Apr 05, 2019 9:22:35 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property FamilyReunion-PT-L00050M0005C002P002G001-GlobalProperties-0 is trivially true : it is verified in initial state.
Apr 05, 2019 9:22:35 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 3317 ms
Apr 05, 2019 9:22:35 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 233 ms
Apr 05, 2019 9:22:39 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 10560 transitions.
Apr 05, 2019 9:24:28 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property FamilyReunion-PT-L00050M0005C002P002G001-GlobalProperties-0 is trivially true : it is verified in initial state.
Apr 05, 2019 9:24:28 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 298 ms
Apr 05, 2019 9:24:28 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 255 transitions.
Apr 05, 2019 9:24:29 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 362 places.
Apr 05, 2019 9:24:29 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 255 transitions.
Apr 05, 2019 9:24:29 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 255 transitions.
Apr 05, 2019 9:24:30 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/GlobalProperties.pnml.gal : 96 ms
Apr 05, 2019 9:24:30 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 0 place invariants in 202 ms
Apr 05, 2019 9:24:40 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 362 variables to be positive in 9628 ms
Apr 05, 2019 9:24:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 255 transitions.
Apr 05, 2019 9:24:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/255 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Apr 05, 2019 9:24:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 143 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Apr 05, 2019 9:24:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 255 transitions.
Apr 05, 2019 9:24:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 31 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Apr 05, 2019 9:24:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 255 transitions.
Apr 05, 2019 9:24:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(2/255) took 3458 ms. Total solver calls (SAT/UNSAT): 147(147/0)
Apr 05, 2019 9:24:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(5/255) took 7546 ms. Total solver calls (SAT/UNSAT): 285(285/0)
Apr 05, 2019 9:24:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(9/255) took 11208 ms. Total solver calls (SAT/UNSAT): 455(455/0)
Apr 05, 2019 9:24:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(13/255) took 14304 ms. Total solver calls (SAT/UNSAT): 609(609/0)
Apr 05, 2019 9:24:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(18/255) took 17933 ms. Total solver calls (SAT/UNSAT): 779(779/0)
Apr 05, 2019 9:25:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(23/255) took 21185 ms. Total solver calls (SAT/UNSAT): 924(924/0)
Apr 05, 2019 9:25:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(29/255) took 24372 ms. Total solver calls (SAT/UNSAT): 1065(1065/0)
Apr 05, 2019 9:25:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/255) took 27564 ms. Total solver calls (SAT/UNSAT): 1209(1209/0)
Apr 05, 2019 9:25:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(53/255) took 30736 ms. Total solver calls (SAT/UNSAT): 1422(1422/0)
Apr 05, 2019 9:25:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(56/255) took 34353 ms. Total solver calls (SAT/UNSAT): 1560(1560/0)
Apr 05, 2019 9:25:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(60/255) took 37532 ms. Total solver calls (SAT/UNSAT): 1730(1730/0)
Apr 05, 2019 9:25:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(64/255) took 41463 ms. Total solver calls (SAT/UNSAT): 1884(1884/0)
Apr 05, 2019 9:25:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(71/255) took 44660 ms. Total solver calls (SAT/UNSAT): 2115(2115/0)
Apr 05, 2019 9:25:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(79/255) took 47779 ms. Total solver calls (SAT/UNSAT): 2319(2319/0)
Apr 05, 2019 9:25:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(89/255) took 50983 ms. Total solver calls (SAT/UNSAT): 2484(2484/0)
Apr 05, 2019 9:25:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(103/255) took 54675 ms. Total solver calls (SAT/UNSAT): 2649(2649/0)
Apr 05, 2019 9:25:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(108/255) took 58864 ms. Total solver calls (SAT/UNSAT): 2879(2879/0)
Apr 05, 2019 9:25:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(112/255) took 62386 ms. Total solver calls (SAT/UNSAT): 3045(3045/0)
Apr 05, 2019 9:25:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(116/255) took 65600 ms. Total solver calls (SAT/UNSAT): 3195(3195/0)
Apr 05, 2019 9:25:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(120/255) took 68713 ms. Total solver calls (SAT/UNSAT): 3329(3329/0)
Apr 05, 2019 9:25:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(125/255) took 71900 ms. Total solver calls (SAT/UNSAT): 3474(3474/0)
Apr 05, 2019 9:25:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(132/255) took 75221 ms. Total solver calls (SAT/UNSAT): 3635(3635/0)
Apr 05, 2019 9:25:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(142/255) took 78264 ms. Total solver calls (SAT/UNSAT): 3780(3780/0)
Apr 05, 2019 9:26:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(154/255) took 81431 ms. Total solver calls (SAT/UNSAT): 3924(3924/0)
Apr 05, 2019 9:26:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(158/255) took 84606 ms. Total solver calls (SAT/UNSAT): 4110(4110/0)
Apr 05, 2019 9:26:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(163/255) took 88448 ms. Total solver calls (SAT/UNSAT): 4320(4320/0)
Apr 05, 2019 9:26:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(172/255) took 91580 ms. Total solver calls (SAT/UNSAT): 4635(4635/0)
Apr 05, 2019 9:26:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(182/255) took 94586 ms. Total solver calls (SAT/UNSAT): 4890(4890/0)
Apr 05, 2019 9:26:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(188/255) took 97732 ms. Total solver calls (SAT/UNSAT): 4995(4995/0)
Apr 05, 2019 9:26:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(202/255) took 100748 ms. Total solver calls (SAT/UNSAT): 5100(5100/0)
Apr 05, 2019 9:26:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(207/255) took 104168 ms. Total solver calls (SAT/UNSAT): 5294(5294/0)
Apr 05, 2019 9:26:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(211/255) took 107897 ms. Total solver calls (SAT/UNSAT): 5472(5472/0)
Apr 05, 2019 9:26:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(215/255) took 111127 ms. Total solver calls (SAT/UNSAT): 5634(5634/0)
Apr 05, 2019 9:26:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(219/255) took 114396 ms. Total solver calls (SAT/UNSAT): 5780(5780/0)
Apr 05, 2019 9:26:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(224/255) took 117651 ms. Total solver calls (SAT/UNSAT): 5940(5940/0)
Apr 05, 2019 9:26:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(230/255) took 120885 ms. Total solver calls (SAT/UNSAT): 6099(6099/0)
Apr 05, 2019 9:26:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(238/255) took 124112 ms. Total solver calls (SAT/UNSAT): 6255(6255/0)
Apr 05, 2019 9:26:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 126861 ms. Total solver calls (SAT/UNSAT): 6375(6375/0)
Apr 05, 2019 9:26:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 255 transitions.
Apr 05, 2019 9:44:31 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property FamilyReunion-PT-L00050M0005C002P002G001-GlobalProperties-0 is trivially true : it is verified in initial state.
Apr 05, 2019 9:44:31 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 107 ms
Apr 05, 2019 9:44:31 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/GlobalProperties.pnml.gal : 19 ms
Apr 05, 2019 9:54:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 1662712 ms. Total solver calls (SAT/UNSAT): 7956(0/7956)
Apr 05, 2019 9:54:30 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 1801369ms conformant to PINS in folder :/home/mcc/execution
Apr 05, 2019 10:04:33 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Apr 05, 2019 10:04:33 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property FamilyReunion-PT-L00050M0005C002P002G001-GlobalProperties-0 is trivially true : it is verified in initial state.
Apr 05, 2019 10:04:33 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 227 ms
Apr 05, 2019 10:04:33 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property FamilyReunion-PT-L00050M0005C002P002G001-GlobalProperties-0 is trivially true : it is verified in initial state.
Apr 05, 2019 10:04:33 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 430 ms
Apr 05, 2019 10:04:34 PM fr.lip6.move.gal.application.MccTranslator applyOrder
WARNING: Could not apply decomposition. Using flat GAL structure.
java.lang.NullPointerException
at fr.lip6.move.gal.application.MccTranslator.applyOrder(MccTranslator.java:128)
at fr.lip6.move.gal.application.MccTranslator.flattenSpec(MccTranslator.java:156)
at fr.lip6.move.gal.application.Application.runMultiITS(Application.java:427)
at fr.lip6.move.gal.application.Application.start(Application.java:319)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:40)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:137)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:107)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:400)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at sun.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at sun.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:62)
at sun.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.lang.reflect.Method.invoke(Method.java:498)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:595)
at org.eclipse.equinox.launcher.Main.run(Main.java:1501)
at org.eclipse.equinox.launcher.Main.main(Main.java:1474)
Apr 05, 2019 10:04:34 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property FamilyReunion-PT-L00050M0005C002P002G001-GlobalProperties-0 is trivially true : it is verified in initial state.
Apr 05, 2019 10:04:34 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 257 ms
Apr 05, 2019 10:04:34 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/GlobalProperties.pnml.gal : 97 ms
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc( 0/ 8), 0.000: Loading model from ./gal.so
pins2lts-mc( 2/ 8), 0.001: library has no initializer
pins2lts-mc( 2/ 8), 0.001: loading model GAL
pins2lts-mc( 2/ 8), 0.003: completed loading model GAL
pins2lts-mc( 4/ 8), 0.007: library has no initializer
pins2lts-mc( 4/ 8), 0.007: loading model GAL
pins2lts-mc( 4/ 8), 0.009: completed loading model GAL
pins2lts-mc( 0/ 8), 0.009: library has no initializer
pins2lts-mc( 0/ 8), 0.009: loading model GAL
pins2lts-mc( 7/ 8), 0.010: library has no initializer
pins2lts-mc( 7/ 8), 0.010: loading model GAL
pins2lts-mc( 1/ 8), 0.035: library has no initializer
pins2lts-mc( 1/ 8), 0.035: loading model GAL
pins2lts-mc( 6/ 8), 0.071: library has no initializer
pins2lts-mc( 6/ 8), 0.093: loading model GAL
pins2lts-mc( 3/ 8), 0.070: library has no initializer
pins2lts-mc( 3/ 8), 0.170: loading model GAL
pins2lts-mc( 5/ 8), 0.070: library has no initializer
pins2lts-mc( 5/ 8), 0.240: loading model GAL
pins2lts-mc( 0/ 8), 0.230: completed loading model GAL
pins2lts-mc( 0/ 8), 0.242: Initializing POR dependencies: labels 256, guards 255
pins2lts-mc( 1/ 8), 0.242: completed loading model GAL
pins2lts-mc( 7/ 8), 0.284: completed loading model GAL
pins2lts-mc( 3/ 8), 0.348: completed loading model GAL
pins2lts-mc( 5/ 8), 1.012: completed loading model GAL
pins2lts-mc( 6/ 8), 1.016: completed loading model GAL
pins2lts-mc( 0/ 8), 1.616: There are 256 state labels and 1 edge labels
pins2lts-mc( 0/ 8), 1.616: State length is 362, there are 255 groups
pins2lts-mc( 0/ 8), 1.616: Running bfs using 8 cores
pins2lts-mc( 0/ 8), 1.616: Using a non-indexing tree table with 2^27 elements
pins2lts-mc( 0/ 8), 1.616: Successor permutation: none
pins2lts-mc( 0/ 8), 1.616: Visible groups: 0 / 255, labels: 0 / 256
pins2lts-mc( 0/ 8), 1.616: POR cycle proviso: none
pins2lts-mc( 0/ 8), 1.616: Global bits: 0, count bits: 0, local bits: 0
pins2lts-mc( 0/ 8), 31.602: ~3 levels ~960 states ~47112 transitions
pins2lts-mc( 1/ 8), 33.122: ~1 levels ~1920 states ~94192 transitions
pins2lts-mc( 1/ 8), 36.787: ~2 levels ~3840 states ~186920 transitions
pins2lts-mc( 1/ 8), 43.457: ~2 levels ~7680 states ~371240 transitions
pins2lts-mc( 0/ 8), 53.499: ~4 levels ~15360 states ~739248 transitions
pins2lts-mc( 0/ 8), 69.672: ~4 levels ~30720 states ~1476528 transitions
pins2lts-mc( 0/ 8), 111.968: ~5 levels ~61440 states ~2922400 transitions
pins2lts-mc( 0/ 8), 170.826: ~5 levels ~122880 states ~5810080 transitions
pins2lts-mc( 3/ 8), 264.144: ~3 levels ~245760 states ~11578288 transitions
pins2lts-mc( 3/ 8), 452.036: ~4 levels ~491520 states ~22988696 transitions
pins2lts-mc( 6/ 8), 842.557: Error: tree leafs table full! Change -s/--ratio.
pins2lts-mc( 0/ 8), 845.413:
pins2lts-mc( 0/ 8), 845.413: mean standard work distribution: 0.8% (states) 1.0% (transitions)
pins2lts-mc( 0/ 8), 845.413:
pins2lts-mc( 0/ 8), 845.413: Explored 957801 states 44345996 transitions, fanout: 46.300
pins2lts-mc( 0/ 8), 845.413: Total exploration time 843.750 sec (840.910 sec minimum, 842.134 sec on average)
pins2lts-mc( 0/ 8), 845.413: States per second: 1135, Transitions per second: 52558
pins2lts-mc( 0/ 8), 845.413:
pins2lts-mc( 0/ 8), 845.413: Queue width: 8B, total height: 9672296, memory: 73.79MB
pins2lts-mc( 0/ 8), 845.413: Tree memory: 337.1MB, 33.3 B/state, compr.: 2.3%
pins2lts-mc( 0/ 8), 845.413: Tree fill ratio (roots/leafs): 7.0%/100.0%
pins2lts-mc( 0/ 8), 845.413: Stored 255 string chucks using 0MB
pins2lts-mc( 0/ 8), 845.413: Total memory used for chunk indexing: 0MB
pins2lts-mc( 0/ 8), 845.413: Est. total memory use: 410.9MB (~1097.8MB paged-in)
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:168)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:91)
at java.lang.Thread.run(Thread.java:748)

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-PT-L00050M0005C002P002G001"
export BK_EXAMINATION="GlobalProperties"
export BK_TOOL="itstoolsm"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstoolsm"
echo " Input is FamilyReunion-PT-L00050M0005C002P002G001, examination is GlobalProperties"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r203-csrt-155344537800201"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-PT-L00050M0005C002P002G001.tgz
mv FamilyReunion-PT-L00050M0005C002P002G001 execution
cd execution
if [ "GlobalProperties" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "GlobalProperties" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "GlobalProperties" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "GlobalProperties" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "GlobalProperties.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property GlobalProperties.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "GlobalProperties.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' GlobalProperties.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;