Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/local/x2003239/mcc2019-input.r201-csrt-155286433900259.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2019-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstoolsm
Input is SharedMemory-PT-000020, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r201-csrt-155286433900259
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 2.2M
-rw-r--r-- 1 mcc users 31K Feb 12 15:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 88K Feb 12 15:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 74K Feb 8 18:21 CTLFireability.txt
-rw-r--r-- 1 mcc users 224K Feb 8 18:21 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 109 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 347 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 28K Feb 5 01:24 LTLCardinality.txt
-rw-r--r-- 1 mcc users 68K Feb 5 01:24 LTLCardinality.xml
-rw-r--r-- 1 mcc users 37K Feb 4 22:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 108K Feb 4 22:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 56K Feb 4 17:40 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 156K Feb 4 17:40 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 148K Feb 1 14:45 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 445K Feb 1 14:45 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 4 22:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 22K Feb 4 22:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Jan 29 09:35 equiv_col
-rw-r--r-- 1 mcc users 7 Jan 29 09:35 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:35 iscolored
-rw-r--r-- 1 mcc users 648K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SharedMemory-PT-000020-LTLFireability-00
FORMULA_NAME SharedMemory-PT-000020-LTLFireability-01
FORMULA_NAME SharedMemory-PT-000020-LTLFireability-02
FORMULA_NAME SharedMemory-PT-000020-LTLFireability-03
FORMULA_NAME SharedMemory-PT-000020-LTLFireability-04
FORMULA_NAME SharedMemory-PT-000020-LTLFireability-05
FORMULA_NAME SharedMemory-PT-000020-LTLFireability-06
FORMULA_NAME SharedMemory-PT-000020-LTLFireability-07
FORMULA_NAME SharedMemory-PT-000020-LTLFireability-08
FORMULA_NAME SharedMemory-PT-000020-LTLFireability-09
FORMULA_NAME SharedMemory-PT-000020-LTLFireability-10
FORMULA_NAME SharedMemory-PT-000020-LTLFireability-11
FORMULA_NAME SharedMemory-PT-000020-LTLFireability-12
FORMULA_NAME SharedMemory-PT-000020-LTLFireability-13
FORMULA_NAME SharedMemory-PT-000020-LTLFireability-14
FORMULA_NAME SharedMemory-PT-000020-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1553799665364

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock, --load-order, /home/mcc/execution/model.ord], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock --load-order /home/mcc/execution/model.ord
Read 16 LTL properties
Successfully loaded order from file /home/mcc/execution/model.ord
Checking formula 0 : !((X(X(F(G(G("((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((Ext_Mem_Acc_16_1>=1)||(Ext_Mem_Acc_17_1>=1))||(Ext_Mem_Acc_14_1>=1))||(Ext_Mem_Acc_15_1>=1))||(Ext_Mem_Acc_12_1>=1))||(Ext_Mem_Acc_13_1>=1))||(Ext_Mem_Acc_10_1>=1))||(Ext_Mem_Acc_11_1>=1))||(Ext_Mem_Acc_8_1>=1))||(Ext_Mem_Acc_9_1>=1))||(Ext_Mem_Acc_6_1>=1))||(Ext_Mem_Acc_7_1>=1))||(Ext_Mem_Acc_4_1>=1))||(Ext_Mem_Acc_5_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_8_3>=1))||(Ext_Mem_Acc_9_3>=1))||(Ext_Mem_Acc_10_3>=1))||(Ext_Mem_Acc_11_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_6_3>=1))||(Ext_Mem_Acc_7_3>=1))||(Ext_Mem_Acc_19_2>=1))||(Ext_Mem_Acc_20_2>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_15_2>=1))||(Ext_Mem_Acc_16_2>=1))||(Ext_Mem_Acc_17_2>=1))||(Ext_Mem_Acc_18_2>=1))||(Ext_Mem_Acc_12_2>=1))||(Ext_Mem_Acc_11_2>=1))||(Ext_Mem_Acc_14_2>=1))||(Ext_Mem_Acc_13_2>=1))||(Ext_Mem_Acc_8_2>=1))||(Ext_Mem_Acc_7_2>=1))||(Ext_Mem_Acc_10_2>=1))||(Ext_Mem_Acc_9_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_6_2>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_19_1>=1))||(Ext_Mem_Acc_18_1>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_20_1>=1))||(Ext_Mem_Acc_12_5>=1))||(Ext_Mem_Acc_13_5>=1))||(Ext_Mem_Acc_10_5>=1))||(Ext_Mem_Acc_11_5>=1))||(Ext_Mem_Acc_8_5>=1))||(Ext_Mem_Acc_9_5>=1))||(Ext_Mem_Acc_6_5>=1))||(Ext_Mem_Acc_7_5>=1))||(Ext_Mem_Acc_20_5>=1))||(Ext_Mem_Acc_1_6>=1))||(Ext_Mem_Acc_18_5>=1))||(Ext_Mem_Acc_19_5>=1))||(Ext_Mem_Acc_16_5>=1))||(Ext_Mem_Acc_17_5>=1))||(Ext_Mem_Acc_14_5>=1))||(Ext_Mem_Acc_15_5>=1))||(Ext_Mem_Acc_10_6>=1))||(Ext_Mem_Acc_9_6>=1))||(Ext_Mem_Acc_8_6>=1))||(Ext_Mem_Acc_7_6>=1))||(Ext_Mem_Acc_5_6>=1))||(Ext_Mem_Acc_4_6>=1))||(Ext_Mem_Acc_3_6>=1))||(Ext_Mem_Acc_2_6>=1))||(Ext_Mem_Acc_18_6>=1))||(Ext_Mem_Acc_17_6>=1))||(Ext_Mem_Acc_16_6>=1))||(Ext_Mem_Acc_15_6>=1))||(Ext_Mem_Acc_14_6>=1))||(Ext_Mem_Acc_13_6>=1))||(Ext_Mem_Acc_12_6>=1))||(Ext_Mem_Acc_11_6>=1))||(Ext_Mem_Acc_16_3>=1))||(Ext_Mem_Acc_17_3>=1))||(Ext_Mem_Acc_18_3>=1))||(Ext_Mem_Acc_19_3>=1))||(Ext_Mem_Acc_12_3>=1))||(Ext_Mem_Acc_13_3>=1))||(Ext_Mem_Acc_14_3>=1))||(Ext_Mem_Acc_15_3>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_6_4>=1))||(Ext_Mem_Acc_7_4>=1))||(Ext_Mem_Acc_8_4>=1))||(Ext_Mem_Acc_20_3>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_14_4>=1))||(Ext_Mem_Acc_13_4>=1))||(Ext_Mem_Acc_16_4>=1))||(Ext_Mem_Acc_15_4>=1))||(Ext_Mem_Acc_10_4>=1))||(Ext_Mem_Acc_9_4>=1))||(Ext_Mem_Acc_12_4>=1))||(Ext_Mem_Acc_11_4>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_18_4>=1))||(Ext_Mem_Acc_17_4>=1))||(Ext_Mem_Acc_20_4>=1))||(Ext_Mem_Acc_19_4>=1))||(Ext_Mem_Acc_15_8>=1))||(Ext_Mem_Acc_16_8>=1))||(Ext_Mem_Acc_13_8>=1))||(Ext_Mem_Acc_14_8>=1))||(Ext_Mem_Acc_19_8>=1))||(Ext_Mem_Acc_20_8>=1))||(Ext_Mem_Acc_17_8>=1))||(Ext_Mem_Acc_18_8>=1))||(Ext_Mem_Acc_3_9>=1))||(Ext_Mem_Acc_4_9>=1))||(Ext_Mem_Acc_1_9>=1))||(Ext_Mem_Acc_2_9>=1))||(Ext_Mem_Acc_7_9>=1))||(Ext_Mem_Acc_8_9>=1))||(Ext_Mem_Acc_5_9>=1))||(Ext_Mem_Acc_6_9>=1))||(Ext_Mem_Acc_13_9>=1))||(Ext_Mem_Acc_12_9>=1))||(Ext_Mem_Acc_11_9>=1))||(Ext_Mem_Acc_10_9>=1))||(Ext_Mem_Acc_17_9>=1))||(Ext_Mem_Acc_16_9>=1))||(Ext_Mem_Acc_15_9>=1))||(Ext_Mem_Acc_14_9>=1))||(Ext_Mem_Acc_1_10>=1))||(Ext_Mem_Acc_20_9>=1))||(Ext_Mem_Acc_19_9>=1))||(Ext_Mem_Acc_18_9>=1))||(Ext_Mem_Acc_5_10>=1))||(Ext_Mem_Acc_4_10>=1))||(Ext_Mem_Acc_3_10>=1))||(Ext_Mem_Acc_2_10>=1))||(Ext_Mem_Acc_19_6>=1))||(Ext_Mem_Acc_20_6>=1))||(Ext_Mem_Acc_1_7>=1))||(Ext_Mem_Acc_2_7>=1))||(Ext_Mem_Acc_3_7>=1))||(Ext_Mem_Acc_4_7>=1))||(Ext_Mem_Acc_5_7>=1))||(Ext_Mem_Acc_6_7>=1))||(Ext_Mem_Acc_8_7>=1))||(Ext_Mem_Acc_9_7>=1))||(Ext_Mem_Acc_10_7>=1))||(Ext_Mem_Acc_11_7>=1))||(Ext_Mem_Acc_12_7>=1))||(Ext_Mem_Acc_13_7>=1))||(Ext_Mem_Acc_14_7>=1))||(Ext_Mem_Acc_15_7>=1))||(Ext_Mem_Acc_17_7>=1))||(Ext_Mem_Acc_16_7>=1))||(Ext_Mem_Acc_19_7>=1))||(Ext_Mem_Acc_18_7>=1))||(Ext_Mem_Acc_1_8>=1))||(Ext_Mem_Acc_20_7>=1))||(Ext_Mem_Acc_3_8>=1))||(Ext_Mem_Acc_2_8>=1))||(Ext_Mem_Acc_5_8>=1))||(Ext_Mem_Acc_4_8>=1))||(Ext_Mem_Acc_7_8>=1))||(Ext_Mem_Acc_6_8>=1))||(Ext_Mem_Acc_10_8>=1))||(Ext_Mem_Acc_9_8>=1))||(Ext_Mem_Acc_12_8>=1))||(Ext_Mem_Acc_11_8>=1))||(Ext_Mem_Acc_16_12>=1))||(Ext_Mem_Acc_15_12>=1))||(Ext_Mem_Acc_14_12>=1))||(Ext_Mem_Acc_13_12>=1))||(Ext_Mem_Acc_11_12>=1))||(Ext_Mem_Acc_10_12>=1))||(Ext_Mem_Acc_9_12>=1))||(Ext_Mem_Acc_8_12>=1))||(Ext_Mem_Acc_7_12>=1))||(Ext_Mem_Acc_6_12>=1))||(Ext_Mem_Acc_5_12>=1))||(Ext_Mem_Acc_4_12>=1))||(Ext_Mem_Acc_3_12>=1))||(Ext_Mem_Acc_2_12>=1))||(Ext_Mem_Acc_1_12>=1))||(Ext_Mem_Acc_20_11>=1))||(Ext_Mem_Acc_11_13>=1))||(Ext_Mem_Acc_12_13>=1))||(Ext_Mem_Acc_9_13>=1))||(Ext_Mem_Acc_10_13>=1))||(Ext_Mem_Acc_7_13>=1))||(Ext_Mem_Acc_8_13>=1))||(Ext_Mem_Acc_5_13>=1))||(Ext_Mem_Acc_6_13>=1))||(Ext_Mem_Acc_3_13>=1))||(Ext_Mem_Acc_4_13>=1))||(Ext_Mem_Acc_1_13>=1))||(Ext_Mem_Acc_2_13>=1))||(Ext_Mem_Acc_19_12>=1))||(Ext_Mem_Acc_20_12>=1))||(Ext_Mem_Acc_17_12>=1))||(Ext_Mem_Acc_18_12>=1))||(Ext_Mem_Acc_20_10>=1))||(Ext_Mem_Acc_19_10>=1))||(Ext_Mem_Acc_2_11>=1))||(Ext_Mem_Acc_1_11>=1))||(Ext_Mem_Acc_16_10>=1))||(Ext_Mem_Acc_15_10>=1))||(Ext_Mem_Acc_18_10>=1))||(Ext_Mem_Acc_17_10>=1))||(Ext_Mem_Acc_12_10>=1))||(Ext_Mem_Acc_11_10>=1))||(Ext_Mem_Acc_14_10>=1))||(Ext_Mem_Acc_13_10>=1))||(Ext_Mem_Acc_7_10>=1))||(Ext_Mem_Acc_6_10>=1))||(Ext_Mem_Acc_9_10>=1))||(Ext_Mem_Acc_8_10>=1))||(Ext_Mem_Acc_16_11>=1))||(Ext_Mem_Acc_17_11>=1))||(Ext_Mem_Acc_18_11>=1))||(Ext_Mem_Acc_19_11>=1))||(Ext_Mem_Acc_12_11>=1))||(Ext_Mem_Acc_13_11>=1))||(Ext_Mem_Acc_14_11>=1))||(Ext_Mem_Acc_15_11>=1))||(Ext_Mem_Acc_7_11>=1))||(Ext_Mem_Acc_8_11>=1))||(Ext_Mem_Acc_9_11>=1))||(Ext_Mem_Acc_10_11>=1))||(Ext_Mem_Acc_3_11>=1))||(Ext_Mem_Acc_4_11>=1))||(Ext_Mem_Acc_5_11>=1))||(Ext_Mem_Acc_6_11>=1))||(Ext_Mem_Acc_19_15>=1))||(Ext_Mem_Acc_18_15>=1))||(Ext_Mem_Acc_17_15>=1))||(Ext_Mem_Acc_16_15>=1))||(Ext_Mem_Acc_3_16>=1))||(Ext_Mem_Acc_2_16>=1))||(Ext_Mem_Acc_1_16>=1))||(Ext_Mem_Acc_20_15>=1))||(Ext_Mem_Acc_10_15>=1))||(Ext_Mem_Acc_9_15>=1))||(Ext_Mem_Acc_8_15>=1))||(Ext_Mem_Acc_7_15>=1))||(Ext_Mem_Acc_14_15>=1))||(Ext_Mem_Acc_13_15>=1))||(Ext_Mem_Acc_12_15>=1))||(Ext_Mem_Acc_11_15>=1))||(Ext_Mem_Acc_14_16>=1))||(Ext_Mem_Acc_15_16>=1))||(Ext_Mem_Acc_12_16>=1))||(Ext_Mem_Acc_13_16>=1))||(Ext_Mem_Acc_19_16>=1))||(Ext_Mem_Acc_20_16>=1))||(Ext_Mem_Acc_17_16>=1))||(Ext_Mem_Acc_18_16>=1))||(Ext_Mem_Acc_6_16>=1))||(Ext_Mem_Acc_7_16>=1))||(Ext_Mem_Acc_4_16>=1))||(Ext_Mem_Acc_5_16>=1))||(Ext_Mem_Acc_10_16>=1))||(Ext_Mem_Acc_11_16>=1))||(Ext_Mem_Acc_8_16>=1))||(Ext_Mem_Acc_9_16>=1))||(Ext_Mem_Acc_3_14>=1))||(Ext_Mem_Acc_2_14>=1))||(Ext_Mem_Acc_5_14>=1))||(Ext_Mem_Acc_4_14>=1))||(Ext_Mem_Acc_7_14>=1))||(Ext_Mem_Acc_6_14>=1))||(Ext_Mem_Acc_9_14>=1))||(Ext_Mem_Acc_8_14>=1))||(Ext_Mem_Acc_15_13>=1))||(Ext_Mem_Acc_14_13>=1))||(Ext_Mem_Acc_17_13>=1))||(Ext_Mem_Acc_16_13>=1))||(Ext_Mem_Acc_19_13>=1))||(Ext_Mem_Acc_18_13>=1))||(Ext_Mem_Acc_1_14>=1))||(Ext_Mem_Acc_20_13>=1))||(Ext_Mem_Acc_19_14>=1))||(Ext_Mem_Acc_20_14>=1))||(Ext_Mem_Acc_1_15>=1))||(Ext_Mem_Acc_2_15>=1))||(Ext_Mem_Acc_3_15>=1))||(Ext_Mem_Acc_4_15>=1))||(Ext_Mem_Acc_5_15>=1))||(Ext_Mem_Acc_6_15>=1))||(Ext_Mem_Acc_10_14>=1))||(Ext_Mem_Acc_11_14>=1))||(Ext_Mem_Acc_12_14>=1))||(Ext_Mem_Acc_13_14>=1))||(Ext_Mem_Acc_15_14>=1))||(Ext_Mem_Acc_16_14>=1))||(Ext_Mem_Acc_17_14>=1))||(Ext_Mem_Acc_18_14>=1))||(Ext_Mem_Acc_16_19>=1))||(Ext_Mem_Acc_15_19>=1))||(Ext_Mem_Acc_18_19>=1))||(Ext_Mem_Acc_17_19>=1))||(Ext_Mem_Acc_12_19>=1))||(Ext_Mem_Acc_11_19>=1))||(Ext_Mem_Acc_14_19>=1))||(Ext_Mem_Acc_13_19>=1))||(Ext_Mem_Acc_5_20>=1))||(Ext_Mem_Acc_4_20>=1))||(Ext_Mem_Acc_7_20>=1))||(Ext_Mem_Acc_6_20>=1))||(Ext_Mem_Acc_1_20>=1))||(Ext_Mem_Acc_20_19>=1))||(Ext_Mem_Acc_3_20>=1))||(Ext_Mem_Acc_2_20>=1))||(Ext_Mem_Acc_19_18>=1))||(Ext_Mem_Acc_20_18>=1))||(Ext_Mem_Acc_1_19>=1))||(Ext_Mem_Acc_2_19>=1))||(Ext_Mem_Acc_14_18>=1))||(Ext_Mem_Acc_15_18>=1))||(Ext_Mem_Acc_16_18>=1))||(Ext_Mem_Acc_17_18>=1))||(Ext_Mem_Acc_7_19>=1))||(Ext_Mem_Acc_8_19>=1))||(Ext_Mem_Acc_9_19>=1))||(Ext_Mem_Acc_10_19>=1))||(Ext_Mem_Acc_3_19>=1))||(Ext_Mem_Acc_4_19>=1))||(Ext_Mem_Acc_5_19>=1))||(Ext_Mem_Acc_6_19>=1))||(Ext_Mem_Acc_5_18>=1))||(Ext_Mem_Acc_4_18>=1))||(Ext_Mem_Acc_3_18>=1))||(Ext_Mem_Acc_2_18>=1))||(Ext_Mem_Acc_1_18>=1))||(Ext_Mem_Acc_20_17>=1))||(Ext_Mem_Acc_19_17>=1))||(Ext_Mem_Acc_18_17>=1))||(Ext_Mem_Acc_13_18>=1))||(Ext_Mem_Acc_12_18>=1))||(Ext_Mem_Acc_11_18>=1))||(Ext_Mem_Acc_10_18>=1))||(Ext_Mem_Acc_9_18>=1))||(Ext_Mem_Acc_8_18>=1))||(Ext_Mem_Acc_7_18>=1))||(Ext_Mem_Acc_6_18>=1))||(Ext_Mem_Acc_7_17>=1))||(Ext_Mem_Acc_8_17>=1))||(Ext_Mem_Acc_5_17>=1))||(Ext_Mem_Acc_6_17>=1))||(Ext_Mem_Acc_3_17>=1))||(Ext_Mem_Acc_4_17>=1))||(Ext_Mem_Acc_1_17>=1))||(Ext_Mem_Acc_2_17>=1))||(Ext_Mem_Acc_15_17>=1))||(Ext_Mem_Acc_16_17>=1))||(Ext_Mem_Acc_13_17>=1))||(Ext_Mem_Acc_14_17>=1))||(Ext_Mem_Acc_11_17>=1))||(Ext_Mem_Acc_12_17>=1))||(Ext_Mem_Acc_9_17>=1))||(Ext_Mem_Acc_10_17>=1))||(Ext_Mem_Acc_10_20>=1))||(Ext_Mem_Acc_11_20>=1))||(Ext_Mem_Acc_8_20>=1))||(Ext_Mem_Acc_9_20>=1))||(Ext_Mem_Acc_14_20>=1))||(Ext_Mem_Acc_15_20>=1))||(Ext_Mem_Acc_12_20>=1))||(Ext_Mem_Acc_13_20>=1))||(Ext_Mem_Acc_18_20>=1))||(Ext_Mem_Acc_19_20>=1))||(Ext_Mem_Acc_16_20>=1))||(Ext_Mem_Acc_17_20>=1))")))))))
Formula 0 simplified : !XXFG"((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((Ext_Mem_Acc_16_1>=1)||(Ext_Mem_Acc_17_1>=1))||(Ext_Mem_Acc_14_1>=1))||(Ext_Mem_Acc_15_1>=1))||(Ext_Mem_Acc_12_1>=1))||(Ext_Mem_Acc_13_1>=1))||(Ext_Mem_Acc_10_1>=1))||(Ext_Mem_Acc_11_1>=1))||(Ext_Mem_Acc_8_1>=1))||(Ext_Mem_Acc_9_1>=1))||(Ext_Mem_Acc_6_1>=1))||(Ext_Mem_Acc_7_1>=1))||(Ext_Mem_Acc_4_1>=1))||(Ext_Mem_Acc_5_1>=1))||(Ext_Mem_Acc_2_1>=1))||(Ext_Mem_Acc_3_1>=1))||(Ext_Mem_Acc_8_3>=1))||(Ext_Mem_Acc_9_3>=1))||(Ext_Mem_Acc_10_3>=1))||(Ext_Mem_Acc_11_3>=1))||(Ext_Mem_Acc_4_3>=1))||(Ext_Mem_Acc_5_3>=1))||(Ext_Mem_Acc_6_3>=1))||(Ext_Mem_Acc_7_3>=1))||(Ext_Mem_Acc_19_2>=1))||(Ext_Mem_Acc_20_2>=1))||(Ext_Mem_Acc_1_3>=1))||(Ext_Mem_Acc_2_3>=1))||(Ext_Mem_Acc_15_2>=1))||(Ext_Mem_Acc_16_2>=1))||(Ext_Mem_Acc_17_2>=1))||(Ext_Mem_Acc_18_2>=1))||(Ext_Mem_Acc_12_2>=1))||(Ext_Mem_Acc_11_2>=1))||(Ext_Mem_Acc_14_2>=1))||(Ext_Mem_Acc_13_2>=1))||(Ext_Mem_Acc_8_2>=1))||(Ext_Mem_Acc_7_2>=1))||(Ext_Mem_Acc_10_2>=1))||(Ext_Mem_Acc_9_2>=1))||(Ext_Mem_Acc_4_2>=1))||(Ext_Mem_Acc_3_2>=1))||(Ext_Mem_Acc_6_2>=1))||(Ext_Mem_Acc_5_2>=1))||(Ext_Mem_Acc_19_1>=1))||(Ext_Mem_Acc_18_1>=1))||(Ext_Mem_Acc_1_2>=1))||(Ext_Mem_Acc_20_1>=1))||(Ext_Mem_Acc_12_5>=1))||(Ext_Mem_Acc_13_5>=1))||(Ext_Mem_Acc_10_5>=1))||(Ext_Mem_Acc_11_5>=1))||(Ext_Mem_Acc_8_5>=1))||(Ext_Mem_Acc_9_5>=1))||(Ext_Mem_Acc_6_5>=1))||(Ext_Mem_Acc_7_5>=1))||(Ext_Mem_Acc_20_5>=1))||(Ext_Mem_Acc_1_6>=1))||(Ext_Mem_Acc_18_5>=1))||(Ext_Mem_Acc_19_5>=1))||(Ext_Mem_Acc_16_5>=1))||(Ext_Mem_Acc_17_5>=1))||(Ext_Mem_Acc_14_5>=1))||(Ext_Mem_Acc_15_5>=1))||(Ext_Mem_Acc_10_6>=1))||(Ext_Mem_Acc_9_6>=1))||(Ext_Mem_Acc_8_6>=1))||(Ext_Mem_Acc_7_6>=1))||(Ext_Mem_Acc_5_6>=1))||(Ext_Mem_Acc_4_6>=1))||(Ext_Mem_Acc_3_6>=1))||(Ext_Mem_Acc_2_6>=1))||(Ext_Mem_Acc_18_6>=1))||(Ext_Mem_Acc_17_6>=1))||(Ext_Mem_Acc_16_6>=1))||(Ext_Mem_Acc_15_6>=1))||(Ext_Mem_Acc_14_6>=1))||(Ext_Mem_Acc_13_6>=1))||(Ext_Mem_Acc_12_6>=1))||(Ext_Mem_Acc_11_6>=1))||(Ext_Mem_Acc_16_3>=1))||(Ext_Mem_Acc_17_3>=1))||(Ext_Mem_Acc_18_3>=1))||(Ext_Mem_Acc_19_3>=1))||(Ext_Mem_Acc_12_3>=1))||(Ext_Mem_Acc_13_3>=1))||(Ext_Mem_Acc_14_3>=1))||(Ext_Mem_Acc_15_3>=1))||(Ext_Mem_Acc_5_4>=1))||(Ext_Mem_Acc_6_4>=1))||(Ext_Mem_Acc_7_4>=1))||(Ext_Mem_Acc_8_4>=1))||(Ext_Mem_Acc_20_3>=1))||(Ext_Mem_Acc_1_4>=1))||(Ext_Mem_Acc_2_4>=1))||(Ext_Mem_Acc_3_4>=1))||(Ext_Mem_Acc_14_4>=1))||(Ext_Mem_Acc_13_4>=1))||(Ext_Mem_Acc_16_4>=1))||(Ext_Mem_Acc_15_4>=1))||(Ext_Mem_Acc_10_4>=1))||(Ext_Mem_Acc_9_4>=1))||(Ext_Mem_Acc_12_4>=1))||(Ext_Mem_Acc_11_4>=1))||(Ext_Mem_Acc_2_5>=1))||(Ext_Mem_Acc_1_5>=1))||(Ext_Mem_Acc_4_5>=1))||(Ext_Mem_Acc_3_5>=1))||(Ext_Mem_Acc_18_4>=1))||(Ext_Mem_Acc_17_4>=1))||(Ext_Mem_Acc_20_4>=1))||(Ext_Mem_Acc_19_4>=1))||(Ext_Mem_Acc_15_8>=1))||(Ext_Mem_Acc_16_8>=1))||(Ext_Mem_Acc_13_8>=1))||(Ext_Mem_Acc_14_8>=1))||(Ext_Mem_Acc_19_8>=1))||(Ext_Mem_Acc_20_8>=1))||(Ext_Mem_Acc_17_8>=1))||(Ext_Mem_Acc_18_8>=1))||(Ext_Mem_Acc_3_9>=1))||(Ext_Mem_Acc_4_9>=1))||(Ext_Mem_Acc_1_9>=1))||(Ext_Mem_Acc_2_9>=1))||(Ext_Mem_Acc_7_9>=1))||(Ext_Mem_Acc_8_9>=1))||(Ext_Mem_Acc_5_9>=1))||(Ext_Mem_Acc_6_9>=1))||(Ext_Mem_Acc_13_9>=1))||(Ext_Mem_Acc_12_9>=1))||(Ext_Mem_Acc_11_9>=1))||(Ext_Mem_Acc_10_9>=1))||(Ext_Mem_Acc_17_9>=1))||(Ext_Mem_Acc_16_9>=1))||(Ext_Mem_Acc_15_9>=1))||(Ext_Mem_Acc_14_9>=1))||(Ext_Mem_Acc_1_10>=1))||(Ext_Mem_Acc_20_9>=1))||(Ext_Mem_Acc_19_9>=1))||(Ext_Mem_Acc_18_9>=1))||(Ext_Mem_Acc_5_10>=1))||(Ext_Mem_Acc_4_10>=1))||(Ext_Mem_Acc_3_10>=1))||(Ext_Mem_Acc_2_10>=1))||(Ext_Mem_Acc_19_6>=1))||(Ext_Mem_Acc_20_6>=1))||(Ext_Mem_Acc_1_7>=1))||(Ext_Mem_Acc_2_7>=1))||(Ext_Mem_Acc_3_7>=1))||(Ext_Mem_Acc_4_7>=1))||(Ext_Mem_Acc_5_7>=1))||(Ext_Mem_Acc_6_7>=1))||(Ext_Mem_Acc_8_7>=1))||(Ext_Mem_Acc_9_7>=1))||(Ext_Mem_Acc_10_7>=1))||(Ext_Mem_Acc_11_7>=1))||(Ext_Mem_Acc_12_7>=1))||(Ext_Mem_Acc_13_7>=1))||(Ext_Mem_Acc_14_7>=1))||(Ext_Mem_Acc_15_7>=1))||(Ext_Mem_Acc_17_7>=1))||(Ext_Mem_Acc_16_7>=1))||(Ext_Mem_Acc_19_7>=1))||(Ext_Mem_Acc_18_7>=1))||(Ext_Mem_Acc_1_8>=1))||(Ext_Mem_Acc_20_7>=1))||(Ext_Mem_Acc_3_8>=1))||(Ext_Mem_Acc_2_8>=1))||(Ext_Mem_Acc_5_8>=1))||(Ext_Mem_Acc_4_8>=1))||(Ext_Mem_Acc_7_8>=1))||(Ext_Mem_Acc_6_8>=1))||(Ext_Mem_Acc_10_8>=1))||(Ext_Mem_Acc_9_8>=1))||(Ext_Mem_Acc_12_8>=1))||(Ext_Mem_Acc_11_8>=1))||(Ext_Mem_Acc_16_12>=1))||(Ext_Mem_Acc_15_12>=1))||(Ext_Mem_Acc_14_12>=1))||(Ext_Mem_Acc_13_12>=1))||(Ext_Mem_Acc_11_12>=1))||(Ext_Mem_Acc_10_12>=1))||(Ext_Mem_Acc_9_12>=1))||(Ext_Mem_Acc_8_12>=1))||(Ext_Mem_Acc_7_12>=1))||(Ext_Mem_Acc_6_12>=1))||(Ext_Mem_Acc_5_12>=1))||(Ext_Mem_Acc_4_12>=1))||(Ext_Mem_Acc_3_12>=1))||(Ext_Mem_Acc_2_12>=1))||(Ext_Mem_Acc_1_12>=1))||(Ext_Mem_Acc_20_11>=1))||(Ext_Mem_Acc_11_13>=1))||(Ext_Mem_Acc_12_13>=1))||(Ext_Mem_Acc_9_13>=1))||(Ext_Mem_Acc_10_13>=1))||(Ext_Mem_Acc_7_13>=1))||(Ext_Mem_Acc_8_13>=1))||(Ext_Mem_Acc_5_13>=1))||(Ext_Mem_Acc_6_13>=1))||(Ext_Mem_Acc_3_13>=1))||(Ext_Mem_Acc_4_13>=1))||(Ext_Mem_Acc_1_13>=1))||(Ext_Mem_Acc_2_13>=1))||(Ext_Mem_Acc_19_12>=1))||(Ext_Mem_Acc_20_12>=1))||(Ext_Mem_Acc_17_12>=1))||(Ext_Mem_Acc_18_12>=1))||(Ext_Mem_Acc_20_10>=1))||(Ext_Mem_Acc_19_10>=1))||(Ext_Mem_Acc_2_11>=1))||(Ext_Mem_Acc_1_11>=1))||(Ext_Mem_Acc_16_10>=1))||(Ext_Mem_Acc_15_10>=1))||(Ext_Mem_Acc_18_10>=1))||(Ext_Mem_Acc_17_10>=1))||(Ext_Mem_Acc_12_10>=1))||(Ext_Mem_Acc_11_10>=1))||(Ext_Mem_Acc_14_10>=1))||(Ext_Mem_Acc_13_10>=1))||(Ext_Mem_Acc_7_10>=1))||(Ext_Mem_Acc_6_10>=1))||(Ext_Mem_Acc_9_10>=1))||(Ext_Mem_Acc_8_10>=1))||(Ext_Mem_Acc_16_11>=1))||(Ext_Mem_Acc_17_11>=1))||(Ext_Mem_Acc_18_11>=1))||(Ext_Mem_Acc_19_11>=1))||(Ext_Mem_Acc_12_11>=1))||(Ext_Mem_Acc_13_11>=1))||(Ext_Mem_Acc_14_11>=1))||(Ext_Mem_Acc_15_11>=1))||(Ext_Mem_Acc_7_11>=1))||(Ext_Mem_Acc_8_11>=1))||(Ext_Mem_Acc_9_11>=1))||(Ext_Mem_Acc_10_11>=1))||(Ext_Mem_Acc_3_11>=1))||(Ext_Mem_Acc_4_11>=1))||(Ext_Mem_Acc_5_11>=1))||(Ext_Mem_Acc_6_11>=1))||(Ext_Mem_Acc_19_15>=1))||(Ext_Mem_Acc_18_15>=1))||(Ext_Mem_Acc_17_15>=1))||(Ext_Mem_Acc_16_15>=1))||(Ext_Mem_Acc_3_16>=1))||(Ext_Mem_Acc_2_16>=1))||(Ext_Mem_Acc_1_16>=1))||(Ext_Mem_Acc_20_15>=1))||(Ext_Mem_Acc_10_15>=1))||(Ext_Mem_Acc_9_15>=1))||(Ext_Mem_Acc_8_15>=1))||(Ext_Mem_Acc_7_15>=1))||(Ext_Mem_Acc_14_15>=1))||(Ext_Mem_Acc_13_15>=1))||(Ext_Mem_Acc_12_15>=1))||(Ext_Mem_Acc_11_15>=1))||(Ext_Mem_Acc_14_16>=1))||(Ext_Mem_Acc_15_16>=1))||(Ext_Mem_Acc_12_16>=1))||(Ext_Mem_Acc_13_16>=1))||(Ext_Mem_Acc_19_16>=1))||(Ext_Mem_Acc_20_16>=1))||(Ext_Mem_Acc_17_16>=1))||(Ext_Mem_Acc_18_16>=1))||(Ext_Mem_Acc_6_16>=1))||(Ext_Mem_Acc_7_16>=1))||(Ext_Mem_Acc_4_16>=1))||(Ext_Mem_Acc_5_16>=1))||(Ext_Mem_Acc_10_16>=1))||(Ext_Mem_Acc_11_16>=1))||(Ext_Mem_Acc_8_16>=1))||(Ext_Mem_Acc_9_16>=1))||(Ext_Mem_Acc_3_14>=1))||(Ext_Mem_Acc_2_14>=1))||(Ext_Mem_Acc_5_14>=1))||(Ext_Mem_Acc_4_14>=1))||(Ext_Mem_Acc_7_14>=1))||(Ext_Mem_Acc_6_14>=1))||(Ext_Mem_Acc_9_14>=1))||(Ext_Mem_Acc_8_14>=1))||(Ext_Mem_Acc_15_13>=1))||(Ext_Mem_Acc_14_13>=1))||(Ext_Mem_Acc_17_13>=1))||(Ext_Mem_Acc_16_13>=1))||(Ext_Mem_Acc_19_13>=1))||(Ext_Mem_Acc_18_13>=1))||(Ext_Mem_Acc_1_14>=1))||(Ext_Mem_Acc_20_13>=1))||(Ext_Mem_Acc_19_14>=1))||(Ext_Mem_Acc_20_14>=1))||(Ext_Mem_Acc_1_15>=1))||(Ext_Mem_Acc_2_15>=1))||(Ext_Mem_Acc_3_15>=1))||(Ext_Mem_Acc_4_15>=1))||(Ext_Mem_Acc_5_15>=1))||(Ext_Mem_Acc_6_15>=1))||(Ext_Mem_Acc_10_14>=1))||(Ext_Mem_Acc_11_14>=1))||(Ext_Mem_Acc_12_14>=1))||(Ext_Mem_Acc_13_14>=1))||(Ext_Mem_Acc_15_14>=1))||(Ext_Mem_Acc_16_14>=1))||(Ext_Mem_Acc_17_14>=1))||(Ext_Mem_Acc_18_14>=1))||(Ext_Mem_Acc_16_19>=1))||(Ext_Mem_Acc_15_19>=1))||(Ext_Mem_Acc_18_19>=1))||(Ext_Mem_Acc_17_19>=1))||(Ext_Mem_Acc_12_19>=1))||(Ext_Mem_Acc_11_19>=1))||(Ext_Mem_Acc_14_19>=1))||(Ext_Mem_Acc_13_19>=1))||(Ext_Mem_Acc_5_20>=1))||(Ext_Mem_Acc_4_20>=1))||(Ext_Mem_Acc_7_20>=1))||(Ext_Mem_Acc_6_20>=1))||(Ext_Mem_Acc_1_20>=1))||(Ext_Mem_Acc_20_19>=1))||(Ext_Mem_Acc_3_20>=1))||(Ext_Mem_Acc_2_20>=1))||(Ext_Mem_Acc_19_18>=1))||(Ext_Mem_Acc_20_18>=1))||(Ext_Mem_Acc_1_19>=1))||(Ext_Mem_Acc_2_19>=1))||(Ext_Mem_Acc_14_18>=1))||(Ext_Mem_Acc_15_18>=1))||(Ext_Mem_Acc_16_18>=1))||(Ext_Mem_Acc_17_18>=1))||(Ext_Mem_Acc_7_19>=1))||(Ext_Mem_Acc_8_19>=1))||(Ext_Mem_Acc_9_19>=1))||(Ext_Mem_Acc_10_19>=1))||(Ext_Mem_Acc_3_19>=1))||(Ext_Mem_Acc_4_19>=1))||(Ext_Mem_Acc_5_19>=1))||(Ext_Mem_Acc_6_19>=1))||(Ext_Mem_Acc_5_18>=1))||(Ext_Mem_Acc_4_18>=1))||(Ext_Mem_Acc_3_18>=1))||(Ext_Mem_Acc_2_18>=1))||(Ext_Mem_Acc_1_18>=1))||(Ext_Mem_Acc_20_17>=1))||(Ext_Mem_Acc_19_17>=1))||(Ext_Mem_Acc_18_17>=1))||(Ext_Mem_Acc_13_18>=1))||(Ext_Mem_Acc_12_18>=1))||(Ext_Mem_Acc_11_18>=1))||(Ext_Mem_Acc_10_18>=1))||(Ext_Mem_Acc_9_18>=1))||(Ext_Mem_Acc_8_18>=1))||(Ext_Mem_Acc_7_18>=1))||(Ext_Mem_Acc_6_18>=1))||(Ext_Mem_Acc_7_17>=1))||(Ext_Mem_Acc_8_17>=1))||(Ext_Mem_Acc_5_17>=1))||(Ext_Mem_Acc_6_17>=1))||(Ext_Mem_Acc_3_17>=1))||(Ext_Mem_Acc_4_17>=1))||(Ext_Mem_Acc_1_17>=1))||(Ext_Mem_Acc_2_17>=1))||(Ext_Mem_Acc_15_17>=1))||(Ext_Mem_Acc_16_17>=1))||(Ext_Mem_Acc_13_17>=1))||(Ext_Mem_Acc_14_17>=1))||(Ext_Mem_Acc_11_17>=1))||(Ext_Mem_Acc_12_17>=1))||(Ext_Mem_Acc_9_17>=1))||(Ext_Mem_Acc_10_17>=1))||(Ext_Mem_Acc_10_20>=1))||(Ext_Mem_Acc_11_20>=1))||(Ext_Mem_Acc_8_20>=1))||(Ext_Mem_Acc_9_20>=1))||(Ext_Mem_Acc_14_20>=1))||(Ext_Mem_Acc_15_20>=1))||(Ext_Mem_Acc_12_20>=1))||(Ext_Mem_Acc_13_20>=1))||(Ext_Mem_Acc_18_20>=1))||(Ext_Mem_Acc_19_20>=1))||(Ext_Mem_Acc_16_20>=1))||(Ext_Mem_Acc_17_20>=1))"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 820 rows 461 cols
invariant :Ext_Mem_Acc_3_2 + Ext_Mem_Acc_1_2 + Ext_Mem_Acc_5_2 + Ext_Mem_Acc_4_2 + Ext_Mem_Acc_7_2 + Ext_Mem_Acc_6_2 + Ext_Mem_Acc_9_2 + Ext_Mem_Acc_8_2 + Ext_Mem_Acc_11_2 + Ext_Mem_Acc_10_2 + Ext_Mem_Acc_14_2 + Ext_Mem_Acc_15_2 + Ext_Mem_Acc_12_2 + Ext_Mem_Acc_13_2 + Ext_Mem_Acc_18_2 + Ext_Mem_Acc_19_2 + Ext_Mem_Acc_16_2 + Ext_Mem_Acc_17_2 + Ext_Mem_Acc_20_2 + Memory_2 = 1
invariant :-1'Ext_Mem_Acc_3_1 + -1'Ext_Mem_Acc_4_1 + -1'Ext_Mem_Acc_5_1 + -1'Ext_Mem_Acc_6_1 + -1'Ext_Mem_Acc_7_1 + -1'Ext_Mem_Acc_8_1 + -1'Ext_Mem_Acc_9_1 + -1'Ext_Mem_Acc_10_1 + -1'Ext_Mem_Acc_11_1 + -1'Ext_Mem_Acc_12_1 + -1'Ext_Mem_Acc_13_1 + -1'Ext_Mem_Acc_14_1 + -1'Ext_Mem_Acc_16_1 + -1'Ext_Mem_Acc_15_1 + -1'Ext_Mem_Acc_18_1 + -1'Ext_Mem_Acc_17_1 + -1'Ext_Mem_Acc_20_1 + -1'Ext_Mem_Acc_19_1 + -1'Ext_Mem_Acc_4_3 + -1'Ext_Mem_Acc_1_3 + -1'Ext_Mem_Acc_7_3 + -1'Ext_Mem_Acc_8_3 + -1'Ext_Mem_Acc_5_3 + -1'Ext_Mem_Acc_6_3 + -1'Ext_Mem_Acc_12_3 + -1'Ext_Mem_Acc_11_3 + -1'Ext_Mem_Acc_10_3 + -1'Ext_Mem_Acc_9_3 + -1'Ext_Mem_Acc_16_3 + -1'Ext_Mem_Acc_15_3 + -1'Ext_Mem_Acc_14_3 + -1'Ext_Mem_Acc_13_3 + -1'Ext_Mem_Acc_20_3 + -1'Ext_Mem_Acc_19_3 + -1'Ext_Mem_Acc_18_3 + -1'Ext_Mem_Acc_17_3 + Ext_Mem_Acc_2_4 + Ext_Mem_Acc_2_5 + Ext_Mem_Acc_2_6 + Ext_Mem_Acc_2_7 + -1'Ext_Mem_Acc_1_8 + -1'Ext_Mem_Acc_4_8 + -1'Ext_Mem_Acc_3_8 + -1'Ext_Mem_Acc_6_8 + -1'Ext_Mem_Acc_5_8 + -1'Ext_Mem_Acc_9_8 + -1'Ext_Mem_Acc_7_8 + -1'Ext_Mem_Acc_18_8 + -1'Ext_Mem_Acc_19_8 + -1'Ext_Mem_Acc_20_8 + Ext_Mem_Acc_2_9 + -1'Ext_Mem_Acc_10_8 + -1'Ext_Mem_Acc_11_8 + -1'Ext_Mem_Acc_12_8 + -1'Ext_Mem_Acc_13_8 + -1'Ext_Mem_Acc_14_8 + -1'Ext_Mem_Acc_15_8 + -1'Ext_Mem_Acc_16_8 + -1'Ext_Mem_Acc_17_8 + -1'Ext_Mem_Acc_1_10 + -1'Ext_Mem_Acc_14_10 + -1'Ext_Mem_Acc_15_10 + -1'Ext_Mem_Acc_12_10 + -1'Ext_Mem_Acc_13_10 + -1'Ext_Mem_Acc_18_10 + -1'Ext_Mem_Acc_19_10 + -1'Ext_Mem_Acc_16_10 + -1'Ext_Mem_Acc_17_10 + -1'Ext_Mem_Acc_5_10 + -1'Ext_Mem_Acc_6_10 + -1'Ext_Mem_Acc_3_10 + -1'Ext_Mem_Acc_4_10 + -1'Ext_Mem_Acc_9_10 + -1'Ext_Mem_Acc_11_10 + -1'Ext_Mem_Acc_7_10 + -1'Ext_Mem_Acc_8_10 + -1'Ext_Mem_Acc_20_10 + Ext_Mem_Acc_2_11 + Ext_Mem_Acc_2_12 + Ext_Mem_Acc_2_13 + Ext_Mem_Acc_2_14 + Ext_Mem_Acc_2_15 + Ext_Mem_Acc_2_17 + Ext_Mem_Acc_2_16 + Ext_Mem_Acc_2_19 + Ext_Mem_Acc_2_18 + Ext_Mem_Acc_2_20 + Active_2 + -1'Memory_10 + -1'Memory_3 + -1'Memory_1 + -1'Memory_8 + OwnMemAcc_2 + Queue_2 = -3
invariant :Ext_Mem_Acc_5_14 + Ext_Mem_Acc_6_14 + Ext_Mem_Acc_3_14 + Ext_Mem_Acc_4_14 + Ext_Mem_Acc_1_14 + Ext_Mem_Acc_2_14 + Ext_Mem_Acc_9_14 + Ext_Mem_Acc_10_14 + Ext_Mem_Acc_7_14 + Ext_Mem_Acc_8_14 + Ext_Mem_Acc_13_14 + Ext_Mem_Acc_15_14 + Ext_Mem_Acc_11_14 + Ext_Mem_Acc_12_14 + Ext_Mem_Acc_18_14 + Ext_Mem_Acc_19_14 + Ext_Mem_Acc_16_14 + Ext_Mem_Acc_17_14 + Ext_Mem_Acc_20_14 + Memory_14 = 1
invariant :Ext_Mem_Acc_10_20 + Ext_Mem_Acc_9_20 + Ext_Mem_Acc_12_20 + Ext_Mem_Acc_11_20 + Ext_Mem_Acc_6_20 + Ext_Mem_Acc_5_20 + Ext_Mem_Acc_8_20 + Ext_Mem_Acc_7_20 + Ext_Mem_Acc_18_20 + Ext_Mem_Acc_17_20 + Ext_Mem_Acc_19_20 + Ext_Mem_Acc_14_20 + Ext_Mem_Acc_13_20 + Ext_Mem_Acc_16_20 + Ext_Mem_Acc_15_20 + Ext_Mem_Acc_1_20 + Ext_Mem_Acc_2_20 + Ext_Mem_Acc_3_20 + Ext_Mem_Acc_4_20 + Memory_20 = 1
invariant :Ext_Mem_Acc_1_2 + Ext_Mem_Acc_1_3 + Ext_Mem_Acc_1_4 + -1'Ext_Mem_Acc_8_5 + -1'Ext_Mem_Acc_7_5 + -1'Ext_Mem_Acc_10_5 + -1'Ext_Mem_Acc_9_5 + -1'Ext_Mem_Acc_3_5 + -1'Ext_Mem_Acc_2_5 + -1'Ext_Mem_Acc_6_5 + -1'Ext_Mem_Acc_4_5 + -1'Ext_Mem_Acc_16_5 + -1'Ext_Mem_Acc_15_5 + -1'Ext_Mem_Acc_18_5 + -1'Ext_Mem_Acc_17_5 + -1'Ext_Mem_Acc_12_5 + -1'Ext_Mem_Acc_11_5 + -1'Ext_Mem_Acc_14_5 + -1'Ext_Mem_Acc_13_5 + Ext_Mem_Acc_1_6 + -1'Ext_Mem_Acc_19_5 + -1'Ext_Mem_Acc_20_5 + Ext_Mem_Acc_1_7 + Ext_Mem_Acc_1_8 + -1'Ext_Mem_Acc_2_9 + -1'Ext_Mem_Acc_3_9 + -1'Ext_Mem_Acc_4_9 + -1'Ext_Mem_Acc_5_9 + -1'Ext_Mem_Acc_18_9 + -1'Ext_Mem_Acc_17_9 + -1'Ext_Mem_Acc_16_9 + -1'Ext_Mem_Acc_15_9 + Ext_Mem_Acc_1_10 + -1'Ext_Mem_Acc_20_9 + -1'Ext_Mem_Acc_19_9 + -1'Ext_Mem_Acc_10_9 + -1'Ext_Mem_Acc_8_9 + -1'Ext_Mem_Acc_7_9 + -1'Ext_Mem_Acc_6_9 + -1'Ext_Mem_Acc_14_9 + -1'Ext_Mem_Acc_13_9 + -1'Ext_Mem_Acc_12_9 + -1'Ext_Mem_Acc_11_9 + Ext_Mem_Acc_1_11 + Ext_Mem_Acc_1_12 + Ext_Mem_Acc_1_13 + Ext_Mem_Acc_1_14 + Ext_Mem_Acc_1_15 + -1'Ext_Mem_Acc_3_17 + -1'Ext_Mem_Acc_2_17 + -1'Ext_Mem_Acc_5_17 + -1'Ext_Mem_Acc_4_17 + -1'Ext_Mem_Acc_7_17 + -1'Ext_Mem_Acc_6_17 + -1'Ext_Mem_Acc_9_17 + -1'Ext_Mem_Acc_8_17 + -1'Ext_Mem_Acc_11_17 + -1'Ext_Mem_Acc_10_17 + -1'Ext_Mem_Acc_13_17 + -1'Ext_Mem_Acc_12_17 + Ext_Mem_Acc_1_16 + Ext_Mem_Acc_1_19 + Ext_Mem_Acc_1_18 + -1'Ext_Mem_Acc_19_17 + -1'Ext_Mem_Acc_20_17 + -1'Ext_Mem_Acc_16_17 + -1'Ext_Mem_Acc_18_17 + -1'Ext_Mem_Acc_14_17 + -1'Ext_Mem_Acc_15_17 + Ext_Mem_Acc_1_20 + -1'Memory_17 + Active_1 + -1'Memory_9 + -1'Memory_5 + OwnMemAcc_1 + Queue_1 = -2
invariant :Ext_Mem_Acc_5_1 + Ext_Mem_Acc_5_2 + Ext_Mem_Acc_5_3 + -1'Ext_Mem_Acc_3_4 + -1'Ext_Mem_Acc_2_4 + -1'Ext_Mem_Acc_1_4 + -1'Ext_Mem_Acc_10_4 + -1'Ext_Mem_Acc_11_4 + -1'Ext_Mem_Acc_12_4 + -1'Ext_Mem_Acc_13_4 + -1'Ext_Mem_Acc_6_4 + -1'Ext_Mem_Acc_7_4 + -1'Ext_Mem_Acc_8_4 + -1'Ext_Mem_Acc_9_4 + -1'Ext_Mem_Acc_18_4 + -1'Ext_Mem_Acc_19_4 + -1'Ext_Mem_Acc_20_4 + -1'Ext_Mem_Acc_14_4 + -1'Ext_Mem_Acc_15_4 + -1'Ext_Mem_Acc_16_4 + -1'Ext_Mem_Acc_17_4 + -1'Ext_Mem_Acc_7_6 + -1'Ext_Mem_Acc_3_6 + -1'Ext_Mem_Acc_4_6 + -1'Ext_Mem_Acc_1_6 + -1'Ext_Mem_Acc_2_6 + -1'Ext_Mem_Acc_14_6 + -1'Ext_Mem_Acc_15_6 + -1'Ext_Mem_Acc_12_6 + -1'Ext_Mem_Acc_13_6 + -1'Ext_Mem_Acc_10_6 + -1'Ext_Mem_Acc_11_6 + -1'Ext_Mem_Acc_8_6 + -1'Ext_Mem_Acc_9_6 + -1'Ext_Mem_Acc_20_6 + -1'Ext_Mem_Acc_19_6 + -1'Ext_Mem_Acc_18_6 + -1'Ext_Mem_Acc_17_6 + -1'Ext_Mem_Acc_16_6 + Ext_Mem_Acc_5_7 + Ext_Mem_Acc_5_8 + Ext_Mem_Acc_5_9 + Ext_Mem_Acc_5_10 + Ext_Mem_Acc_5_11 + Ext_Mem_Acc_5_12 + Ext_Mem_Acc_5_13 + -1'Ext_Mem_Acc_6_14 + -1'Ext_Mem_Acc_3_14 + -1'Ext_Mem_Acc_4_14 + -1'Ext_Mem_Acc_1_14 + -1'Ext_Mem_Acc_2_14 + Ext_Mem_Acc_5_15 + -1'Ext_Mem_Acc_9_14 + -1'Ext_Mem_Acc_10_14 + -1'Ext_Mem_Acc_7_14 + -1'Ext_Mem_Acc_8_14 + -1'Ext_Mem_Acc_13_14 + -1'Ext_Mem_Acc_15_14 + -1'Ext_Mem_Acc_11_14 + -1'Ext_Mem_Acc_12_14 + -1'Ext_Mem_Acc_18_14 + -1'Ext_Mem_Acc_19_14 + -1'Ext_Mem_Acc_16_14 + -1'Ext_Mem_Acc_17_14 + -1'Ext_Mem_Acc_20_14 + Ext_Mem_Acc_5_17 + Ext_Mem_Acc_5_16 + Ext_Mem_Acc_5_19 + Ext_Mem_Acc_5_18 + Ext_Mem_Acc_5_20 + Active_5 + -1'Memory_14 + -1'Memory_4 + -1'Memory_6 + Queue_5 + OwnMemAcc_5 = -2
invariant :Ext_Bus + -1'Memory_19 + -1'Memory_20 + -1'Memory_17 + -1'Memory_18 + -1'Memory_12 + -1'Memory_11 + -1'Memory_10 + -1'Memory_9 + -1'Memory_16 + -1'Memory_15 + -1'Memory_14 + -1'Memory_13 + -1'Memory_4 + -1'Memory_3 + -1'Memory_2 + -1'Memory_1 + -1'Memory_8 + -1'Memory_7 + -1'Memory_6 + -1'Memory_5 = -19
invariant :Ext_Mem_Acc_16_1 + Ext_Mem_Acc_16_2 + Ext_Mem_Acc_16_3 + Ext_Mem_Acc_16_4 + Ext_Mem_Acc_16_5 + Ext_Mem_Acc_16_6 + Ext_Mem_Acc_16_7 + Ext_Mem_Acc_16_8 + Ext_Mem_Acc_16_9 + Ext_Mem_Acc_16_10 + Ext_Mem_Acc_16_11 + Ext_Mem_Acc_16_12 + Ext_Mem_Acc_16_13 + Ext_Mem_Acc_16_15 + Ext_Mem_Acc_16_14 + Ext_Mem_Acc_16_18 + Ext_Mem_Acc_16_17 + Ext_Mem_Acc_16_20 + Ext_Mem_Acc_16_19 + Queue_16 + Active_16 + OwnMemAcc_16 = 1
invariant :Ext_Mem_Acc_1_9 + Ext_Mem_Acc_2_9 + Ext_Mem_Acc_3_9 + Ext_Mem_Acc_4_9 + Ext_Mem_Acc_5_9 + Ext_Mem_Acc_18_9 + Ext_Mem_Acc_17_9 + Ext_Mem_Acc_16_9 + Ext_Mem_Acc_15_9 + Ext_Mem_Acc_20_9 + Ext_Mem_Acc_19_9 + Ext_Mem_Acc_10_9 + Ext_Mem_Acc_8_9 + Ext_Mem_Acc_7_9 + Ext_Mem_Acc_6_9 + Ext_Mem_Acc_14_9 + Ext_Mem_Acc_13_9 + Ext_Mem_Acc_12_9 + Ext_Mem_Acc_11_9 + Memory_9 = 1
invariant :Ext_Mem_Acc_9_13 + Ext_Mem_Acc_8_13 + Ext_Mem_Acc_7_13 + Ext_Mem_Acc_6_13 + Ext_Mem_Acc_5_13 + Ext_Mem_Acc_4_13 + Ext_Mem_Acc_3_13 + Ext_Mem_Acc_2_13 + Ext_Mem_Acc_1_13 + Ext_Mem_Acc_19_13 + Ext_Mem_Acc_20_13 + Ext_Mem_Acc_17_13 + Ext_Mem_Acc_18_13 + Ext_Mem_Acc_15_13 + Ext_Mem_Acc_16_13 + Ext_Mem_Acc_12_13 + Ext_Mem_Acc_14_13 + Ext_Mem_Acc_10_13 + Ext_Mem_Acc_11_13 + Memory_13 = 1
invariant :Ext_Mem_Acc_2_8 + Ext_Mem_Acc_1_8 + Ext_Mem_Acc_4_8 + Ext_Mem_Acc_3_8 + Ext_Mem_Acc_6_8 + Ext_Mem_Acc_5_8 + Ext_Mem_Acc_9_8 + Ext_Mem_Acc_7_8 + Ext_Mem_Acc_18_8 + Ext_Mem_Acc_19_8 + Ext_Mem_Acc_20_8 + Ext_Mem_Acc_10_8 + Ext_Mem_Acc_11_8 + Ext_Mem_Acc_12_8 + Ext_Mem_Acc_13_8 + Ext_Mem_Acc_14_8 + Ext_Mem_Acc_15_8 + Ext_Mem_Acc_16_8 + Ext_Mem_Acc_17_8 + Memory_8 = 1
invariant :Ext_Mem_Acc_11_1 + Ext_Mem_Acc_11_2 + Ext_Mem_Acc_11_3 + Ext_Mem_Acc_11_4 + Ext_Mem_Acc_11_5 + Ext_Mem_Acc_11_6 + Ext_Mem_Acc_11_7 + Ext_Mem_Acc_11_8 + Ext_Mem_Acc_11_9 + Ext_Mem_Acc_11_10 + Ext_Mem_Acc_11_12 + Ext_Mem_Acc_11_13 + Ext_Mem_Acc_11_15 + Ext_Mem_Acc_11_14 + Ext_Mem_Acc_11_17 + Ext_Mem_Acc_11_16 + Ext_Mem_Acc_11_18 + Ext_Mem_Acc_11_20 + Ext_Mem_Acc_11_19 + Active_11 + Queue_11 + OwnMemAcc_11 = 1
invariant :Ext_Mem_Acc_10_1 + Ext_Mem_Acc_10_2 + Ext_Mem_Acc_10_3 + Ext_Mem_Acc_10_4 + Ext_Mem_Acc_10_5 + Ext_Mem_Acc_10_6 + Ext_Mem_Acc_10_7 + Ext_Mem_Acc_10_8 + Ext_Mem_Acc_10_9 + Ext_Mem_Acc_10_11 + Ext_Mem_Acc_10_12 + Ext_Mem_Acc_10_13 + Ext_Mem_Acc_10_15 + Ext_Mem_Acc_10_14 + Ext_Mem_Acc_10_17 + Ext_Mem_Acc_10_16 + Ext_Mem_Acc_10_18 + -1'Ext_Mem_Acc_9_20 + -1'Ext_Mem_Acc_12_20 + -1'Ext_Mem_Acc_11_20 + -1'Ext_Mem_Acc_6_20 + -1'Ext_Mem_Acc_5_20 + -1'Ext_Mem_Acc_8_20 + -1'Ext_Mem_Acc_7_20 + -1'Ext_Mem_Acc_18_20 + -1'Ext_Mem_Acc_17_20 + -1'Ext_Mem_Acc_19_20 + -1'Ext_Mem_Acc_14_20 + -1'Ext_Mem_Acc_13_20 + -1'Ext_Mem_Acc_16_20 + -1'Ext_Mem_Acc_15_20 + Ext_Mem_Acc_10_19 + -1'Ext_Mem_Acc_1_20 + -1'Ext_Mem_Acc_2_20 + -1'Ext_Mem_Acc_3_20 + -1'Ext_Mem_Acc_4_20 + Active_10 + -1'Memory_20 + Queue_10 + OwnMemAcc_10 = 0
invariant :Ext_Mem_Acc_7_15 + Ext_Mem_Acc_6_15 + Ext_Mem_Acc_5_15 + Ext_Mem_Acc_4_15 + Ext_Mem_Acc_11_15 + Ext_Mem_Acc_10_15 + Ext_Mem_Acc_9_15 + Ext_Mem_Acc_8_15 + Ext_Mem_Acc_16_15 + Ext_Mem_Acc_14_15 + Ext_Mem_Acc_13_15 + Ext_Mem_Acc_12_15 + Ext_Mem_Acc_20_15 + Ext_Mem_Acc_19_15 + Ext_Mem_Acc_18_15 + Ext_Mem_Acc_17_15 + Ext_Mem_Acc_2_15 + Ext_Mem_Acc_3_15 + Ext_Mem_Acc_1_15 + Memory_15 = 1
invariant :Ext_Mem_Acc_18_1 + Ext_Mem_Acc_18_2 + Ext_Mem_Acc_18_3 + Ext_Mem_Acc_18_4 + Ext_Mem_Acc_18_5 + Ext_Mem_Acc_18_6 + Ext_Mem_Acc_18_7 + Ext_Mem_Acc_18_8 + Ext_Mem_Acc_18_9 + Ext_Mem_Acc_18_10 + Ext_Mem_Acc_18_11 + Ext_Mem_Acc_18_12 + Ext_Mem_Acc_18_13 + Ext_Mem_Acc_18_15 + Ext_Mem_Acc_18_14 + Ext_Mem_Acc_18_16 + Ext_Mem_Acc_18_17 + Ext_Mem_Acc_18_20 + Ext_Mem_Acc_18_19 + Queue_18 + Active_18 + OwnMemAcc_18 = 1
invariant :Ext_Mem_Acc_2_10 + Ext_Mem_Acc_1_10 + Ext_Mem_Acc_14_10 + Ext_Mem_Acc_15_10 + Ext_Mem_Acc_12_10 + Ext_Mem_Acc_13_10 + Ext_Mem_Acc_18_10 + Ext_Mem_Acc_19_10 + Ext_Mem_Acc_16_10 + Ext_Mem_Acc_17_10 + Ext_Mem_Acc_5_10 + Ext_Mem_Acc_6_10 + Ext_Mem_Acc_3_10 + Ext_Mem_Acc_4_10 + Ext_Mem_Acc_9_10 + Ext_Mem_Acc_11_10 + Ext_Mem_Acc_7_10 + Ext_Mem_Acc_8_10 + Ext_Mem_Acc_20_10 + Memory_10 = 1
invariant :Ext_Mem_Acc_1_5 + Ext_Mem_Acc_8_5 + Ext_Mem_Acc_7_5 + Ext_Mem_Acc_10_5 + Ext_Mem_Acc_9_5 + Ext_Mem_Acc_3_5 + Ext_Mem_Acc_2_5 + Ext_Mem_Acc_6_5 + Ext_Mem_Acc_4_5 + Ext_Mem_Acc_16_5 + Ext_Mem_Acc_15_5 + Ext_Mem_Acc_18_5 + Ext_Mem_Acc_17_5 + Ext_Mem_Acc_12_5 + Ext_Mem_Acc_11_5 + Ext_Mem_Acc_14_5 + Ext_Mem_Acc_13_5 + Ext_Mem_Acc_19_5 + Ext_Mem_Acc_20_5 + Memory_5 = 1
invariant :Ext_Mem_Acc_6_1 + Ext_Mem_Acc_6_2 + Ext_Mem_Acc_6_3 + Ext_Mem_Acc_6_4 + Ext_Mem_Acc_6_5 + Ext_Mem_Acc_6_7 + Ext_Mem_Acc_6_8 + Ext_Mem_Acc_6_9 + Ext_Mem_Acc_6_10 + Ext_Mem_Acc_6_11 + Ext_Mem_Acc_6_12 + Ext_Mem_Acc_6_13 + Ext_Mem_Acc_6_14 + Ext_Mem_Acc_6_15 + Ext_Mem_Acc_6_17 + Ext_Mem_Acc_6_16 + Ext_Mem_Acc_6_19 + Ext_Mem_Acc_6_18 + Ext_Mem_Acc_6_20 + Active_6 + Queue_6 + OwnMemAcc_6 = 1
invariant :Ext_Mem_Acc_5_6 + Ext_Mem_Acc_7_6 + Ext_Mem_Acc_3_6 + Ext_Mem_Acc_4_6 + Ext_Mem_Acc_1_6 + Ext_Mem_Acc_2_6 + Ext_Mem_Acc_14_6 + Ext_Mem_Acc_15_6 + Ext_Mem_Acc_12_6 + Ext_Mem_Acc_13_6 + Ext_Mem_Acc_10_6 + Ext_Mem_Acc_11_6 + Ext_Mem_Acc_8_6 + Ext_Mem_Acc_9_6 + Ext_Mem_Acc_20_6 + Ext_Mem_Acc_19_6 + Ext_Mem_Acc_18_6 + Ext_Mem_Acc_17_6 + Ext_Mem_Acc_16_6 + Memory_6 = 1
invariant :Ext_Mem_Acc_19_18 + Ext_Mem_Acc_17_18 + Ext_Mem_Acc_16_18 + Ext_Mem_Acc_15_18 + Ext_Mem_Acc_14_18 + Ext_Mem_Acc_13_18 + Ext_Mem_Acc_12_18 + Ext_Mem_Acc_11_18 + Ext_Mem_Acc_20_18 + Ext_Mem_Acc_1_18 + Ext_Mem_Acc_2_18 + Ext_Mem_Acc_9_18 + Ext_Mem_Acc_10_18 + Ext_Mem_Acc_7_18 + Ext_Mem_Acc_8_18 + Ext_Mem_Acc_5_18 + Ext_Mem_Acc_6_18 + Ext_Mem_Acc_3_18 + Ext_Mem_Acc_4_18 + Memory_18 = 1
invariant :Ext_Mem_Acc_3_1 + -1'Ext_Mem_Acc_1_2 + -1'Ext_Mem_Acc_5_2 + -1'Ext_Mem_Acc_4_2 + -1'Ext_Mem_Acc_7_2 + -1'Ext_Mem_Acc_6_2 + -1'Ext_Mem_Acc_9_2 + -1'Ext_Mem_Acc_8_2 + -1'Ext_Mem_Acc_11_2 + -1'Ext_Mem_Acc_10_2 + -1'Ext_Mem_Acc_14_2 + -1'Ext_Mem_Acc_15_2 + -1'Ext_Mem_Acc_12_2 + -1'Ext_Mem_Acc_13_2 + -1'Ext_Mem_Acc_18_2 + -1'Ext_Mem_Acc_19_2 + -1'Ext_Mem_Acc_16_2 + -1'Ext_Mem_Acc_17_2 + -1'Ext_Mem_Acc_20_2 + Ext_Mem_Acc_3_4 + Ext_Mem_Acc_3_5 + Ext_Mem_Acc_3_6 + -1'Ext_Mem_Acc_2_7 + -1'Ext_Mem_Acc_1_7 + -1'Ext_Mem_Acc_12_7 + -1'Ext_Mem_Acc_11_7 + -1'Ext_Mem_Acc_10_7 + -1'Ext_Mem_Acc_9_7 + -1'Ext_Mem_Acc_8_7 + -1'Ext_Mem_Acc_6_7 + -1'Ext_Mem_Acc_5_7 + -1'Ext_Mem_Acc_4_7 + Ext_Mem_Acc_3_8 + -1'Ext_Mem_Acc_14_7 + -1'Ext_Mem_Acc_13_7 + -1'Ext_Mem_Acc_16_7 + -1'Ext_Mem_Acc_15_7 + -1'Ext_Mem_Acc_18_7 + -1'Ext_Mem_Acc_17_7 + -1'Ext_Mem_Acc_20_7 + -1'Ext_Mem_Acc_19_7 + Ext_Mem_Acc_3_9 + Ext_Mem_Acc_3_10 + Ext_Mem_Acc_3_11 + Ext_Mem_Acc_3_12 + Ext_Mem_Acc_3_13 + Ext_Mem_Acc_3_14 + Ext_Mem_Acc_3_15 + Ext_Mem_Acc_3_17 + Ext_Mem_Acc_3_16 + Ext_Mem_Acc_3_19 + Ext_Mem_Acc_3_18 + Ext_Mem_Acc_3_20 + Active_3 + -1'Memory_2 + -1'Memory_7 + OwnMemAcc_3 + Queue_3 = -1
invariant :Ext_Mem_Acc_14_11 + Ext_Mem_Acc_13_11 + Ext_Mem_Acc_16_11 + Ext_Mem_Acc_15_11 + Ext_Mem_Acc_9_11 + Ext_Mem_Acc_8_11 + Ext_Mem_Acc_12_11 + Ext_Mem_Acc_10_11 + Ext_Mem_Acc_5_11 + Ext_Mem_Acc_4_11 + Ext_Mem_Acc_7_11 + Ext_Mem_Acc_6_11 + Ext_Mem_Acc_1_11 + Ext_Mem_Acc_3_11 + Ext_Mem_Acc_2_11 + Ext_Mem_Acc_17_11 + Ext_Mem_Acc_18_11 + Ext_Mem_Acc_19_11 + Ext_Mem_Acc_20_11 + Memory_11 = 1
invariant :Ext_Mem_Acc_2_1 + Ext_Mem_Acc_3_1 + Ext_Mem_Acc_4_1 + Ext_Mem_Acc_5_1 + Ext_Mem_Acc_6_1 + Ext_Mem_Acc_7_1 + Ext_Mem_Acc_8_1 + Ext_Mem_Acc_9_1 + Ext_Mem_Acc_10_1 + Ext_Mem_Acc_11_1 + Ext_Mem_Acc_12_1 + Ext_Mem_Acc_13_1 + Ext_Mem_Acc_14_1 + Ext_Mem_Acc_16_1 + Ext_Mem_Acc_15_1 + Ext_Mem_Acc_18_1 + Ext_Mem_Acc_17_1 + Ext_Mem_Acc_20_1 + Ext_Mem_Acc_19_1 + Memory_1 = 1
invariant :Ext_Mem_Acc_9_12 + Ext_Mem_Acc_10_12 + Ext_Mem_Acc_11_12 + Ext_Mem_Acc_13_12 + Ext_Mem_Acc_5_12 + Ext_Mem_Acc_6_12 + Ext_Mem_Acc_7_12 + Ext_Mem_Acc_8_12 + Ext_Mem_Acc_1_12 + Ext_Mem_Acc_2_12 + Ext_Mem_Acc_3_12 + Ext_Mem_Acc_4_12 + Ext_Mem_Acc_20_12 + Ext_Mem_Acc_19_12 + Ext_Mem_Acc_18_12 + Ext_Mem_Acc_17_12 + Ext_Mem_Acc_16_12 + Ext_Mem_Acc_15_12 + Ext_Mem_Acc_14_12 + Memory_12 = 1
invariant :Ext_Mem_Acc_1_17 + Ext_Mem_Acc_3_17 + Ext_Mem_Acc_2_17 + Ext_Mem_Acc_5_17 + Ext_Mem_Acc_4_17 + Ext_Mem_Acc_7_17 + Ext_Mem_Acc_6_17 + Ext_Mem_Acc_9_17 + Ext_Mem_Acc_8_17 + Ext_Mem_Acc_11_17 + Ext_Mem_Acc_10_17 + Ext_Mem_Acc_13_17 + Ext_Mem_Acc_12_17 + Ext_Mem_Acc_19_17 + Ext_Mem_Acc_20_17 + Ext_Mem_Acc_16_17 + Ext_Mem_Acc_18_17 + Ext_Mem_Acc_14_17 + Ext_Mem_Acc_15_17 + Memory_17 = 1
invariant :Ext_Mem_Acc_9_1 + Ext_Mem_Acc_9_2 + Ext_Mem_Acc_9_3 + Ext_Mem_Acc_9_4 + Ext_Mem_Acc_9_5 + Ext_Mem_Acc_9_6 + Ext_Mem_Acc_9_7 + Ext_Mem_Acc_9_8 + Ext_Mem_Acc_9_10 + Ext_Mem_Acc_9_11 + -1'Ext_Mem_Acc_10_12 + -1'Ext_Mem_Acc_11_12 + -1'Ext_Mem_Acc_13_12 + -1'Ext_Mem_Acc_5_12 + -1'Ext_Mem_Acc_6_12 + -1'Ext_Mem_Acc_7_12 + -1'Ext_Mem_Acc_8_12 + -1'Ext_Mem_Acc_1_12 + -1'Ext_Mem_Acc_2_12 + -1'Ext_Mem_Acc_3_12 + -1'Ext_Mem_Acc_4_12 + -1'Ext_Mem_Acc_8_13 + -1'Ext_Mem_Acc_7_13 + -1'Ext_Mem_Acc_6_13 + -1'Ext_Mem_Acc_5_13 + -1'Ext_Mem_Acc_4_13 + -1'Ext_Mem_Acc_3_13 + -1'Ext_Mem_Acc_2_13 + -1'Ext_Mem_Acc_1_13 + -1'Ext_Mem_Acc_20_12 + -1'Ext_Mem_Acc_19_12 + -1'Ext_Mem_Acc_18_12 + -1'Ext_Mem_Acc_17_12 + -1'Ext_Mem_Acc_16_12 + -1'Ext_Mem_Acc_15_12 + -1'Ext_Mem_Acc_14_12 + -1'Ext_Mem_Acc_19_13 + -1'Ext_Mem_Acc_20_13 + -1'Ext_Mem_Acc_17_13 + -1'Ext_Mem_Acc_18_13 + -1'Ext_Mem_Acc_15_13 + -1'Ext_Mem_Acc_16_13 + -1'Ext_Mem_Acc_12_13 + -1'Ext_Mem_Acc_14_13 + -1'Ext_Mem_Acc_10_13 + -1'Ext_Mem_Acc_11_13 + Ext_Mem_Acc_9_15 + Ext_Mem_Acc_9_14 + Ext_Mem_Acc_9_17 + Ext_Mem_Acc_9_16 + Ext_Mem_Acc_9_18 + Ext_Mem_Acc_9_20 + Ext_Mem_Acc_9_19 + Active_9 + -1'Memory_12 + -1'Memory_13 + Queue_9 + OwnMemAcc_9 = -1
invariant :Ext_Mem_Acc_13_1 + Ext_Mem_Acc_13_2 + Ext_Mem_Acc_13_3 + Ext_Mem_Acc_13_4 + Ext_Mem_Acc_13_5 + Ext_Mem_Acc_13_6 + Ext_Mem_Acc_13_7 + Ext_Mem_Acc_13_8 + Ext_Mem_Acc_13_9 + Ext_Mem_Acc_13_10 + Ext_Mem_Acc_13_11 + Ext_Mem_Acc_13_12 + Ext_Mem_Acc_13_15 + Ext_Mem_Acc_13_14 + Ext_Mem_Acc_13_17 + Ext_Mem_Acc_13_16 + Ext_Mem_Acc_13_18 + Ext_Mem_Acc_13_20 + Ext_Mem_Acc_13_19 + Queue_13 + Active_13 + OwnMemAcc_13 = 1
invariant :Ext_Mem_Acc_7_1 + Ext_Mem_Acc_7_2 + Ext_Mem_Acc_7_3 + Ext_Mem_Acc_7_4 + Ext_Mem_Acc_7_5 + Ext_Mem_Acc_7_6 + Ext_Mem_Acc_7_8 + Ext_Mem_Acc_7_9 + Ext_Mem_Acc_7_10 + Ext_Mem_Acc_7_11 + Ext_Mem_Acc_7_12 + Ext_Mem_Acc_7_13 + -1'Ext_Mem_Acc_6_15 + -1'Ext_Mem_Acc_5_15 + -1'Ext_Mem_Acc_4_15 + -1'Ext_Mem_Acc_11_15 + -1'Ext_Mem_Acc_10_15 + -1'Ext_Mem_Acc_9_15 + -1'Ext_Mem_Acc_8_15 + -1'Ext_Mem_Acc_16_15 + -1'Ext_Mem_Acc_14_15 + -1'Ext_Mem_Acc_13_15 + -1'Ext_Mem_Acc_12_15 + -1'Ext_Mem_Acc_20_15 + -1'Ext_Mem_Acc_19_15 + -1'Ext_Mem_Acc_18_15 + -1'Ext_Mem_Acc_17_15 + Ext_Mem_Acc_7_14 + -1'Ext_Mem_Acc_2_15 + -1'Ext_Mem_Acc_3_15 + -1'Ext_Mem_Acc_1_15 + Ext_Mem_Acc_7_17 + Ext_Mem_Acc_7_16 + -1'Ext_Mem_Acc_6_19 + -1'Ext_Mem_Acc_5_19 + -1'Ext_Mem_Acc_4_19 + -1'Ext_Mem_Acc_3_19 + -1'Ext_Mem_Acc_2_19 + -1'Ext_Mem_Acc_1_19 + Ext_Mem_Acc_7_18 + Ext_Mem_Acc_7_20 + -1'Ext_Mem_Acc_12_19 + -1'Ext_Mem_Acc_13_19 + -1'Ext_Mem_Acc_14_19 + -1'Ext_Mem_Acc_15_19 + -1'Ext_Mem_Acc_8_19 + -1'Ext_Mem_Acc_9_19 + -1'Ext_Mem_Acc_10_19 + -1'Ext_Mem_Acc_11_19 + -1'Ext_Mem_Acc_16_19 + -1'Ext_Mem_Acc_17_19 + -1'Ext_Mem_Acc_18_19 + -1'Ext_Mem_Acc_20_19 + Active_7 + -1'Memory_19 + -1'Memory_15 + Queue_7 + OwnMemAcc_7 = -1
invariant :Ext_Mem_Acc_5_4 + Ext_Mem_Acc_3_4 + Ext_Mem_Acc_2_4 + Ext_Mem_Acc_1_4 + Ext_Mem_Acc_10_4 + Ext_Mem_Acc_11_4 + Ext_Mem_Acc_12_4 + Ext_Mem_Acc_13_4 + Ext_Mem_Acc_6_4 + Ext_Mem_Acc_7_4 + Ext_Mem_Acc_8_4 + Ext_Mem_Acc_9_4 + Ext_Mem_Acc_18_4 + Ext_Mem_Acc_19_4 + Ext_Mem_Acc_20_4 + Ext_Mem_Acc_14_4 + Ext_Mem_Acc_15_4 + Ext_Mem_Acc_16_4 + Ext_Mem_Acc_17_4 + Memory_4 = 1
invariant :Ext_Mem_Acc_2_3 + Ext_Mem_Acc_4_3 + Ext_Mem_Acc_1_3 + Ext_Mem_Acc_7_3 + Ext_Mem_Acc_8_3 + Ext_Mem_Acc_5_3 + Ext_Mem_Acc_6_3 + Ext_Mem_Acc_12_3 + Ext_Mem_Acc_11_3 + Ext_Mem_Acc_10_3 + Ext_Mem_Acc_9_3 + Ext_Mem_Acc_16_3 + Ext_Mem_Acc_15_3 + Ext_Mem_Acc_14_3 + Ext_Mem_Acc_13_3 + Ext_Mem_Acc_20_3 + Ext_Mem_Acc_19_3 + Ext_Mem_Acc_18_3 + Ext_Mem_Acc_17_3 + Memory_3 = 1
invariant :Ext_Mem_Acc_20_1 + Ext_Mem_Acc_20_2 + Ext_Mem_Acc_20_3 + Ext_Mem_Acc_20_4 + Ext_Mem_Acc_20_5 + Ext_Mem_Acc_20_6 + Ext_Mem_Acc_20_7 + Ext_Mem_Acc_20_8 + Ext_Mem_Acc_20_9 + Ext_Mem_Acc_20_10 + Ext_Mem_Acc_20_11 + Ext_Mem_Acc_20_12 + Ext_Mem_Acc_20_13 + Ext_Mem_Acc_20_15 + Ext_Mem_Acc_20_14 + Ext_Mem_Acc_20_16 + Ext_Mem_Acc_20_18 + Ext_Mem_Acc_20_17 + Ext_Mem_Acc_20_19 + Queue_20 + Active_20 + OwnMemAcc_20 = 1
invariant :Ext_Mem_Acc_19_1 + Ext_Mem_Acc_19_2 + Ext_Mem_Acc_19_3 + Ext_Mem_Acc_19_4 + Ext_Mem_Acc_19_5 + Ext_Mem_Acc_19_6 + Ext_Mem_Acc_19_7 + Ext_Mem_Acc_19_8 + Ext_Mem_Acc_19_9 + Ext_Mem_Acc_19_10 + Ext_Mem_Acc_19_11 + Ext_Mem_Acc_19_12 + Ext_Mem_Acc_19_13 + Ext_Mem_Acc_19_15 + Ext_Mem_Acc_19_14 + -1'Ext_Mem_Acc_18_16 + -1'Ext_Mem_Acc_20_16 + -1'Ext_Mem_Acc_1_16 + -1'Ext_Mem_Acc_2_16 + -1'Ext_Mem_Acc_3_16 + -1'Ext_Mem_Acc_4_16 + -1'Ext_Mem_Acc_5_16 + -1'Ext_Mem_Acc_6_16 + -1'Ext_Mem_Acc_7_16 + -1'Ext_Mem_Acc_8_16 + -1'Ext_Mem_Acc_9_16 + -1'Ext_Mem_Acc_10_16 + -1'Ext_Mem_Acc_11_16 + -1'Ext_Mem_Acc_12_16 + -1'Ext_Mem_Acc_13_16 + -1'Ext_Mem_Acc_14_16 + -1'Ext_Mem_Acc_15_16 + -1'Ext_Mem_Acc_17_16 + -1'Ext_Mem_Acc_17_18 + -1'Ext_Mem_Acc_16_18 + -1'Ext_Mem_Acc_15_18 + -1'Ext_Mem_Acc_14_18 + -1'Ext_Mem_Acc_13_18 + -1'Ext_Mem_Acc_12_18 + -1'Ext_Mem_Acc_11_18 + -1'Ext_Mem_Acc_20_18 + -1'Ext_Mem_Acc_1_18 + -1'Ext_Mem_Acc_2_18 + Ext_Mem_Acc_19_17 + -1'Ext_Mem_Acc_9_18 + -1'Ext_Mem_Acc_10_18 + -1'Ext_Mem_Acc_7_18 + -1'Ext_Mem_Acc_8_18 + -1'Ext_Mem_Acc_5_18 + -1'Ext_Mem_Acc_6_18 + -1'Ext_Mem_Acc_3_18 + -1'Ext_Mem_Acc_4_18 + Ext_Mem_Acc_19_20 + -1'Memory_18 + -1'Memory_16 + Queue_19 + Active_19 + OwnMemAcc_19 = -1
invariant :Ext_Mem_Acc_19_16 + Ext_Mem_Acc_18_16 + Ext_Mem_Acc_20_16 + Ext_Mem_Acc_1_16 + Ext_Mem_Acc_2_16 + Ext_Mem_Acc_3_16 + Ext_Mem_Acc_4_16 + Ext_Mem_Acc_5_16 + Ext_Mem_Acc_6_16 + Ext_Mem_Acc_7_16 + Ext_Mem_Acc_8_16 + Ext_Mem_Acc_9_16 + Ext_Mem_Acc_10_16 + Ext_Mem_Acc_11_16 + Ext_Mem_Acc_12_16 + Ext_Mem_Acc_13_16 + Ext_Mem_Acc_14_16 + Ext_Mem_Acc_15_16 + Ext_Mem_Acc_17_16 + Memory_16 = 1
invariant :Ext_Mem_Acc_12_1 + Ext_Mem_Acc_12_2 + Ext_Mem_Acc_12_3 + Ext_Mem_Acc_12_4 + Ext_Mem_Acc_12_5 + Ext_Mem_Acc_12_6 + Ext_Mem_Acc_12_7 + Ext_Mem_Acc_12_8 + Ext_Mem_Acc_12_9 + Ext_Mem_Acc_12_10 + Ext_Mem_Acc_12_11 + Ext_Mem_Acc_12_13 + Ext_Mem_Acc_12_15 + Ext_Mem_Acc_12_14 + Ext_Mem_Acc_12_17 + Ext_Mem_Acc_12_16 + Ext_Mem_Acc_12_18 + Ext_Mem_Acc_12_20 + Ext_Mem_Acc_12_19 + Active_12 + Queue_12 + OwnMemAcc_12 = 1
invariant :Ext_Mem_Acc_4_1 + Ext_Mem_Acc_4_2 + Ext_Mem_Acc_4_3 + Ext_Mem_Acc_4_5 + Ext_Mem_Acc_4_6 + Ext_Mem_Acc_4_7 + Ext_Mem_Acc_4_8 + Ext_Mem_Acc_4_9 + Ext_Mem_Acc_4_10 + Ext_Mem_Acc_4_11 + Ext_Mem_Acc_4_12 + Ext_Mem_Acc_4_13 + Ext_Mem_Acc_4_14 + Ext_Mem_Acc_4_15 + Ext_Mem_Acc_4_17 + Ext_Mem_Acc_4_16 + Ext_Mem_Acc_4_19 + Ext_Mem_Acc_4_18 + Ext_Mem_Acc_4_20 + Active_4 + OwnMemAcc_4 + Queue_4 = 1
invariant :Ext_Mem_Acc_15_1 + Ext_Mem_Acc_15_2 + Ext_Mem_Acc_15_3 + Ext_Mem_Acc_15_4 + Ext_Mem_Acc_15_5 + Ext_Mem_Acc_15_6 + Ext_Mem_Acc_15_7 + Ext_Mem_Acc_15_8 + Ext_Mem_Acc_15_9 + Ext_Mem_Acc_15_10 + Ext_Mem_Acc_15_11 + Ext_Mem_Acc_15_12 + Ext_Mem_Acc_15_13 + Ext_Mem_Acc_15_14 + Ext_Mem_Acc_15_16 + Ext_Mem_Acc_15_18 + Ext_Mem_Acc_15_17 + Ext_Mem_Acc_15_20 + Ext_Mem_Acc_15_19 + Queue_15 + Active_15 + OwnMemAcc_15 = 1
invariant :Ext_Mem_Acc_17_1 + Ext_Mem_Acc_17_2 + Ext_Mem_Acc_17_3 + Ext_Mem_Acc_17_4 + Ext_Mem_Acc_17_5 + Ext_Mem_Acc_17_6 + Ext_Mem_Acc_17_7 + Ext_Mem_Acc_17_8 + Ext_Mem_Acc_17_9 + Ext_Mem_Acc_17_10 + Ext_Mem_Acc_17_11 + Ext_Mem_Acc_17_12 + Ext_Mem_Acc_17_13 + Ext_Mem_Acc_17_15 + Ext_Mem_Acc_17_14 + Ext_Mem_Acc_17_16 + Ext_Mem_Acc_17_18 + Ext_Mem_Acc_17_20 + Ext_Mem_Acc_17_19 + Queue_17 + Active_17 + OwnMemAcc_17 = 1
invariant :Ext_Mem_Acc_3_7 + Ext_Mem_Acc_2_7 + Ext_Mem_Acc_1_7 + Ext_Mem_Acc_12_7 + Ext_Mem_Acc_11_7 + Ext_Mem_Acc_10_7 + Ext_Mem_Acc_9_7 + Ext_Mem_Acc_8_7 + Ext_Mem_Acc_6_7 + Ext_Mem_Acc_5_7 + Ext_Mem_Acc_4_7 + Ext_Mem_Acc_14_7 + Ext_Mem_Acc_13_7 + Ext_Mem_Acc_16_7 + Ext_Mem_Acc_15_7 + Ext_Mem_Acc_18_7 + Ext_Mem_Acc_17_7 + Ext_Mem_Acc_20_7 + Ext_Mem_Acc_19_7 + Memory_7 = 1
invariant :Ext_Mem_Acc_8_1 + Ext_Mem_Acc_8_2 + Ext_Mem_Acc_8_3 + Ext_Mem_Acc_8_4 + Ext_Mem_Acc_8_5 + Ext_Mem_Acc_8_6 + Ext_Mem_Acc_8_7 + Ext_Mem_Acc_8_9 + Ext_Mem_Acc_8_10 + Ext_Mem_Acc_8_11 + Ext_Mem_Acc_8_12 + Ext_Mem_Acc_8_13 + Ext_Mem_Acc_8_15 + Ext_Mem_Acc_8_14 + Ext_Mem_Acc_8_17 + Ext_Mem_Acc_8_16 + Ext_Mem_Acc_8_18 + Ext_Mem_Acc_8_20 + Ext_Mem_Acc_8_19 + Active_8 + Queue_8 + OwnMemAcc_8 = 1
invariant :Ext_Mem_Acc_7_19 + Ext_Mem_Acc_6_19 + Ext_Mem_Acc_5_19 + Ext_Mem_Acc_4_19 + Ext_Mem_Acc_3_19 + Ext_Mem_Acc_2_19 + Ext_Mem_Acc_1_19 + Ext_Mem_Acc_12_19 + Ext_Mem_Acc_13_19 + Ext_Mem_Acc_14_19 + Ext_Mem_Acc_15_19 + Ext_Mem_Acc_8_19 + Ext_Mem_Acc_9_19 + Ext_Mem_Acc_10_19 + Ext_Mem_Acc_11_19 + Ext_Mem_Acc_16_19 + Ext_Mem_Acc_17_19 + Ext_Mem_Acc_18_19 + Ext_Mem_Acc_20_19 + Memory_19 = 1
invariant :Ext_Mem_Acc_14_1 + Ext_Mem_Acc_14_2 + Ext_Mem_Acc_14_3 + Ext_Mem_Acc_14_4 + Ext_Mem_Acc_14_5 + Ext_Mem_Acc_14_6 + Ext_Mem_Acc_14_7 + Ext_Mem_Acc_14_8 + Ext_Mem_Acc_14_9 + Ext_Mem_Acc_14_10 + -1'Ext_Mem_Acc_13_11 + -1'Ext_Mem_Acc_16_11 + -1'Ext_Mem_Acc_15_11 + -1'Ext_Mem_Acc_9_11 + -1'Ext_Mem_Acc_8_11 + -1'Ext_Mem_Acc_12_11 + -1'Ext_Mem_Acc_10_11 + -1'Ext_Mem_Acc_5_11 + -1'Ext_Mem_Acc_4_11 + -1'Ext_Mem_Acc_7_11 + -1'Ext_Mem_Acc_6_11 + -1'Ext_Mem_Acc_1_11 + -1'Ext_Mem_Acc_3_11 + -1'Ext_Mem_Acc_2_11 + -1'Ext_Mem_Acc_17_11 + -1'Ext_Mem_Acc_18_11 + -1'Ext_Mem_Acc_19_11 + -1'Ext_Mem_Acc_20_11 + Ext_Mem_Acc_14_12 + Ext_Mem_Acc_14_13 + Ext_Mem_Acc_14_15 + Ext_Mem_Acc_14_16 + Ext_Mem_Acc_14_18 + Ext_Mem_Acc_14_17 + Ext_Mem_Acc_14_20 + Ext_Mem_Acc_14_19 + -1'Memory_11 + Queue_14 + Active_14 + OwnMemAcc_14 = 0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 12895 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 81 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(X(<>([]([]((LTLAP0==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2249 ms.
FORMULA SharedMemory-PT-000020-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []((LTLAP1==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 17254 ms.
FORMULA SharedMemory-PT-000020-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>((LTLAP2==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4695 ms.
FORMULA SharedMemory-PT-000020-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(<>(<>(X((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 263 ms.
FORMULA SharedMemory-PT-000020-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (<>([]([]((LTLAP2==true)))))U([](<>(<>((LTLAP3==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 7154 ms.
FORMULA SharedMemory-PT-000020-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ((LTLAP1==true))U(<>(((LTLAP3==true))U((LTLAP1==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 5324 ms.
FORMULA SharedMemory-PT-000020-LTLFireability-05 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, true, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 10329 ms.
FORMULA SharedMemory-PT-000020-LTLFireability-06 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X(X(((LTLAP4==true))U((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X(X(((LTLAP4==true))U((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(X((<>((LTLAP5==true)))U(X((LTLAP6==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 621 ms.
FORMULA SharedMemory-PT-000020-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []((LTLAP7==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 10610 ms.
FORMULA SharedMemory-PT-000020-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (<>([](<>((LTLAP8==true)))))U(<>(((LTLAP9==true))U((LTLAP10==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 10816 ms.
FORMULA SharedMemory-PT-000020-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []((<>([]((LTLAP11==true))))U((LTLAP12==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 11331 ms.
FORMULA SharedMemory-PT-000020-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 10546 ms.
FORMULA SharedMemory-PT-000020-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(X((LTLAP13==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3695 ms.
FORMULA SharedMemory-PT-000020-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>((LTLAP14==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 10629 ms.
FORMULA SharedMemory-PT-000020-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((LTLAP15==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1427 ms.
FORMULA SharedMemory-PT-000020-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X(X(((LTLAP4==true))U((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X(X(((LTLAP4==true))U((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
Detected timeout of ITS tools.
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 1 LTL properties
Checking formula 0 : !((G(X(X(("((((((((((((((((((((Active_6>=1)||(Active_5>=1))||(Active_8>=1))||(Active_7>=1))||(Active_2>=1))||(Active_1>=1))||(Active_4>=1))||(Active_3>=1))||(Active_13>=1))||(Active_14>=1))||(Active_15>=1))||(Active_16>=1))||(Active_9>=1))||(Active_10>=1))||(Active_11>=1))||(Active_12>=1))||(Active_17>=1))||(Active_18>=1))||(Active_19>=1))||(Active_20>=1))")U("((((((((((((((((((((Active_6>=1)||(Active_5>=1))||(Active_8>=1))||(Active_7>=1))||(Active_2>=1))||(Active_1>=1))||(Active_4>=1))||(Active_3>=1))||(Active_13>=1))||(Active_14>=1))||(Active_15>=1))||(Active_16>=1))||(Active_9>=1))||(Active_10>=1))||(Active_11>=1))||(Active_12>=1))||(Active_17>=1))||(Active_18>=1))||(Active_19>=1))||(Active_20>=1))"))))))
Formula 0 simplified : !GXX"((((((((((((((((((((Active_6>=1)||(Active_5>=1))||(Active_8>=1))||(Active_7>=1))||(Active_2>=1))||(Active_1>=1))||(Active_4>=1))||(Active_3>=1))||(Active_13>=1))||(Active_14>=1))||(Active_15>=1))||(Active_16>=1))||(Active_9>=1))||(Active_10>=1))||(Active_11>=1))||(Active_12>=1))||(Active_17>=1))||(Active_18>=1))||(Active_19>=1))||(Active_20>=1))"
Detected timeout of ITS tools.
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201903251645/bin/convert-linux64, -i, /tmp/graph7765337923217741632.txt, -o, /tmp/graph7765337923217741632.bin, -w, /tmp/graph7765337923217741632.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201903251645/bin/louvain-linux64, /tmp/graph7765337923217741632.bin, -l, -1, -v, -w, /tmp/graph7765337923217741632.weights, -q, 0, -e, 0.001], workingDir=null]
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 1 LTL properties
Checking formula 0 : !((G(X(X(("((((((((((((((((((((u39.Active_6>=1)||(u2.Active_5>=1))||(u1.Active_8>=1))||(u0.Active_7>=1))||(u27.Active_2>=1))||(u10.Active_1>=1))||(u29.Active_4>=1))||(u28.Active_3>=1))||(u37.Active_13>=1))||(u36.Active_14>=1))||(u35.Active_15>=1))||(u30.Active_16>=1))||(u38.Active_9>=1))||(u5.Active_10>=1))||(u3.Active_11>=1))||(u4.Active_12>=1))||(u34.Active_17>=1))||(u33.Active_18>=1))||(u32.Active_19>=1))||(u31.Active_20>=1))")U("((((((((((((((((((((u39.Active_6>=1)||(u2.Active_5>=1))||(u1.Active_8>=1))||(u0.Active_7>=1))||(u27.Active_2>=1))||(u10.Active_1>=1))||(u29.Active_4>=1))||(u28.Active_3>=1))||(u37.Active_13>=1))||(u36.Active_14>=1))||(u35.Active_15>=1))||(u30.Active_16>=1))||(u38.Active_9>=1))||(u5.Active_10>=1))||(u3.Active_11>=1))||(u4.Active_12>=1))||(u34.Active_17>=1))||(u33.Active_18>=1))||(u32.Active_19>=1))||(u31.Active_20>=1))"))))))
Formula 0 simplified : !GXX"((((((((((((((((((((u39.Active_6>=1)||(u2.Active_5>=1))||(u1.Active_8>=1))||(u0.Active_7>=1))||(u27.Active_2>=1))||(u10.Active_1>=1))||(u29.Active_4>=1))||(u28.Active_3>=1))||(u37.Active_13>=1))||(u36.Active_14>=1))||(u35.Active_15>=1))||(u30.Active_16>=1))||(u38.Active_9>=1))||(u5.Active_10>=1))||(u3.Active_11>=1))||(u4.Active_12>=1))||(u34.Active_17>=1))||(u33.Active_18>=1))||(u32.Active_19>=1))||(u31.Active_20>=1))"
built 360 ordering constraints for composite.
built 91 ordering constraints for composite.
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
5 unique states visited
5 strongly connected components in search stack
5 transitions explored
5 items max in DFS search stack
745 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,7.56702,262452,1,0,427422,4830,10005,258693,754,15800,2840105
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA SharedMemory-PT-000020-LTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN

BK_STOP 1553802079878

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 28, 2019 7:01:07 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt]
Mar 28, 2019 7:01:07 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 28, 2019 7:01:07 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 185 ms
Mar 28, 2019 7:01:07 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 461 places.
Mar 28, 2019 7:01:07 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 820 transitions.
Mar 28, 2019 7:01:07 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 40 ms
Mar 28, 2019 7:01:08 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 223 ms
Mar 28, 2019 7:01:08 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 119 ms
Mar 28, 2019 7:01:08 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 820 transitions.
Mar 28, 2019 7:01:08 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 820 transitions.
Mar 28, 2019 7:01:08 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 461 places.
Mar 28, 2019 7:01:08 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 820 transitions.
Mar 28, 2019 7:01:08 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 10 ms
Mar 28, 2019 7:01:08 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 11 ms
Mar 28, 2019 7:01:09 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 41 place invariants in 260 ms
Mar 28, 2019 7:01:10 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:116)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.init(NecessaryEnablingsolver.java:71)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:471)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Mar 28, 2019 7:01:10 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 2448ms conformant to PINS in folder :/home/mcc/execution
pins2lts-mc, 0.000: Registering PINS so language module
pins2lts-mc( 6/ 8), 0.000: library has no initializer
pins2lts-mc( 6/ 8), 0.000: loading model GAL
pins2lts-mc( 6/ 8), 0.002: completed loading model GAL
pins2lts-mc( 6/ 8), 0.002: LTL layer: formula: [](X(X(((LTLAP4==true))U((LTLAP4==true)))))
pins2lts-mc( 6/ 8), 0.002: "[](X(X(((LTLAP4==true))U((LTLAP4==true)))))" is not a file, parsing as formula...
pins2lts-mc( 6/ 8), 0.002: Using Spin LTL semantics
pins2lts-mc( 2/ 8), 0.004: library has no initializer
pins2lts-mc( 2/ 8), 0.004: loading model GAL
pins2lts-mc( 5/ 8), 0.004: library has no initializer
pins2lts-mc( 5/ 8), 0.004: loading model GAL
pins2lts-mc( 0/ 8), 0.004: Loading model from ./gal.so
pins2lts-mc( 0/ 8), 0.004: library has no initializer
pins2lts-mc( 0/ 8), 0.004: loading model GAL
pins2lts-mc( 7/ 8), 0.004: library has no initializer
pins2lts-mc( 7/ 8), 0.004: loading model GAL
pins2lts-mc( 4/ 8), 0.004: library has no initializer
pins2lts-mc( 4/ 8), 0.005: loading model GAL
pins2lts-mc( 3/ 8), 0.004: library has no initializer
pins2lts-mc( 3/ 8), 0.005: loading model GAL
pins2lts-mc( 1/ 8), 0.005: library has no initializer
pins2lts-mc( 1/ 8), 0.007: loading model GAL
pins2lts-mc( 5/ 8), 0.009: completed loading model GAL
pins2lts-mc( 0/ 8), 0.009: completed loading model GAL
pins2lts-mc( 7/ 8), 0.010: completed loading model GAL
pins2lts-mc( 3/ 8), 0.010: completed loading model GAL
pins2lts-mc( 2/ 8), 0.010: completed loading model GAL
pins2lts-mc( 4/ 8), 0.011: completed loading model GAL
pins2lts-mc( 1/ 8), 0.019: completed loading model GAL
pins2lts-mc( 0/ 8), 0.024: Weak Buchi automaton detected, adding non-accepting as progress label.
pins2lts-mc( 0/ 8), 0.937: DFS-FIFO for weak LTL, using special progress label 837
pins2lts-mc( 0/ 8), 0.937: There are 838 state labels and 1 edge labels
pins2lts-mc( 0/ 8), 0.937: State length is 462, there are 825 groups
pins2lts-mc( 0/ 8), 0.937: Running dfsfifo using 8 cores
pins2lts-mc( 0/ 8), 0.937: Using a tree table with 2^27 elements
pins2lts-mc( 0/ 8), 0.937: Successor permutation: rr
pins2lts-mc( 0/ 8), 0.937: Global bits: 2, count bits: 0, local bits: 0
pins2lts-mc( 1/ 8), 3.019: ~1 levels ~960 states ~50088 transitions
pins2lts-mc( 4/ 8), 3.332: ~1 levels ~1920 states ~98504 transitions
pins2lts-mc( 6/ 8), 4.031: ~1 levels ~3840 states ~188912 transitions
pins2lts-mc( 4/ 8), 6.343: ~1 levels ~7680 states ~329568 transitions
pins2lts-mc( 4/ 8), 11.596: ~1 levels ~15360 states ~659280 transitions
pins2lts-mc( 4/ 8), 18.671: ~1 levels ~30720 states ~1357392 transitions
pins2lts-mc( 0/ 8), 30.393: ~1 levels ~61440 states ~2671640 transitions
pins2lts-mc( 6/ 8), 47.309: ~1 levels ~122880 states ~5228032 transitions
pins2lts-mc( 0/ 8), 67.125: ~1 levels ~245760 states ~11262624 transitions
pins2lts-mc( 0/ 8), 102.381: ~1 levels ~491520 states ~21465312 transitions
pins2lts-mc( 6/ 8), 177.355: ~1 levels ~983040 states ~39705176 transitions
pins2lts-mc( 4/ 8), 328.868: ~1 levels ~1966080 states ~75727640 transitions
pins2lts-mc( 7/ 8), 458.611: Error: tree leafs table full! Change -s/--ratio.
pins2lts-mc( 0/ 8), 459.118:
pins2lts-mc( 0/ 8), 459.118: mean standard work distribution: 4.5% (states) 1.9% (transitions)
pins2lts-mc( 0/ 8), 459.118:
pins2lts-mc( 0/ 8), 459.118: Explored 2578391 states 107894618 transitions, fanout: 41.846
pins2lts-mc( 0/ 8), 459.118: Total exploration time 458.140 sec (457.670 sec minimum, 457.900 sec on average)
pins2lts-mc( 0/ 8), 459.118: States per second: 5628, Transitions per second: 235506
pins2lts-mc( 0/ 8), 459.118:
pins2lts-mc( 0/ 8), 459.118: Progress states detected: 25124334
pins2lts-mc( 0/ 8), 459.118: Redundant explorations: -89.7376
pins2lts-mc( 0/ 8), 459.118:
pins2lts-mc( 0/ 8), 459.118: Queue width: 8B, total height: 25988592, memory: 198.28MB
pins2lts-mc( 0/ 8), 459.118: Tree memory: 447.7MB, 18.7 B/state, compr.: 1.0%
pins2lts-mc( 0/ 8), 459.118: Tree fill ratio (roots/leafs): 18.0%/99.0%
pins2lts-mc( 0/ 8), 459.118: Stored 827 string chucks using 0MB
pins2lts-mc( 0/ 8), 459.118: Total memory used for chunk indexing: 0MB
pins2lts-mc( 0/ 8), 459.118: Est. total memory use: 646.0MB (~1222.3MB paged-in)
java.lang.RuntimeException: Unexpected exception when executing ltsmin :CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X(X(((LTLAP4==true))U((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
255
at fr.lip6.move.gal.application.LTSminRunner.checkProperty(LTSminRunner.java:168)
at fr.lip6.move.gal.application.LTSminRunner.access$9(LTSminRunner.java:122)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:98)
at java.lang.Thread.run(Thread.java:748)
Mar 28, 2019 7:21:09 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 107 ms
Mar 28, 2019 7:21:09 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 7 ms
Mar 28, 2019 7:21:09 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 0 ms
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 75 ms
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 74 ms
Begin: Thu Mar 28 19:41:10 2019

Computation of communities with the Newman-Girvan Modularity quality function

level 0:
start computation: Thu Mar 28 19:41:10 2019
network size: 461 nodes, 3160 links, 1640 weight
quality increased from -0.0267801 to 0.333882
end computation: Thu Mar 28 19:41:10 2019
level 1:
start computation: Thu Mar 28 19:41:10 2019
network size: 40 nodes, 878 links, 1640 weight
quality increased from 0.333882 to 0.334923
end computation: Thu Mar 28 19:41:10 2019
level 2:
start computation: Thu Mar 28 19:41:10 2019
network size: 38 nodes, 792 links, 1640 weight
quality increased from 0.334923 to 0.334923
end computation: Thu Mar 28 19:41:10 2019
End: Thu Mar 28 19:41:10 2019
Total duration: 0 sec
0.334923
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 14 events :Begin_Ext_Acc_10_5,Begin_Ext_Acc_10_5,Begin_Ext_Acc_10_5,Begin_Ext_Acc_10_5,Begin_Ext_Acc_10_5,Begin_Ext_Acc_10_5,Begin_Ext_Acc_10_5,End_Ext_Acc_10_5,End_Ext_Acc_10_5,End_Ext_Acc_10_5,End_Ext_Acc_10_5,End_Ext_Acc_10_5,End_Ext_Acc_10_5,End_Ext_Acc_10_5,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 14 events :Begin_Ext_Acc_5_3,Begin_Ext_Acc_5_3,Begin_Ext_Acc_5_3,Begin_Ext_Acc_5_3,Begin_Ext_Acc_5_3,Begin_Ext_Acc_5_3,Begin_Ext_Acc_5_3,End_Ext_Acc_8_3,End_Ext_Acc_8_3,End_Ext_Acc_8_3,End_Ext_Acc_8_3,End_Ext_Acc_8_3,End_Ext_Acc_8_3,End_Ext_Acc_8_3,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 20 events :Begin_Ext_Acc_14_2,Begin_Ext_Acc_14_2,Begin_Ext_Acc_14_2,Begin_Ext_Acc_14_2,Begin_Ext_Acc_14_2,Begin_Ext_Acc_14_2,Begin_Ext_Acc_14_2,Begin_Ext_Acc_14_2,Begin_Ext_Acc_14_2,Begin_Ext_Acc_14_2,End_Ext_Acc_14_1,End_Ext_Acc_14_1,End_Ext_Acc_14_1,End_Ext_Acc_14_1,End_Ext_Acc_14_1,End_Ext_Acc_14_1,End_Ext_Acc_14_1,End_Ext_Acc_14_1,End_Ext_Acc_14_1,End_Ext_Acc_14_1,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 20 events :Begin_Ext_Acc_15_2,Begin_Ext_Acc_15_2,Begin_Ext_Acc_15_2,Begin_Ext_Acc_15_2,Begin_Ext_Acc_15_2,Begin_Ext_Acc_15_2,Begin_Ext_Acc_15_2,Begin_Ext_Acc_15_2,Begin_Ext_Acc_15_2,Begin_Ext_Acc_15_2,End_Ext_Acc_15_2,End_Ext_Acc_15_2,End_Ext_Acc_15_2,End_Ext_Acc_15_2,End_Ext_Acc_15_2,End_Ext_Acc_15_2,End_Ext_Acc_15_2,End_Ext_Acc_15_2,End_Ext_Acc_15_2,End_Ext_Acc_15_2,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 20 events :Begin_Ext_Acc_17_2,Begin_Ext_Acc_17_2,Begin_Ext_Acc_17_2,Begin_Ext_Acc_17_2,Begin_Ext_Acc_17_2,Begin_Ext_Acc_17_2,Begin_Ext_Acc_17_2,Begin_Ext_Acc_17_2,Begin_Ext_Acc_17_2,Begin_Ext_Acc_17_2,End_Ext_Acc_17_2,End_Ext_Acc_17_2,End_Ext_Acc_17_2,End_Ext_Acc_17_2,End_Ext_Acc_17_2,End_Ext_Acc_17_2,End_Ext_Acc_17_2,End_Ext_Acc_17_2,End_Ext_Acc_17_2,End_Ext_Acc_17_2,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 16 events :Begin_Ext_Acc_18_13,Begin_Ext_Acc_18_13,Begin_Ext_Acc_18_13,Begin_Ext_Acc_18_13,Begin_Ext_Acc_18_13,Begin_Ext_Acc_18_13,Begin_Ext_Acc_18_13,Begin_Ext_Acc_18_13,End_Ext_Acc_11_13,End_Ext_Acc_11_13,End_Ext_Acc_11_13,End_Ext_Acc_11_13,End_Ext_Acc_11_13,End_Ext_Acc_11_13,End_Ext_Acc_11_13,End_Ext_Acc_11_13,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 14 events :Begin_Ext_Acc_10_14,Begin_Ext_Acc_10_14,Begin_Ext_Acc_10_14,Begin_Ext_Acc_10_14,Begin_Ext_Acc_10_14,Begin_Ext_Acc_10_14,Begin_Ext_Acc_10_14,End_Ext_Acc_4_14,End_Ext_Acc_4_14,End_Ext_Acc_4_14,End_Ext_Acc_4_14,End_Ext_Acc_4_14,End_Ext_Acc_4_14,End_Ext_Acc_4_14,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 20 events :Begin_Ext_Acc_8_2,Begin_Ext_Acc_8_2,Begin_Ext_Acc_8_2,Begin_Ext_Acc_8_2,Begin_Ext_Acc_8_2,Begin_Ext_Acc_8_2,Begin_Ext_Acc_8_2,Begin_Ext_Acc_8_2,Begin_Ext_Acc_8_2,Begin_Ext_Acc_8_2,End_Ext_Acc_8_1,End_Ext_Acc_8_1,End_Ext_Acc_8_1,End_Ext_Acc_8_1,End_Ext_Acc_8_1,End_Ext_Acc_8_1,End_Ext_Acc_8_1,End_Ext_Acc_8_1,End_Ext_Acc_8_1,End_Ext_Acc_8_1,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 20 events :Begin_Ext_Acc_4_3,Begin_Ext_Acc_4_3,Begin_Ext_Acc_4_3,Begin_Ext_Acc_4_3,Begin_Ext_Acc_4_3,Begin_Ext_Acc_4_3,Begin_Ext_Acc_4_3,Begin_Ext_Acc_4_3,Begin_Ext_Acc_4_3,Begin_Ext_Acc_4_3,End_Ext_Acc_4_1,End_Ext_Acc_4_1,End_Ext_Acc_4_1,End_Ext_Acc_4_1,End_Ext_Acc_4_1,End_Ext_Acc_4_1,End_Ext_Acc_4_1,End_Ext_Acc_4_1,End_Ext_Acc_4_1,End_Ext_Acc_4_1,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 20 events :Begin_Ext_Acc_11_2,Begin_Ext_Acc_11_2,Begin_Ext_Acc_11_2,Begin_Ext_Acc_11_2,Begin_Ext_Acc_11_2,Begin_Ext_Acc_11_2,Begin_Ext_Acc_11_2,Begin_Ext_Acc_11_2,Begin_Ext_Acc_11_2,Begin_Ext_Acc_11_2,End_Ext_Acc_11_2,End_Ext_Acc_11_2,End_Ext_Acc_11_2,End_Ext_Acc_11_2,End_Ext_Acc_11_2,End_Ext_Acc_11_2,End_Ext_Acc_11_2,End_Ext_Acc_11_2,End_Ext_Acc_11_2,End_Ext_Acc_11_2,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 20 events :Begin_Ext_Acc_6_3,Begin_Ext_Acc_6_3,Begin_Ext_Acc_6_3,Begin_Ext_Acc_6_3,Begin_Ext_Acc_6_3,Begin_Ext_Acc_6_3,Begin_Ext_Acc_6_3,Begin_Ext_Acc_6_3,Begin_Ext_Acc_6_3,Begin_Ext_Acc_6_3,End_Ext_Acc_6_1,End_Ext_Acc_6_1,End_Ext_Acc_6_1,End_Ext_Acc_6_1,End_Ext_Acc_6_1,End_Ext_Acc_6_1,End_Ext_Acc_6_1,End_Ext_Acc_6_1,End_Ext_Acc_6_1,End_Ext_Acc_6_1,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 20 events :Begin_Ext_Acc_19_5,Begin_Ext_Acc_19_5,Begin_Ext_Acc_19_5,Begin_Ext_Acc_19_5,Begin_Ext_Acc_19_5,Begin_Ext_Acc_19_5,Begin_Ext_Acc_19_5,Begin_Ext_Acc_19_5,Begin_Ext_Acc_19_5,Begin_Ext_Acc_19_5,End_Ext_Acc_19_5,End_Ext_Acc_19_5,End_Ext_Acc_19_5,End_Ext_Acc_19_5,End_Ext_Acc_19_5,End_Ext_Acc_19_5,End_Ext_Acc_19_5,End_Ext_Acc_19_5,End_Ext_Acc_19_5,End_Ext_Acc_19_5,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 16 events :Begin_Ext_Acc_19_6,Begin_Ext_Acc_19_6,Begin_Ext_Acc_19_6,Begin_Ext_Acc_19_6,Begin_Ext_Acc_19_6,Begin_Ext_Acc_19_6,Begin_Ext_Acc_19_6,Begin_Ext_Acc_19_6,End_Ext_Acc_8_6,End_Ext_Acc_8_6,End_Ext_Acc_8_6,End_Ext_Acc_8_6,End_Ext_Acc_8_6,End_Ext_Acc_8_6,End_Ext_Acc_8_6,End_Ext_Acc_8_6,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 14 events :Begin_Ext_Acc_2_19,Begin_Ext_Acc_2_19,Begin_Ext_Acc_2_19,Begin_Ext_Acc_2_19,Begin_Ext_Acc_2_19,Begin_Ext_Acc_2_19,Begin_Ext_Acc_2_19,End_Ext_Acc_15_19,End_Ext_Acc_15_19,End_Ext_Acc_15_19,End_Ext_Acc_15_19,End_Ext_Acc_15_19,End_Ext_Acc_15_19,End_Ext_Acc_15_19,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 16 events :Begin_Ext_Acc_18_8,Begin_Ext_Acc_18_8,Begin_Ext_Acc_18_8,Begin_Ext_Acc_18_8,Begin_Ext_Acc_18_8,Begin_Ext_Acc_18_8,Begin_Ext_Acc_18_8,Begin_Ext_Acc_18_8,End_Ext_Acc_16_8,End_Ext_Acc_16_8,End_Ext_Acc_16_8,End_Ext_Acc_16_8,End_Ext_Acc_16_8,End_Ext_Acc_16_8,End_Ext_Acc_16_8,End_Ext_Acc_16_8,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 16 events :Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,End_Ext_Acc_19_2,End_Ext_Acc_19_2,End_Ext_Acc_19_2,End_Ext_Acc_19_2,End_Ext_Acc_19_2,End_Ext_Acc_19_2,End_Ext_Acc_19_2,End_Ext_Acc_19_2,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 14 events :Begin_Ext_Acc_17_4,Begin_Ext_Acc_17_4,Begin_Ext_Acc_17_4,Begin_Ext_Acc_17_4,Begin_Ext_Acc_17_4,Begin_Ext_Acc_17_4,Begin_Ext_Acc_17_4,End_Ext_Acc_7_4,End_Ext_Acc_7_4,End_Ext_Acc_7_4,End_Ext_Acc_7_4,End_Ext_Acc_7_4,End_Ext_Acc_7_4,End_Ext_Acc_7_4,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 20 events :Begin_Ext_Acc_20_1,Begin_Ext_Acc_20_1,Begin_Ext_Acc_20_1,Begin_Ext_Acc_20_1,Begin_Ext_Acc_20_1,Begin_Ext_Acc_20_1,Begin_Ext_Acc_20_1,Begin_Ext_Acc_20_1,Begin_Ext_Acc_20_1,Begin_Ext_Acc_20_1,End_Ext_Acc_20_1,End_Ext_Acc_20_1,End_Ext_Acc_20_1,End_Ext_Acc_20_1,End_Ext_Acc_20_1,End_Ext_Acc_20_1,End_Ext_Acc_20_1,End_Ext_Acc_20_1,End_Ext_Acc_20_1,End_Ext_Acc_20_1,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 14 events :Begin_Ext_Acc_2_12,Begin_Ext_Acc_2_12,Begin_Ext_Acc_2_12,Begin_Ext_Acc_2_12,Begin_Ext_Acc_2_12,Begin_Ext_Acc_2_12,Begin_Ext_Acc_2_12,End_Ext_Acc_13_12,End_Ext_Acc_13_12,End_Ext_Acc_13_12,End_Ext_Acc_13_12,End_Ext_Acc_13_12,End_Ext_Acc_13_12,End_Ext_Acc_13_12,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 20 events :Begin_Ext_Acc_10_2,Begin_Ext_Acc_10_2,Begin_Ext_Acc_10_2,Begin_Ext_Acc_10_2,Begin_Ext_Acc_10_2,Begin_Ext_Acc_10_2,Begin_Ext_Acc_10_2,Begin_Ext_Acc_10_2,Begin_Ext_Acc_10_2,End_Ext_Acc_10_1,Begin_Ext_Acc_10_2,End_Ext_Acc_10_1,End_Ext_Acc_10_1,End_Ext_Acc_10_1,End_Ext_Acc_10_1,End_Ext_Acc_10_1,End_Ext_Acc_10_1,End_Ext_Acc_10_1,End_Ext_Acc_10_1,End_Ext_Acc_10_1,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 20 events :Begin_Ext_Acc_18_2,Begin_Ext_Acc_18_2,Begin_Ext_Acc_18_2,Begin_Ext_Acc_18_2,Begin_Ext_Acc_18_2,Begin_Ext_Acc_18_2,Begin_Ext_Acc_18_2,Begin_Ext_Acc_18_2,Begin_Ext_Acc_18_2,Begin_Ext_Acc_18_2,End_Ext_Acc_18_2,End_Ext_Acc_18_2,End_Ext_Acc_18_2,End_Ext_Acc_18_2,End_Ext_Acc_18_2,End_Ext_Acc_18_2,End_Ext_Acc_18_2,End_Ext_Acc_18_2,End_Ext_Acc_18_2,End_Ext_Acc_18_2,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 720 events :Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Begin_Ext_Acc_20_2,Be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Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 14 events :Begin_Ext_Acc_7_15,Begin_Ext_Acc_7_15,Begin_Ext_Acc_7_15,Begin_Ext_Acc_7_15,Begin_Ext_Acc_7_15,Begin_Ext_Acc_7_15,Begin_Ext_Acc_7_15,End_Ext_Acc_19_15,End_Ext_Acc_19_15,End_Ext_Acc_19_15,End_Ext_Acc_19_15,End_Ext_Acc_19_15,End_Ext_Acc_19_15,End_Ext_Acc_19_15,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 14 events :Begin_Ext_Acc_20_7,Begin_Ext_Acc_20_7,Begin_Ext_Acc_20_7,Begin_Ext_Acc_20_7,Begin_Ext_Acc_20_7,Begin_Ext_Acc_20_7,Begin_Ext_Acc_20_7,End_Ext_Acc_4_7,End_Ext_Acc_4_7,End_Ext_Acc_4_7,End_Ext_Acc_4_7,End_Ext_Acc_4_7,End_Ext_Acc_4_7,End_Ext_Acc_4_7,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 16 events :Begin_Ext_Acc_6_16,Begin_Ext_Acc_6_16,Begin_Ext_Acc_6_16,Begin_Ext_Acc_6_16,Begin_Ext_Acc_6_16,Begin_Ext_Acc_6_16,Begin_Ext_Acc_6_16,Begin_Ext_Acc_6_16,End_Ext_Acc_3_16,End_Ext_Acc_3_16,End_Ext_Acc_3_16,End_Ext_Acc_3_16,End_Ext_Acc_3_16,End_Ext_Acc_3_16,End_Ext_Acc_3_16,End_Ext_Acc_3_16,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 20 events :Begin_Ext_Acc_9_3,Begin_Ext_Acc_9_3,Begin_Ext_Acc_9_3,Begin_Ext_Acc_9_3,Begin_Ext_Acc_9_3,Begin_Ext_Acc_9_3,Begin_Ext_Acc_9_3,Begin_Ext_Acc_9_3,Begin_Ext_Acc_9_3,Begin_Ext_Acc_9_3,End_Ext_Acc_9_3,End_Ext_Acc_9_3,End_Ext_Acc_9_3,End_Ext_Acc_9_3,End_Ext_Acc_9_3,End_Ext_Acc_9_3,End_Ext_Acc_9_3,End_Ext_Acc_9_3,End_Ext_Acc_9_3,End_Ext_Acc_9_3,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 20 events :Begin_Ext_Acc_1_3,Begin_Ext_Acc_1_3,Begin_Ext_Acc_1_3,Begin_Ext_Acc_1_3,Begin_Ext_Acc_1_3,Begin_Ext_Acc_1_3,Begin_Ext_Acc_1_3,Begin_Ext_Acc_1_3,Begin_Ext_Acc_1_3,Begin_Ext_Acc_1_3,End_Ext_Acc_1_3,End_Ext_Acc_1_3,End_Ext_Acc_1_3,End_Ext_Acc_1_3,End_Ext_Acc_1_3,End_Ext_Acc_1_3,End_Ext_Acc_1_3,End_Ext_Acc_1_3,End_Ext_Acc_1_3,End_Ext_Acc_1_3,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 20 events :Begin_Ext_Acc_7_3,Begin_Ext_Acc_7_3,Begin_Ext_Acc_7_3,Begin_Ext_Acc_7_3,Begin_Ext_Acc_7_3,Begin_Ext_Acc_7_3,Begin_Ext_Acc_7_3,Begin_Ext_Acc_7_3,Begin_Ext_Acc_7_3,Begin_Ext_Acc_7_3,End_Ext_Acc_7_1,End_Ext_Acc_7_1,End_Ext_Acc_7_1,End_Ext_Acc_7_1,End_Ext_Acc_7_1,End_Ext_Acc_7_1,End_Ext_Acc_7_1,End_Ext_Acc_7_1,End_Ext_Acc_7_1,End_Ext_Acc_7_1,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 20 events :Begin_Ext_Acc_12_3,Begin_Ext_Acc_12_3,Begin_Ext_Acc_12_3,Begin_Ext_Acc_12_3,Begin_Ext_Acc_12_3,Begin_Ext_Acc_12_3,Begin_Ext_Acc_12_3,Begin_Ext_Acc_12_3,Begin_Ext_Acc_12_3,End_Ext_Acc_12_1,Begin_Ext_Acc_12_3,End_Ext_Acc_12_1,End_Ext_Acc_12_1,End_Ext_Acc_12_1,End_Ext_Acc_12_1,End_Ext_Acc_12_1,End_Ext_Acc_12_1,End_Ext_Acc_12_1,End_Ext_Acc_12_1,End_Ext_Acc_12_1,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 20 events :Begin_Ext_Acc_13_1,Begin_Ext_Acc_13_1,Begin_Ext_Acc_13_1,Begin_Ext_Acc_13_1,Begin_Ext_Acc_13_1,Begin_Ext_Acc_13_1,Begin_Ext_Acc_13_1,Begin_Ext_Acc_13_1,Begin_Ext_Acc_13_1,Begin_Ext_Acc_13_1,End_Ext_Acc_13_1,End_Ext_Acc_13_1,End_Ext_Acc_13_1,End_Ext_Acc_13_1,End_Ext_Acc_13_1,End_Ext_Acc_13_1,End_Ext_Acc_13_1,End_Ext_Acc_13_1,End_Ext_Acc_13_1,End_Ext_Acc_13_1,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 16 events :Begin_Ext_Acc_9_1,Begin_Ext_Acc_9_1,Begin_Ext_Acc_9_1,Begin_Ext_Acc_9_1,Begin_Ext_Acc_9_1,Begin_Ext_Acc_9_1,Begin_Ext_Acc_9_1,Begin_Ext_Acc_9_1,End_Ext_Acc_17_1,End_Ext_Acc_17_1,End_Ext_Acc_17_1,End_Ext_Acc_17_1,End_Ext_Acc_17_1,End_Ext_Acc_17_1,End_Ext_Acc_17_1,End_Ext_Acc_17_1,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 20 events :Begin_Ext_Acc_16_2,Begin_Ext_Acc_16_2,Begin_Ext_Acc_16_2,Begin_Ext_Acc_16_2,Begin_Ext_Acc_16_2,Begin_Ext_Acc_16_2,Begin_Ext_Acc_16_2,Begin_Ext_Acc_16_2,Begin_Ext_Acc_16_2,End_Ext_Acc_16_1,Begin_Ext_Acc_16_2,End_Ext_Acc_16_1,End_Ext_Acc_16_1,End_Ext_Acc_16_1,End_Ext_Acc_16_1,End_Ext_Acc_16_1,End_Ext_Acc_16_1,End_Ext_Acc_16_1,End_Ext_Acc_16_1,End_Ext_Acc_16_1,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 14 events :Begin_Ext_Acc_13_20,Begin_Ext_Acc_13_20,Begin_Ext_Acc_13_20,Begin_Ext_Acc_13_20,Begin_Ext_Acc_13_20,Begin_Ext_Acc_13_20,Begin_Ext_Acc_13_20,End_Ext_Acc_7_20,End_Ext_Acc_7_20,End_Ext_Acc_7_20,End_Ext_Acc_7_20,End_Ext_Acc_7_20,End_Ext_Acc_7_20,End_Ext_Acc_7_20,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 16 events :Begin_Ext_Acc_1_18,Begin_Ext_Acc_1_18,Begin_Ext_Acc_1_18,Begin_Ext_Acc_1_18,Begin_Ext_Acc_1_18,Begin_Ext_Acc_1_18,Begin_Ext_Acc_1_18,Begin_Ext_Acc_1_18,End_Ext_Acc_14_18,End_Ext_Acc_14_18,End_Ext_Acc_14_18,End_Ext_Acc_14_18,End_Ext_Acc_14_18,End_Ext_Acc_14_18,End_Ext_Acc_14_18,End_Ext_Acc_14_18,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 20 events :Begin_Ext_Acc_2_3,Begin_Ext_Acc_2_3,Begin_Ext_Acc_2_3,Begin_Ext_Acc_2_3,Begin_Ext_Acc_2_3,Begin_Ext_Acc_2_3,Begin_Ext_Acc_2_3,Begin_Ext_Acc_2_3,Begin_Ext_Acc_2_3,Begin_Ext_Acc_2_3,End_Ext_Acc_2_3,End_Ext_Acc_2_3,End_Ext_Acc_2_3,End_Ext_Acc_2_3,End_Ext_Acc_2_3,End_Ext_Acc_2_3,End_Ext_Acc_2_3,End_Ext_Acc_2_3,End_Ext_Acc_2_3,End_Ext_Acc_2_3,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 20 events :Begin_Ext_Acc_3_2,Begin_Ext_Acc_3_2,Begin_Ext_Acc_3_2,Begin_Ext_Acc_3_2,Begin_Ext_Acc_3_2,Begin_Ext_Acc_3_2,Begin_Ext_Acc_3_2,Begin_Ext_Acc_3_2,Begin_Ext_Acc_3_2,Begin_Ext_Acc_3_2,End_Ext_Acc_3_2,End_Ext_Acc_3_2,End_Ext_Acc_3_2,End_Ext_Acc_3_2,End_Ext_Acc_3_2,End_Ext_Acc_3_2,End_Ext_Acc_3_2,End_Ext_Acc_3_2,End_Ext_Acc_3_2,End_Ext_Acc_3_2,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 16 events :Begin_Ext_Acc_14_9,Begin_Ext_Acc_14_9,Begin_Ext_Acc_14_9,Begin_Ext_Acc_14_9,Begin_Ext_Acc_14_9,Begin_Ext_Acc_14_9,Begin_Ext_Acc_14_9,Begin_Ext_Acc_14_9,End_Ext_Acc_1_9,End_Ext_Acc_1_9,End_Ext_Acc_1_9,End_Ext_Acc_1_9,End_Ext_Acc_1_9,End_Ext_Acc_1_9,End_Ext_Acc_1_9,End_Ext_Acc_1_9,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 14 events :Begin_Ext_Acc_2_11,Begin_Ext_Acc_2_11,Begin_Ext_Acc_2_11,Begin_Ext_Acc_2_11,Begin_Ext_Acc_2_11,Begin_Ext_Acc_2_11,Begin_Ext_Acc_2_11,End_Ext_Acc_20_11,End_Ext_Acc_20_11,End_Ext_Acc_20_11,End_Ext_Acc_20_11,End_Ext_Acc_20_11,End_Ext_Acc_20_11,End_Ext_Acc_20_11,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 20 events :Begin_Ext_Acc_5_4,Begin_Ext_Acc_5_4,Begin_Ext_Acc_5_4,Begin_Ext_Acc_5_4,Begin_Ext_Acc_5_4,Begin_Ext_Acc_5_4,Begin_Ext_Acc_5_4,Begin_Ext_Acc_5_4,Begin_Ext_Acc_5_4,Begin_Ext_Acc_5_4,End_Ext_Acc_5_4,End_Ext_Acc_5_4,End_Ext_Acc_5_4,End_Ext_Acc_5_4,End_Ext_Acc_5_4,End_Ext_Acc_5_4,End_Ext_Acc_5_4,End_Ext_Acc_5_4,End_Ext_Acc_5_4,End_Ext_Acc_5_4,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 14 events :Begin_Ext_Acc_6_10,Begin_Ext_Acc_6_10,Begin_Ext_Acc_6_10,Begin_Ext_Acc_6_10,Begin_Ext_Acc_6_10,Begin_Ext_Acc_6_10,Begin_Ext_Acc_6_10,End_Ext_Acc_1_10,End_Ext_Acc_1_10,End_Ext_Acc_1_10,End_Ext_Acc_1_10,End_Ext_Acc_1_10,End_Ext_Acc_1_10,End_Ext_Acc_1_10,
Mar 28, 2019 7:41:10 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 1402 redundant transitions.
Mar 28, 2019 7:41:11 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 622 ms
Mar 28, 2019 7:41:11 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in SharedMemory_PT_000020_flat_flat_flat_mod_flat_sub8 :[i8.u11.End_Ext_Acc_15_12, i8.u12.End_Ext_Acc_15_11]
Mar 28, 2019 7:41:11 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in SharedMemory_PT_000020_flat_flat_flat_mod_flat_sub8 :[i8.u11.Begin_Ext_Acc_10_12, i8.u12.Begin_Ext_Acc_10_11]
Mar 28, 2019 7:41:11 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in SharedMemory_PT_000020_flat_flat_flat_mod_flat_sub8 :[i8.u12.End_Ext_Acc_10_11, i8.u11.End_Ext_Acc_10_12]
Mar 28, 2019 7:41:11 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in SharedMemory_PT_000020_flat_flat_flat_mod_flat_sub8 :[i8.u12.End_Ext_Acc_3_11, i8.u11.End_Ext_Acc_3_12]
Mar 28, 2019 7:41:11 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in SharedMemory_PT_000020_flat_flat_flat_mod_flat_sub8 :[i8.u11.End_Ext_Acc_19_12, i8.u12.End_Ext_Acc_19_11]
Mar 28, 2019 7:41:11 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in SharedMemory_PT_000020_flat_flat_flat_mod_flat_sub8 :[i8.u11.Begin_Ext_Acc_15_12, i8.u12.Begin_Ext_Acc_15_11]
Mar 28, 2019 7:41:11 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in SharedMemory_PT_000020_flat_flat_flat_mod_flat_sub8 :[i8.u12.Begin_Ext_Acc_1_11, i8.u11.Begin_Ext_Acc_1_12]
Mar 28, 2019 7:41:11 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in SharedMemory_PT_000020_flat_flat_flat_mod_flat_sub8 :[i8.u11.Begin_Ext_Acc_19_12, i8.u12.Begin_Ext_Acc_19_11]
Mar 28, 2019 7:41:11 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in SharedMemory_PT_000020_flat_flat_flat_mod_flat_sub8 :[i8.u12.End_Ext_Acc_1_11, i8.u11.End_Ext_Acc_1_12]
Mar 28, 2019 7:41:11 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in SharedMemory_PT_000020_flat_flat_flat_mod_flat_sub8 :[i8.u12.Begin_Ext_Acc_3_11, i8.u11.Begin_Ext_Acc_3_12]
Mar 28, 2019 7:41:11 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in SharedMemory_PT_000020_flat_flat_flat_mod_flat_sub8 :[i8.u11.Begin_Ext_Acc_7_12, i8.u12.Begin_Ext_Acc_7_11]
Mar 28, 2019 7:41:11 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in SharedMemory_PT_000020_flat_flat_flat_mod_flat_sub8 :[i8.u11.End_Ext_Acc_7_12, i8.u12.End_Ext_Acc_7_11]
Mar 28, 2019 7:41:11 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 33 ms
Mar 28, 2019 7:41:11 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SharedMemory-PT-000020"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsm"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstoolsm"
echo " Input is SharedMemory-PT-000020, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r201-csrt-155286433900259"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SharedMemory-PT-000020.tgz
mv SharedMemory-PT-000020 execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;