fond
Model Checking Contest 2019
9th edition, Prague, Czech Republic, April 7, 2019 (TOOLympics)
Execution of r200-ebro-155286406300134
Last Updated
Apr 15, 2019

About the Execution of ITS-Tools.M for ResAllocation-PT-R100C002

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
417.700 7182.00 19493.00 170.10 FTTFFTTTTFFFTFTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2019-input.r200-ebro-155286406300134.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2019-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstoolsm
Input is ResAllocation-PT-R100C002, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r200-ebro-155286406300134
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 568K
-rw-r--r-- 1 mcc users 3.5K Feb 12 14:32 CTLCardinality.txt
-rw-r--r-- 1 mcc users 18K Feb 12 14:32 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 8 16:28 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 8 16:28 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 112 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 350 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.7K Feb 5 01:13 LTLCardinality.txt
-rw-r--r-- 1 mcc users 13K Feb 5 01:13 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Feb 4 22:47 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.5K Feb 4 22:47 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Feb 4 16:39 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K Feb 4 16:39 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 1 13:02 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K Feb 1 13:02 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 4 22:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 4 22:30 UpperBounds.xml

-rw-r--r-- 1 mcc users 6 Jan 29 09:35 equiv_col
-rw-r--r-- 1 mcc users 9 Jan 29 09:35 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:35 iscolored
-rw-r--r-- 1 mcc users 404K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R100C002-ReachabilityCardinality-00
FORMULA_NAME ResAllocation-PT-R100C002-ReachabilityCardinality-01
FORMULA_NAME ResAllocation-PT-R100C002-ReachabilityCardinality-02
FORMULA_NAME ResAllocation-PT-R100C002-ReachabilityCardinality-03
FORMULA_NAME ResAllocation-PT-R100C002-ReachabilityCardinality-04
FORMULA_NAME ResAllocation-PT-R100C002-ReachabilityCardinality-05
FORMULA_NAME ResAllocation-PT-R100C002-ReachabilityCardinality-06
FORMULA_NAME ResAllocation-PT-R100C002-ReachabilityCardinality-07
FORMULA_NAME ResAllocation-PT-R100C002-ReachabilityCardinality-08
FORMULA_NAME ResAllocation-PT-R100C002-ReachabilityCardinality-09
FORMULA_NAME ResAllocation-PT-R100C002-ReachabilityCardinality-10
FORMULA_NAME ResAllocation-PT-R100C002-ReachabilityCardinality-11
FORMULA_NAME ResAllocation-PT-R100C002-ReachabilityCardinality-12
FORMULA_NAME ResAllocation-PT-R100C002-ReachabilityCardinality-13
FORMULA_NAME ResAllocation-PT-R100C002-ReachabilityCardinality-14
FORMULA_NAME ResAllocation-PT-R100C002-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1553671983860

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness, --load-order, /home/mcc/execution/model.ord], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness --load-order /home/mcc/execution/model.ord
Successfully loaded order from file /home/mcc/execution/model.ord
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : ResAllocation-PT-R100C002-ReachabilityCardinality-00 with value :(r_1_21>=2)
Read [invariant] property : ResAllocation-PT-R100C002-ReachabilityCardinality-01 with value :((((r_1_63<=r_0_6)||(p_1_4<=p_0_48))||((r_0_2>=3)&&(r_0_53<=p_0_24)))||(p_0_46<=p_0_99))
Read [reachable] property : ResAllocation-PT-R100C002-ReachabilityCardinality-02 with value :(r_0_21<=p_1_32)
Read [reachable] property : ResAllocation-PT-R100C002-ReachabilityCardinality-03 with value :(!((!(r_1_37>=2))||(r_0_84>=3)))
Read [invariant] property : ResAllocation-PT-R100C002-ReachabilityCardinality-04 with value :((!((p_0_88>=1)&&(r_0_0>=1)))&&((p_0_51<=r_1_61)||((p_1_73>=1)||(r_1_93<=r_1_30))))
Read [invariant] property : ResAllocation-PT-R100C002-ReachabilityCardinality-05 with value :((!(r_1_60>=2))||(p_1_82<=r_0_53))
Read [reachable] property : ResAllocation-PT-R100C002-ReachabilityCardinality-06 with value :((((r_0_94>=2)||(r_0_63<=p_0_92))||((p_0_50<=p_1_61)&&(p_0_8<=r_1_47)))&&(p_0_18>=1))
Read [invariant] property : ResAllocation-PT-R100C002-ReachabilityCardinality-07 with value :(!(p_1_27>=2))
Read [reachable] property : ResAllocation-PT-R100C002-ReachabilityCardinality-08 with value :(p_0_20>=1)
Read [invariant] property : ResAllocation-PT-R100C002-ReachabilityCardinality-09 with value :(p_1_53<=r_1_68)
Read [reachable] property : ResAllocation-PT-R100C002-ReachabilityCardinality-10 with value :((((r_0_27>=3)&&(p_0_85>=2))&&((r_1_6>=2)||(r_1_15>=3)))&&((!(r_0_20>=2))||(r_1_27>=2)))
Read [invariant] property : ResAllocation-PT-R100C002-ReachabilityCardinality-11 with value :((((r_1_92>=3)&&(r_1_21>=3))||((r_1_67>=1)&&(r_1_5<=r_1_2)))||(((p_1_42<=r_0_33)&&(r_1_59<=r_1_96))&&(p_1_43>=2)))
Read [reachable] property : ResAllocation-PT-R100C002-ReachabilityCardinality-12 with value :(p_0_24>=1)
Read [reachable] property : ResAllocation-PT-R100C002-ReachabilityCardinality-13 with value :((((p_1_10>=3)||(p_0_45>=3))&&(!(r_0_75>=2)))||((!(p_0_6<=p_0_79))&&((p_1_66>=1)&&(r_1_9>=3))))
Read [reachable] property : ResAllocation-PT-R100C002-ReachabilityCardinality-14 with value :(!(((r_0_30>=1)&&(p_0_46<=r_1_64))&&(p_0_61<=r_0_84)))
Read [reachable] property : ResAllocation-PT-R100C002-ReachabilityCardinality-15 with value :(r_1_6>=3)
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 202 rows 400 cols
invariant :p_0_19 + r_0_19 + -1'r_1_19 = 0
invariant :p_1_21 + r_1_21 = 1
invariant :p_1_56 + r_1_56 = 1
invariant :p_0_16 + r_0_16 + -1'r_1_16 = 0
invariant :p_1_51 + r_1_51 = 1
invariant :p_0_72 + r_0_72 + -1'r_1_72 = 0
invariant :p_0_63 + r_0_63 + -1'r_1_63 = 0
invariant :p_0_6 + r_0_6 + -1'r_1_6 = 0
invariant :p_1_30 + r_1_30 = 1
invariant :p_1_47 + r_1_47 = 1
invariant :p_1_44 + r_1_44 = 1
invariant :p_1_13 + r_1_13 = 1
invariant :p_1_55 + r_1_55 = 1
invariant :p_1_83 + r_1_83 = 1
invariant :p_1_70 + r_1_70 = 1
invariant :p_0_43 + r_0_43 + -1'r_1_43 = 0
invariant :p_0_70 + r_0_70 + -1'r_1_70 = 0
invariant :p_1_52 + r_1_52 = 1
invariant :p_1_96 + r_1_96 = 1
invariant :p_1_28 + r_1_28 = 1
invariant :p_1_48 + r_1_48 = 1
invariant :p_0_96 + r_0_96 + -1'r_1_96 = 0
invariant :p_1_0 + r_1_0 = 1
invariant :p_0_52 + r_0_52 + -1'r_1_52 = 0
invariant :p_0_7 + r_0_7 + -1'r_1_7 = 0
invariant :p_1_19 + r_1_19 = 1
invariant :p_1_27 + r_1_27 = 1
invariant :p_1_60 + r_1_60 = 1
invariant :p_1_89 + r_1_89 = 1
invariant :p_0_44 + r_0_44 + -1'r_1_44 = 0
invariant :p_0_82 + r_0_82 + -1'r_1_82 = 0
invariant :p_1_43 + r_1_43 = 1
invariant :p_0_92 + r_0_92 + -1'r_1_92 = 0
invariant :p_0_25 + r_0_25 + -1'r_1_25 = 0
invariant :p_0_71 + r_0_71 + -1'r_1_71 = 0
invariant :p_1_59 + r_1_59 = 1
invariant :p_0_15 + r_0_15 + -1'r_1_15 = 0
invariant :p_0_5 + r_0_5 + -1'r_1_5 = 0
invariant :p_0_89 + r_0_89 + -1'r_1_89 = 0
invariant :p_1_75 + r_1_75 = 1
invariant :p_0_46 + r_0_46 + -1'r_1_46 = 0
invariant :p_0_10 + r_0_10 + -1'r_1_10 = 0
invariant :p_1_81 + r_1_81 = 1
invariant :p_0_83 + r_0_83 + -1'r_1_83 = 0
invariant :p_0_74 + r_0_74 + -1'r_1_74 = 0
invariant :p_0_9 + r_0_9 + -1'r_1_9 = 0
invariant :p_0_34 + r_0_34 + -1'r_1_34 = 0
invariant :p_0_56 + r_0_56 + -1'r_1_56 = 0
invariant :p_1_11 + r_1_11 = 1
invariant :p_0_80 + r_0_80 + -1'r_1_80 = 0
invariant :p_1_1 + r_1_1 = 1
invariant :p_1_84 + r_1_84 = 1
invariant :p_1_6 + r_1_6 = 1
invariant :p_1_82 + r_1_82 = 1
invariant :p_0_99 + r_0_99 + -1'r_1_99 = 0
invariant :p_1_46 + r_1_46 = 1
invariant :p_0_79 + r_0_79 + -1'r_1_79 = 0
invariant :p_1_74 + r_1_74 = 1
invariant :p_0_93 + r_0_93 + -1'r_1_93 = 0
invariant :p_1_49 + r_1_49 = 1
invariant :p_0_2 + r_0_2 + -1'r_1_2 = 0
invariant :p_1_92 + r_1_92 = 1
invariant :p_1_53 + r_1_53 = 1
invariant :p_0_78 + r_0_78 + -1'r_1_78 = 0
invariant :p_0_29 + r_0_29 + -1'r_1_29 = 0
invariant :p_1_39 + r_1_39 = 1
invariant :p_1_64 + r_1_64 = 1
invariant :p_1_18 + r_1_18 = 1
invariant :p_1_40 + r_1_40 = 1
invariant :p_1_91 + r_1_91 = 1
invariant :p_0_64 + r_0_64 + -1'r_1_64 = 0
invariant :p_0_81 + r_0_81 + -1'r_1_81 = 0
invariant :p_1_29 + r_1_29 = 1
invariant :p_1_76 + r_1_76 = 1
invariant :p_1_50 + r_1_50 = 1
invariant :p_0_49 + r_0_49 + -1'r_1_49 = 0
invariant :p_0_13 + r_0_13 + -1'r_1_13 = 0
invariant :p_0_65 + r_0_65 + -1'r_1_65 = 0
invariant :p_0_59 + r_0_59 + -1'r_1_59 = 0
invariant :p_1_90 + r_1_90 = 1
invariant :p_1_4 + r_1_4 = 1
invariant :p_1_54 + r_1_54 = 1
invariant :p_0_0 + r_0_0 + -1'r_1_0 = 0
invariant :p_0_66 + r_0_66 + -1'r_1_66 = 0
invariant :p_0_4 + r_0_4 + -1'r_1_4 = 0
invariant :p_1_73 + r_1_73 = 1
invariant :p_0_62 + r_0_62 + -1'r_1_62 = 0
invariant :p_1_36 + r_1_36 = 1
invariant :p_0_58 + r_0_58 + -1'r_1_58 = 0
invariant :p_0_40 + r_0_40 + -1'r_1_40 = 0
invariant :p_1_26 + r_1_26 = 1
invariant :p_0_68 + r_0_68 + -1'r_1_68 = 0
invariant :p_0_35 + r_0_35 + -1'r_1_35 = 0
invariant :p_1_58 + r_1_58 = 1
invariant :p_1_16 + r_1_16 = 1
invariant :p_1_63 + r_1_63 = 1
invariant :p_0_18 + r_0_18 + -1'r_1_18 = 0
invariant :p_0_23 + r_0_23 + -1'r_1_23 = 0
invariant :p_0_77 + r_0_77 + -1'r_1_77 = 0
invariant :p_0_11 + r_0_11 + -1'r_1_11 = 0
invariant :p_0_45 + r_0_45 + -1'r_1_45 = 0
invariant :p_0_60 + r_0_60 + -1'r_1_60 = 0
invariant :p_1_45 + r_1_45 = 1
invariant :p_0_61 + r_0_61 + -1'r_1_61 = 0
invariant :p_1_57 + r_1_57 = 1
invariant :p_1_24 + r_1_24 = 1
invariant :p_1_42 + r_1_42 = 1
invariant :p_1_5 + r_1_5 = 1
invariant :p_0_86 + r_0_86 + -1'r_1_86 = 0
invariant :p_0_87 + r_0_87 + -1'r_1_87 = 0
invariant :p_0_48 + r_0_48 + -1'r_1_48 = 0
invariant :p_1_35 + r_1_35 = 1
invariant :p_0_1 + r_0_1 + -1'r_1_1 = 0
invariant :p_0_98 + r_0_98 + -1'r_1_98 = 0
invariant :p_1_15 + r_1_15 = 1
invariant :p_0_20 + r_0_20 + -1'r_1_20 = 0
invariant :p_1_8 + r_1_8 = 1
invariant :p_1_38 + r_1_38 = 1
invariant :p_1_23 + r_1_23 = 1
invariant :p_1_67 + r_1_67 = 1
invariant :p_0_50 + r_0_50 + -1'r_1_50 = 0
invariant :p_1_68 + r_1_68 = 1
invariant :p_0_14 + r_0_14 + -1'r_1_14 = 0
invariant :p_1_97 + r_1_97 = 1
invariant :p_1_10 + r_1_10 = 1
invariant :p_0_95 + r_0_95 + -1'r_1_95 = 0
invariant :p_1_41 + r_1_41 = 1
invariant :p_0_75 + r_0_75 + -1'r_1_75 = 0
invariant :p_0_90 + r_0_90 + -1'r_1_90 = 0
invariant :p_1_62 + r_1_62 = 1
invariant :p_1_3 + r_1_3 = 1
invariant :p_1_61 + r_1_61 = 1
invariant :p_0_31 + r_0_31 + -1'r_1_31 = 0
invariant :p_1_17 + r_1_17 = 1
invariant :p_1_80 + r_1_80 = 1
invariant :p_0_39 + r_0_39 + -1'r_1_39 = 0
invariant :p_0_97 + r_0_97 + -1'r_1_97 = 0
invariant :p_0_12 + r_0_12 + -1'r_1_12 = 0
invariant :p_1_37 + r_1_37 = 1
invariant :p_1_86 + r_1_86 = 1
invariant :p_1_32 + r_1_32 = 1
invariant :p_0_24 + r_0_24 + -1'r_1_24 = 0
invariant :p_0_3 + r_0_3 + -1'r_1_3 = 0
invariant :p_0_27 + r_0_27 + -1'r_1_27 = 0
invariant :p_0_91 + r_0_91 + -1'r_1_91 = 0
invariant :p_1_78 + r_1_78 = 1
invariant :p_1_66 + r_1_66 = 1
invariant :p_1_88 + r_1_88 = 1
invariant :p_1_65 + r_1_65 = 1
invariant :p_0_94 + r_0_94 + -1'r_1_94 = 0
invariant :p_1_9 + r_1_9 = 1
invariant :p_0_33 + r_0_33 + -1'r_1_33 = 0
invariant :p_0_42 + r_0_42 + -1'r_1_42 = 0
invariant :p_1_25 + r_1_25 = 1
invariant :p_1_85 + r_1_85 = 1
invariant :p_0_22 + r_0_22 + -1'r_1_22 = 0
invariant :p_1_98 + r_1_98 = 1
invariant :p_1_99 + r_1_99 = 1
invariant :p_0_84 + r_0_84 + -1'r_1_84 = 0
invariant :p_1_79 + r_1_79 = 1
invariant :p_0_51 + r_0_51 + -1'r_1_51 = 0
invariant :p_1_87 + r_1_87 = 1
invariant :p_0_17 + r_0_17 + -1'r_1_17 = 0
invariant :p_1_77 + r_1_77 = 1
invariant :p_0_76 + r_0_76 + -1'r_1_76 = 0
invariant :p_1_7 + r_1_7 = 1
invariant :p_1_34 + r_1_34 = 1
invariant :p_0_21 + r_0_21 + -1'r_1_21 = 0
invariant :p_1_93 + r_1_93 = 1
invariant :p_0_36 + r_0_36 + -1'r_1_36 = 0
invariant :p_0_32 + r_0_32 + -1'r_1_32 = 0
invariant :p_0_47 + r_0_47 + -1'r_1_47 = 0
invariant :p_0_54 + r_0_54 + -1'r_1_54 = 0
invariant :p_1_31 + r_1_31 = 1
invariant :p_1_20 + r_1_20 = 1
invariant :p_0_85 + r_0_85 + -1'r_1_85 = 0
invariant :p_0_26 + r_0_26 + -1'r_1_26 = 0
invariant :p_0_30 + r_0_30 + -1'r_1_30 = 0
invariant :p_0_41 + r_0_41 + -1'r_1_41 = 0
invariant :p_0_73 + r_0_73 + -1'r_1_73 = 0
invariant :p_0_57 + r_0_57 + -1'r_1_57 = 0
invariant :p_0_8 + r_0_8 + -1'r_1_8 = 0
invariant :p_1_33 + r_1_33 = 1
invariant :p_1_12 + r_1_12 = 1
invariant :p_0_28 + r_0_28 + -1'r_1_28 = 0
invariant :p_0_55 + r_0_55 + -1'r_1_55 = 0
invariant :p_0_88 + r_0_88 + -1'r_1_88 = 0
invariant :p_1_69 + r_1_69 = 1
invariant :p_0_38 + r_0_38 + -1'r_1_38 = 0
invariant :p_0_37 + r_0_37 + -1'r_1_37 = 0
invariant :p_1_71 + r_1_71 = 1
invariant :p_1_22 + r_1_22 = 1
invariant :p_0_69 + r_0_69 + -1'r_1_69 = 0
invariant :p_1_72 + r_1_72 = 1
invariant :p_0_53 + r_0_53 + -1'r_1_53 = 0
invariant :p_0_67 + r_0_67 + -1'r_1_67 = 0
invariant :p_1_14 + r_1_14 = 1
invariant :p_1_2 + r_1_2 = 1
invariant :p_1_95 + r_1_95 = 1
invariant :p_1_94 + r_1_94 = 1
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 202 rows 400 cols
invariant :p_0_19 + r_0_19 + -1'r_1_19 = 0
invariant :p_1_21 + r_1_21 = 1
invariant :p_1_56 + r_1_56 = 1
invariant :p_0_16 + r_0_16 + -1'r_1_16 = 0
invariant :p_1_51 + r_1_51 = 1
invariant :p_0_72 + r_0_72 + -1'r_1_72 = 0
invariant :p_0_63 + r_0_63 + -1'r_1_63 = 0
invariant :p_0_6 + r_0_6 + -1'r_1_6 = 0
invariant :p_1_30 + r_1_30 = 1
invariant :p_1_47 + r_1_47 = 1
invariant :p_1_44 + r_1_44 = 1
invariant :p_1_13 + r_1_13 = 1
invariant :p_1_55 + r_1_55 = 1
invariant :p_1_83 + r_1_83 = 1
invariant :p_1_70 + r_1_70 = 1
invariant :p_0_43 + r_0_43 + -1'r_1_43 = 0
invariant :p_0_70 + r_0_70 + -1'r_1_70 = 0
invariant :p_1_52 + r_1_52 = 1
invariant :p_1_96 + r_1_96 = 1
invariant :p_1_28 + r_1_28 = 1
invariant :p_1_48 + r_1_48 = 1
invariant :p_0_96 + r_0_96 + -1'r_1_96 = 0
invariant :p_1_0 + r_1_0 = 1
invariant :p_0_52 + r_0_52 + -1'r_1_52 = 0
invariant :p_0_7 + r_0_7 + -1'r_1_7 = 0
invariant :p_1_19 + r_1_19 = 1
invariant :p_1_27 + r_1_27 = 1
invariant :p_1_60 + r_1_60 = 1
invariant :p_1_89 + r_1_89 = 1
invariant :p_0_44 + r_0_44 + -1'r_1_44 = 0
invariant :p_0_82 + r_0_82 + -1'r_1_82 = 0
invariant :p_1_43 + r_1_43 = 1
invariant :p_0_92 + r_0_92 + -1'r_1_92 = 0
invariant :p_0_25 + r_0_25 + -1'r_1_25 = 0
invariant :p_0_71 + r_0_71 + -1'r_1_71 = 0
invariant :p_1_59 + r_1_59 = 1
invariant :p_0_15 + r_0_15 + -1'r_1_15 = 0
invariant :p_0_5 + r_0_5 + -1'r_1_5 = 0
invariant :p_0_89 + r_0_89 + -1'r_1_89 = 0
invariant :p_1_75 + r_1_75 = 1
invariant :p_0_46 + r_0_46 + -1'r_1_46 = 0
invariant :p_0_10 + r_0_10 + -1'r_1_10 = 0
invariant :p_1_81 + r_1_81 = 1
invariant :p_0_83 + r_0_83 + -1'r_1_83 = 0
invariant :p_0_74 + r_0_74 + -1'r_1_74 = 0
invariant :p_0_9 + r_0_9 + -1'r_1_9 = 0
invariant :p_0_34 + r_0_34 + -1'r_1_34 = 0
invariant :p_0_56 + r_0_56 + -1'r_1_56 = 0
invariant :p_1_11 + r_1_11 = 1
invariant :p_0_80 + r_0_80 + -1'r_1_80 = 0
invariant :p_1_1 + r_1_1 = 1
invariant :p_1_84 + r_1_84 = 1
invariant :p_1_6 + r_1_6 = 1
invariant :p_1_82 + r_1_82 = 1
invariant :p_0_99 + r_0_99 + -1'r_1_99 = 0
invariant :p_1_46 + r_1_46 = 1
invariant :p_0_79 + r_0_79 + -1'r_1_79 = 0
invariant :p_1_74 + r_1_74 = 1
invariant :p_0_93 + r_0_93 + -1'r_1_93 = 0
invariant :p_1_49 + r_1_49 = 1
invariant :p_0_2 + r_0_2 + -1'r_1_2 = 0
invariant :p_1_92 + r_1_92 = 1
invariant :p_1_53 + r_1_53 = 1
invariant :p_0_78 + r_0_78 + -1'r_1_78 = 0
invariant :p_0_29 + r_0_29 + -1'r_1_29 = 0
invariant :p_1_39 + r_1_39 = 1
invariant :p_1_64 + r_1_64 = 1
invariant :p_1_18 + r_1_18 = 1
invariant :p_1_40 + r_1_40 = 1
invariant :p_1_91 + r_1_91 = 1
invariant :p_0_64 + r_0_64 + -1'r_1_64 = 0
invariant :p_0_81 + r_0_81 + -1'r_1_81 = 0
invariant :p_1_29 + r_1_29 = 1
invariant :p_1_76 + r_1_76 = 1
invariant :p_1_50 + r_1_50 = 1
invariant :p_0_49 + r_0_49 + -1'r_1_49 = 0
invariant :p_0_13 + r_0_13 + -1'r_1_13 = 0
invariant :p_0_65 + r_0_65 + -1'r_1_65 = 0
invariant :p_0_59 + r_0_59 + -1'r_1_59 = 0
invariant :p_1_90 + r_1_90 = 1
invariant :p_1_4 + r_1_4 = 1
invariant :p_1_54 + r_1_54 = 1
invariant :p_0_0 + r_0_0 + -1'r_1_0 = 0
invariant :p_0_66 + r_0_66 + -1'r_1_66 = 0
invariant :p_0_4 + r_0_4 + -1'r_1_4 = 0
invariant :p_1_73 + r_1_73 = 1
invariant :p_0_62 + r_0_62 + -1'r_1_62 = 0
invariant :p_1_36 + r_1_36 = 1
invariant :p_0_58 + r_0_58 + -1'r_1_58 = 0
invariant :p_0_40 + r_0_40 + -1'r_1_40 = 0
invariant :p_1_26 + r_1_26 = 1
invariant :p_0_68 + r_0_68 + -1'r_1_68 = 0
invariant :p_0_35 + r_0_35 + -1'r_1_35 = 0
invariant :p_1_58 + r_1_58 = 1
invariant :p_1_16 + r_1_16 = 1
invariant :p_1_63 + r_1_63 = 1
invariant :p_0_18 + r_0_18 + -1'r_1_18 = 0
invariant :p_0_23 + r_0_23 + -1'r_1_23 = 0
invariant :p_0_77 + r_0_77 + -1'r_1_77 = 0
invariant :p_0_11 + r_0_11 + -1'r_1_11 = 0
invariant :p_0_45 + r_0_45 + -1'r_1_45 = 0
invariant :p_0_60 + r_0_60 + -1'r_1_60 = 0
invariant :p_1_45 + r_1_45 = 1
invariant :p_0_61 + r_0_61 + -1'r_1_61 = 0
invariant :p_1_57 + r_1_57 = 1
invariant :p_1_24 + r_1_24 = 1
invariant :p_1_42 + r_1_42 = 1
invariant :p_1_5 + r_1_5 = 1
invariant :p_0_86 + r_0_86 + -1'r_1_86 = 0
invariant :p_0_87 + r_0_87 + -1'r_1_87 = 0
invariant :p_0_48 + r_0_48 + -1'r_1_48 = 0
invariant :p_1_35 + r_1_35 = 1
invariant :p_0_1 + r_0_1 + -1'r_1_1 = 0
invariant :p_0_98 + r_0_98 + -1'r_1_98 = 0
invariant :p_1_15 + r_1_15 = 1
invariant :p_0_20 + r_0_20 + -1'r_1_20 = 0
invariant :p_1_8 + r_1_8 = 1
invariant :p_1_38 + r_1_38 = 1
invariant :p_1_23 + r_1_23 = 1
invariant :p_1_67 + r_1_67 = 1
invariant :p_0_50 + r_0_50 + -1'r_1_50 = 0
invariant :p_1_68 + r_1_68 = 1
invariant :p_0_14 + r_0_14 + -1'r_1_14 = 0
invariant :p_1_97 + r_1_97 = 1
invariant :p_1_10 + r_1_10 = 1
invariant :p_0_95 + r_0_95 + -1'r_1_95 = 0
invariant :p_1_41 + r_1_41 = 1
invariant :p_0_75 + r_0_75 + -1'r_1_75 = 0
invariant :p_0_90 + r_0_90 + -1'r_1_90 = 0
invariant :p_1_62 + r_1_62 = 1
invariant :p_1_3 + r_1_3 = 1
invariant :p_1_61 + r_1_61 = 1
invariant :p_0_31 + r_0_31 + -1'r_1_31 = 0
invariant :p_1_17 + r_1_17 = 1
invariant :p_1_80 + r_1_80 = 1
invariant :p_0_39 + r_0_39 + -1'r_1_39 = 0
invariant :p_0_97 + r_0_97 + -1'r_1_97 = 0
invariant :p_0_12 + r_0_12 + -1'r_1_12 = 0
invariant :p_1_37 + r_1_37 = 1
invariant :p_1_86 + r_1_86 = 1
invariant :p_1_32 + r_1_32 = 1
invariant :p_0_24 + r_0_24 + -1'r_1_24 = 0
invariant :p_0_3 + r_0_3 + -1'r_1_3 = 0
invariant :p_0_27 + r_0_27 + -1'r_1_27 = 0
invariant :p_0_91 + r_0_91 + -1'r_1_91 = 0
invariant :p_1_78 + r_1_78 = 1
invariant :p_1_66 + r_1_66 = 1
invariant :p_1_88 + r_1_88 = 1
invariant :p_1_65 + r_1_65 = 1
invariant :p_0_94 + r_0_94 + -1'r_1_94 = 0
invariant :p_1_9 + r_1_9 = 1
invariant :p_0_33 + r_0_33 + -1'r_1_33 = 0
invariant :p_0_42 + r_0_42 + -1'r_1_42 = 0
invariant :p_1_25 + r_1_25 = 1
invariant :p_1_85 + r_1_85 = 1
invariant :p_0_22 + r_0_22 + -1'r_1_22 = 0
invariant :p_1_98 + r_1_98 = 1
invariant :p_1_99 + r_1_99 = 1
invariant :p_0_84 + r_0_84 + -1'r_1_84 = 0
invariant :p_1_79 + r_1_79 = 1
invariant :p_0_51 + r_0_51 + -1'r_1_51 = 0
invariant :p_1_87 + r_1_87 = 1
invariant :p_0_17 + r_0_17 + -1'r_1_17 = 0
invariant :p_1_77 + r_1_77 = 1
invariant :p_0_76 + r_0_76 + -1'r_1_76 = 0
invariant :p_1_7 + r_1_7 = 1
invariant :p_1_34 + r_1_34 = 1
invariant :p_0_21 + r_0_21 + -1'r_1_21 = 0
invariant :p_1_93 + r_1_93 = 1
invariant :p_0_36 + r_0_36 + -1'r_1_36 = 0
invariant :p_0_32 + r_0_32 + -1'r_1_32 = 0
invariant :p_0_47 + r_0_47 + -1'r_1_47 = 0
invariant :p_0_54 + r_0_54 + -1'r_1_54 = 0
invariant :p_1_31 + r_1_31 = 1
invariant :p_1_20 + r_1_20 = 1
invariant :p_0_85 + r_0_85 + -1'r_1_85 = 0
invariant :p_0_26 + r_0_26 + -1'r_1_26 = 0
invariant :p_0_30 + r_0_30 + -1'r_1_30 = 0
invariant :p_0_41 + r_0_41 + -1'r_1_41 = 0
invariant :p_0_73 + r_0_73 + -1'r_1_73 = 0
invariant :p_0_57 + r_0_57 + -1'r_1_57 = 0
invariant :p_0_8 + r_0_8 + -1'r_1_8 = 0
invariant :p_1_33 + r_1_33 = 1
invariant :p_1_12 + r_1_12 = 1
invariant :p_0_28 + r_0_28 + -1'r_1_28 = 0
invariant :p_0_55 + r_0_55 + -1'r_1_55 = 0
invariant :p_0_88 + r_0_88 + -1'r_1_88 = 0
invariant :p_1_69 + r_1_69 = 1
invariant :p_0_38 + r_0_38 + -1'r_1_38 = 0
invariant :p_0_37 + r_0_37 + -1'r_1_37 = 0
invariant :p_1_71 + r_1_71 = 1
invariant :p_1_22 + r_1_22 = 1
invariant :p_0_69 + r_0_69 + -1'r_1_69 = 0
invariant :p_1_72 + r_1_72 = 1
invariant :p_0_53 + r_0_53 + -1'r_1_53 = 0
invariant :p_0_67 + r_0_67 + -1'r_1_67 = 0
invariant :p_1_14 + r_1_14 = 1
invariant :p_1_2 + r_1_2 = 1
invariant :p_1_95 + r_1_95 = 1
invariant :p_1_94 + r_1_94 = 1
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
petri,6.46502e+31,1.58538,30400,2,1682,5,122093,6,0,1805,149705,0
Total reachable state count : 64650180611639699476331863474176

Verifying 16 reachability properties.
Reachability property ResAllocation-PT-R100C002-ReachabilityCardinality-00 does not hold.
FORMULA ResAllocation-PT-R100C002-ReachabilityCardinality-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : ResAllocation-PT-R100C002-ReachabilityCardinality-00

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R100C002-ReachabilityCardinality-00,0,1.58832,30660,1,0,5,122093,7,0,1807,149705,0
Invariant property ResAllocation-PT-R100C002-ReachabilityCardinality-01 is true.
FORMULA ResAllocation-PT-R100C002-ReachabilityCardinality-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R100C002-ReachabilityCardinality-01,0,1.59578,30740,1,0,5,122093,8,0,1836,149705,0
Reachability property ResAllocation-PT-R100C002-ReachabilityCardinality-02 is true.
FORMULA ResAllocation-PT-R100C002-ReachabilityCardinality-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R100C002-ReachabilityCardinality-02,2.14748e+09,1.59706,30740,2,583,6,122093,9,0,1840,149705,0
Reachability property ResAllocation-PT-R100C002-ReachabilityCardinality-03 does not hold.
FORMULA ResAllocation-PT-R100C002-ReachabilityCardinality-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : ResAllocation-PT-R100C002-ReachabilityCardinality-03

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R100C002-ReachabilityCardinality-03,0,1.59876,30740,1,0,6,122093,10,0,1843,149705,0
Invariant property ResAllocation-PT-R100C002-ReachabilityCardinality-04 does not hold.
FORMULA ResAllocation-PT-R100C002-ReachabilityCardinality-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R100C002-ReachabilityCardinality-04,1,1.60091,30740,2,401,7,122093,11,0,1854,149705,0
Invariant property ResAllocation-PT-R100C002-ReachabilityCardinality-05 is true.
FORMULA ResAllocation-PT-R100C002-ReachabilityCardinality-05 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R100C002-ReachabilityCardinality-05,0,1.60174,30740,1,0,7,122093,12,0,1857,149705,0
Reachability property ResAllocation-PT-R100C002-ReachabilityCardinality-06 is true.
FORMULA ResAllocation-PT-R100C002-ReachabilityCardinality-06 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R100C002-ReachabilityCardinality-06,131072,1.60369,30740,2,500,8,122093,13,0,1870,149705,0
Invariant property ResAllocation-PT-R100C002-ReachabilityCardinality-07 is true.
FORMULA ResAllocation-PT-R100C002-ReachabilityCardinality-07 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R100C002-ReachabilityCardinality-07,0,1.60596,30740,1,0,8,122093,14,0,1871,149705,0
Reachability property ResAllocation-PT-R100C002-ReachabilityCardinality-08 is true.
FORMULA ResAllocation-PT-R100C002-ReachabilityCardinality-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R100C002-ReachabilityCardinality-08,524288,1.60703,30740,2,512,9,122093,15,0,1872,149705,0
Invariant property ResAllocation-PT-R100C002-ReachabilityCardinality-09 does not hold.
FORMULA ResAllocation-PT-R100C002-ReachabilityCardinality-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R100C002-ReachabilityCardinality-09,4.05828e+21,1.60909,30740,2,1118,10,122093,16,0,1878,149705,0
Reachability property ResAllocation-PT-R100C002-ReachabilityCardinality-10 does not hold.
FORMULA ResAllocation-PT-R100C002-ReachabilityCardinality-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : ResAllocation-PT-R100C002-ReachabilityCardinality-10

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R100C002-ReachabilityCardinality-10,0,1.61278,30740,1,0,10,122093,17,0,1888,149705,0
Invariant property ResAllocation-PT-R100C002-ReachabilityCardinality-11 does not hold.
FORMULA ResAllocation-PT-R100C002-ReachabilityCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R100C002-ReachabilityCardinality-11,2.8408e+21,1.61569,30740,2,1255,11,122093,18,0,1907,149705,0
Reachability property ResAllocation-PT-R100C002-ReachabilityCardinality-12 is true.
FORMULA ResAllocation-PT-R100C002-ReachabilityCardinality-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R100C002-ReachabilityCardinality-12,8.38861e+06,1.61675,30740,2,536,12,122093,19,0,1908,149705,0
Reachability property ResAllocation-PT-R100C002-ReachabilityCardinality-13 does not hold.
FORMULA ResAllocation-PT-R100C002-ReachabilityCardinality-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : ResAllocation-PT-R100C002-ReachabilityCardinality-13

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R100C002-ReachabilityCardinality-13,0,1.62227,30740,1,0,12,122093,20,0,1917,149705,0
Reachability property ResAllocation-PT-R100C002-ReachabilityCardinality-14 is true.
FORMULA ResAllocation-PT-R100C002-ReachabilityCardinality-14 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R100C002-ReachabilityCardinality-14,9.67141e+24,1.62383,30740,2,895,13,122093,21,0,1925,149705,0
Reachability property ResAllocation-PT-R100C002-ReachabilityCardinality-15 does not hold.
FORMULA ResAllocation-PT-R100C002-ReachabilityCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : ResAllocation-PT-R100C002-ReachabilityCardinality-15

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ResAllocation-PT-R100C002-ReachabilityCardinality-15,0,1.62504,30740,1,0,13,122093,22,0,1926,149705,0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1553671991042

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 27, 2019 7:33:06 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt]
Mar 27, 2019 7:33:06 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 27, 2019 7:33:07 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 241 ms
Mar 27, 2019 7:33:07 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 400 places.
Mar 27, 2019 7:33:07 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 202 transitions.
Mar 27, 2019 7:33:07 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 39 ms
Mar 27, 2019 7:33:07 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 182 ms
Mar 27, 2019 7:33:08 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 157 ms
Mar 27, 2019 7:33:08 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 258 ms
Mar 27, 2019 7:33:08 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 202 transitions.
Mar 27, 2019 7:33:08 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 202 transitions.
Mar 27, 2019 7:33:08 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 202 transitions.
Mar 27, 2019 7:33:08 AM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 400 places.
Mar 27, 2019 7:33:08 AM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 202 transitions.
Mar 27, 2019 7:33:08 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 5 ms
Mar 27, 2019 7:33:08 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 2 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 1102 ms.
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-00(UNSAT) depth K=0 took 27 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-01(UNSAT) depth K=0 took 40 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-02(UNSAT) depth K=0 took 46 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-03(UNSAT) depth K=0 took 15 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-04(UNSAT) depth K=0 took 25 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 200 place invariants in 536 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-05(UNSAT) depth K=0 took 43 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-06(UNSAT) depth K=0 took 23 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 202 transitions.
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-07(UNSAT) depth K=0 took 17 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-08(UNSAT) depth K=0 took 24 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-09(UNSAT) depth K=0 took 16 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-10(UNSAT) depth K=0 took 4 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-11(UNSAT) depth K=0 took 13 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-12(UNSAT) depth K=0 took 13 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-13(UNSAT) depth K=0 took 15 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-14(UNSAT) depth K=0 took 16 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-15(UNSAT) depth K=0 took 19 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-00(UNSAT) depth K=1 took 16 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-01(UNSAT) depth K=1 took 16 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-02(UNSAT) depth K=1 took 22 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-03(UNSAT) depth K=1 took 15 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-04(UNSAT) depth K=1 took 15 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-05(UNSAT) depth K=1 took 16 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-06(UNSAT) depth K=1 took 15 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-07(UNSAT) depth K=1 took 12 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-08(UNSAT) depth K=1 took 15 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-09(UNSAT) depth K=1 took 16 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-10(UNSAT) depth K=1 took 8 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-11(UNSAT) depth K=1 took 10 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-12(UNSAT) depth K=1 took 16 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-13(UNSAT) depth K=1 took 12 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 200 place invariants in 162 ms
Mar 27, 2019 7:33:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-14(UNSAT) depth K=1 took 28 ms
Mar 27, 2019 7:33:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-15(UNSAT) depth K=1 took 15 ms
Mar 27, 2019 7:33:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-00(UNSAT) depth K=2 took 109 ms
Mar 27, 2019 7:33:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-01(UNSAT) depth K=2 took 56 ms
Mar 27, 2019 7:33:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-02(UNSAT) depth K=2 took 93 ms
Mar 27, 2019 7:33:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-03(UNSAT) depth K=2 took 89 ms
Mar 27, 2019 7:33:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-04(UNSAT) depth K=2 took 100 ms
Mar 27, 2019 7:33:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-05(UNSAT) depth K=2 took 107 ms
Mar 27, 2019 7:33:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ResAllocation-PT-R100C002-ReachabilityCardinality-06(UNSAT) depth K=2 took 92 ms
Mar 27, 2019 7:33:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Exception in thread "Thread-8" java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:116)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.init(NecessaryEnablingsolver.java:71)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:471)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: SMT push produced unexpected response (error "Error writing to Z3 solver: java.io.IOException: Broken pipe")
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:87)
at fr.lip6.move.gal.gal2smt.smt.ISMTSolver.init(ISMTSolver.java:17)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:278)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Mar 27, 2019 7:33:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying ResAllocation-PT-R100C002-ReachabilityCardinality-07 SMT depth 2
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
Mar 27, 2019 7:33:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 2
Mar 27, 2019 7:33:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 2
Mar 27, 2019 7:33:10 AM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 0/ 16 properties. Interrupting other analysis methods.
Mar 27, 2019 7:33:10 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 2606ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R100C002"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsm"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstoolsm"
echo " Input is ResAllocation-PT-R100C002, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r200-ebro-155286406300134"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R100C002.tgz
mv ResAllocation-PT-R100C002 execution
cd execution
if [ "ReachabilityCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;