fond
Model Checking Contest 2019
9th edition, Prague, Czech Republic, April 7, 2019 (TOOLympics)
Execution of r197-oct2-155272231000439
Last Updated
Apr 15, 2019

About the Execution of ITS-Tools.M for PermAdmissibility-PT-05

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
8635.780 3600000.00 14124322.00 148.10 FFF??T??FFFFFFF? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2019-input.r197-oct2-155272231000439.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2019-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.....................................................................................................................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstoolsm
Input is PermAdmissibility-PT-05, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r197-oct2-155272231000439
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 848K
-rw-r--r-- 1 mcc users 5.1K Feb 12 04:11 CTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 12 04:11 CTLCardinality.xml
-rw-r--r-- 1 mcc users 21K Feb 8 03:12 CTLFireability.txt
-rw-r--r-- 1 mcc users 81K Feb 8 03:12 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 110 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 348 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 3.2K Feb 5 00:23 LTLCardinality.txt
-rw-r--r-- 1 mcc users 13K Feb 5 00:23 LTLCardinality.xml
-rw-r--r-- 1 mcc users 9.5K Feb 4 22:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 36K Feb 4 22:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K Feb 4 07:56 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K Feb 4 07:56 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 18K Feb 1 02:09 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 64K Feb 1 02:09 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 4 22:22 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Feb 4 22:22 UpperBounds.xml

-rw-r--r-- 1 mcc users 5 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 3 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 481K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-PT-05-LTLFireability-00
FORMULA_NAME PermAdmissibility-PT-05-LTLFireability-01
FORMULA_NAME PermAdmissibility-PT-05-LTLFireability-02
FORMULA_NAME PermAdmissibility-PT-05-LTLFireability-03
FORMULA_NAME PermAdmissibility-PT-05-LTLFireability-04
FORMULA_NAME PermAdmissibility-PT-05-LTLFireability-05
FORMULA_NAME PermAdmissibility-PT-05-LTLFireability-06
FORMULA_NAME PermAdmissibility-PT-05-LTLFireability-07
FORMULA_NAME PermAdmissibility-PT-05-LTLFireability-08
FORMULA_NAME PermAdmissibility-PT-05-LTLFireability-09
FORMULA_NAME PermAdmissibility-PT-05-LTLFireability-10
FORMULA_NAME PermAdmissibility-PT-05-LTLFireability-11
FORMULA_NAME PermAdmissibility-PT-05-LTLFireability-12
FORMULA_NAME PermAdmissibility-PT-05-LTLFireability-13
FORMULA_NAME PermAdmissibility-PT-05-LTLFireability-14
FORMULA_NAME PermAdmissibility-PT-05-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1553660791948

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 592 rows 168 cols
invariant :out1_0 + out1_6 + out1_5 + -1'out2_0 + out1_7 + out1_2 + out1_1 + out1_4 + out1_3 + -1'out2_7 + -1'out2_5 + -1'out2_6 + -1'out2_3 + -1'out2_4 + -1'out2_1 + -1'out2_2 = 0
invariant :aux7_7 + aux7_6 + -1'aux5_1 + -1'aux5_0 + -1'aux5_5 + -1'aux5_4 + aux7_3 + aux7_2 + 2'c7 + -4'c5 + 2'in1_1 + 2'in1_0 = 0
invariant :aux6_0 + -1'aux8_7 + -1'aux8_3 + -1'aux8_6 + aux6_5 + -1'aux8_2 + aux6_1 + aux6_4 + -2'c7 + -2'c8 = 0
invariant :-1'aux16_3 + -1'aux16_6 + aux14_2 + aux14_7 + -1'out7_3 + -1'out7_6 + out8_2 + out8_7 + -1'out5_6 + -1'out5_3 + out6_2 + out6_7 + -1'aux15_6 + -1'aux15_3 + aux13_2 + aux13_7 + -1'out3_6 + -1'out3_3 + out4_7 + out4_2 + -1'out1_6 + -1'out1_3 + out2_7 + out2_2 + -1'aux8_3 + -1'aux8_6 + -1'aux12_6 + -1'aux12_3 + aux11_2 + c11 + -1'aux7_6 + -1'aux10_3 + aux11_7 + aux5_1 + aux5_0 + aux5_5 + aux5_4 + -1'aux7_3 + aux9_7 + in4_7 + -1'in2_3 + -1'aux10_6 + aux9_2 + -2'c7 + -1'c8 + 4'c5 + -2'in1_1 + -2'in1_0 = 0
invariant :c18 + out4_0 + out4_1 + out4_7 + out4_6 + out4_3 + out4_2 + out4_5 + out4_4 + -1'out2_0 + -1'out2_7 + -1'out2_5 + -1'out2_6 + -1'out2_3 + -1'out2_4 + -1'out2_1 + -1'out2_2 = 0
invariant :aux16_3 + aux14_3 + out7_3 + out8_3 + out5_3 + out6_3 + aux15_3 + aux13_3 + out3_3 + out4_3 + out1_3 + out2_3 + aux8_3 + aux12_3 + aux11_3 + aux10_3 + aux7_3 + in2_3 + aux9_3 = 5
invariant :in4_6 + in4_7 + -2'c7 + -1'c8 + 2'c5 + -2'in1_1 + -2'in1_0 = 0
invariant :2'c5 + c6 + -1'in1_1 + -1'in1_0 = 0
invariant :-1'aux8_7 + c12 + -1'aux8_3 + -1'aux8_6 + -1'aux8_2 + 2'c11 + 2'aux5_1 + 2'aux5_0 + 2'aux5_5 + 2'aux5_4 + -2'c9 + -4'c7 + -4'c8 + 8'c5 + -4'in1_1 + -4'in1_0 = 0
invariant :in2_2 + in2_3 + -2'c7 + -1'c8 + 2'c5 + -2'in1_1 + -2'in1_0 = 0
invariant :out7_1 + out7_0 + out7_3 + out7_2 + out7_5 + out7_4 + out7_7 + out7_6 + -1'out8_1 + -1'out8_0 + -1'out8_3 + -1'out8_2 + -1'out8_6 + -1'out8_7 + -1'out8_4 + -1'out8_5 = 0
invariant :-1'aux16_1 + aux16_6 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_7 + -1'out7_1 + out7_6 + -1'out8_1 + -1'out8_3 + -1'out8_2 + -1'out8_7 + out5_2 + out5_0 + out5_5 + 2'out5_6 + out5_3 + out5_4 + -2'out6_1 + -2'out6_2 + out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -2'out6_3 + -1'aux15_1 + -2'out6_7 + aux15_6 + aux13_0 + -1'out3_1 + aux13_4 + aux13_5 + aux13_6 + out3_6 + out4_0 + out4_6 + 2'c17 + out4_5 + out4_4 + out1_6 + 3'out2_0 + -1'out1_1 + 2'out2_7 + 3'out2_5 + 3'out2_6 + 2'out2_3 + 3'out2_4 + 2'out2_1 + 2'out2_2 + 4'aux8_7 + 4'aux8_3 + 5'aux8_6 + 4'aux8_2 + -1'aux6_1 + 3'aux12_6 + 2'aux12_5 + 2'aux12_4 + 2'aux12_3 + 2'aux12_2 + aux12_1 + 2'aux12_0 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + -5'c11 + 2'aux12_7 + aux7_6 + -1'aux10_1 + -1'aux11_7 + -6'aux5_1 + -5'aux5_0 + -5'aux5_5 + -5'aux5_4 + -1'aux9_7 + -1'in4_7 + aux10_6 + 4'c9 + -1'aux9_1 + -1'aux9_2 + -1'aux9_3 + -2'c15 + -2'c14 + 14'c7 + 13'c8 + -24'c5 + 13'in1_1 + 14'in1_0 = 10
invariant :-1'aux16_1 + aux16_6 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_7 + -1'out7_1 + out7_6 + -1'out8_1 + -1'out8_3 + -1'out8_2 + -1'out8_7 + out5_2 + out5_0 + out5_5 + 2'out5_6 + out5_3 + out5_4 + -2'out6_1 + -2'out6_2 + out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -2'out6_3 + -1'aux15_1 + -2'out6_7 + aux15_6 + aux13_0 + -1'out3_1 + aux13_4 + aux13_5 + aux13_6 + out3_6 + out4_0 + out4_6 + out4_5 + out4_4 + out1_6 + out2_0 + -1'out1_1 + out2_5 + out2_6 + out2_4 + 2'aux8_7 + 2'aux8_3 + 3'aux8_6 + 2'aux8_2 + -1'aux6_1 + aux12_6 + -1'aux12_1 + 2'c13 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + -3'c11 + aux7_6 + -1'aux10_1 + -1'aux11_7 + -4'aux5_1 + -3'aux5_0 + -3'aux5_5 + -3'aux5_4 + -1'aux9_7 + -1'in4_7 + aux10_6 + 2'c9 + -1'aux9_1 + -1'aux9_2 + -1'aux9_3 + 8'c7 + 7'c8 + -14'c5 + 7'in1_1 + 8'in1_0 = 0
invariant :c19 + out6_1 + out6_2 + out6_0 + out6_6 + out6_5 + out6_4 + out6_3 + out6_7 + -1'out4_0 + -1'out4_1 + -1'out4_7 + -1'out4_6 + -1'out4_3 + -1'out4_2 + -1'out4_5 + -1'out4_4 = 0
invariant :-1'aux16_1 + aux16_6 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_7 + -1'out7_1 + out7_6 + -1'out8_1 + -1'out8_3 + -1'out8_2 + -1'out8_7 + out5_2 + out5_0 + out5_5 + 2'out5_6 + out5_3 + out5_4 + -2'out6_1 + -2'out6_2 + out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -2'out6_3 + -1'aux15_1 + -2'out6_7 + aux15_6 + aux13_0 + -1'out3_1 + aux13_4 + aux13_5 + aux13_6 + out3_6 + out4_0 + out4_6 + out4_5 + out4_4 + out1_6 + out2_0 + -1'out1_1 + out2_5 + out2_6 + out2_4 + aux8_6 + -1'aux6_1 + aux12_6 + -1'aux12_1 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + -1'c11 + aux7_6 + -1'aux10_1 + -1'aux11_7 + -2'aux5_1 + -1'aux5_0 + -1'aux5_5 + -1'aux5_4 + aux9_4 + aux9_5 + aux9_6 + -1'in4_7 + aux10_6 + 2'c9 + aux9_0 + -1'c14 + 4'c7 + 3'c8 + -6'c5 + 3'in1_1 + 4'in1_0 = 0
invariant :c20 + out8_1 + out8_0 + out8_3 + out8_2 + out8_6 + out8_7 + out8_4 + out8_5 + -1'out6_1 + -1'out6_2 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -1'out6_3 + -1'out6_7 = 0
invariant :-1'aux16_0 + aux16_1 + -1'aux16_6 + 2'aux14_1 + 2'aux14_2 + 2'aux14_3 + aux14_4 + aux14_6 + aux14_5 + 2'aux14_7 + out7_1 + -1'out7_0 + -1'out7_6 + 2'out8_1 + 2'out8_3 + 2'out8_2 + out8_6 + 2'out8_7 + out8_4 + out8_5 + -1'out5_2 + -2'out5_0 + -1'out5_5 + -2'out5_6 + -1'out5_3 + -1'out5_4 + 3'out6_1 + 3'out6_2 + -1'out5_7 + out6_0 + 2'out6_6 + 2'out6_5 + 2'out6_4 + 3'out6_3 + aux15_1 + -1'aux15_0 + 3'out6_7 + -1'aux15_6 + -2'aux13_0 + 2'out3_1 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + out3_7 + -3'out4_0 + -1'out4_1 + out3_2 + out3_3 + out3_4 + out3_5 + -1'out4_7 + -2'out4_6 + -1'out1_0 + -1'out4_3 + -1'out4_2 + -2'out4_5 + -2'out4_4 + -1'out1_6 + -2'out2_0 + out1_1 + -1'out2_5 + -1'out2_6 + -1'out2_4 + -1'aux8_7 + -1'aux8_3 + -2'aux8_6 + aux6_5 + -1'aux8_2 + 2'aux6_1 + aux6_4 + -1'aux12_6 + aux12_1 + -1'aux12_0 + aux11_3 + aux11_2 + aux11_1 + -1'aux11_0 + c11 + -1'aux7_6 + -1'aux10_0 + aux10_1 + aux11_7 + 2'aux5_1 + aux5_5 + aux5_4 + aux9_7 + in4_7 + -1'aux10_6 + -1'aux9_0 + aux9_1 + aux9_2 + aux9_3 + 2'c14 + -4'c7 + -3'c8 + 4'c5 + -1'in1_1 + -3'in1_0 = 5
invariant :-2'aux16_1 + aux16_6 + -2'aux14_1 + -2'aux14_2 + -2'aux14_3 + -1'aux14_6 + -2'aux14_7 + -2'out7_1 + out7_6 + -2'out8_1 + -2'out8_3 + -2'out8_2 + -1'out8_6 + -2'out8_7 + 2'out5_2 + 2'out5_0 + 2'out5_5 + 3'out5_6 + 2'out5_3 + 2'out5_4 + -4'out6_1 + -4'out6_2 + 2'out5_7 + -2'out6_0 + -3'out6_6 + -2'out6_5 + -2'out6_4 + -4'out6_3 + -2'aux15_1 + -4'out6_7 + aux15_6 + 2'aux13_0 + -2'out3_1 + 2'aux13_4 + 2'aux13_5 + aux13_6 + out3_6 + 2'out4_0 + out4_6 + 2'out4_5 + 2'out4_4 + out1_6 + 2'out2_0 + -2'out1_1 + 2'out2_5 + out2_6 + 2'out2_4 + aux8_6 + -2'aux6_1 + aux12_6 + -2'aux12_1 + aux11_5 + aux11_4 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + aux11_0 + aux7_6 + -2'aux10_1 + -1'aux11_7 + -2'aux5_1 + aux9_4 + aux9_5 + -1'aux9_7 + -1'in4_7 + aux10_6 + aux9_0 + -1'aux9_1 + -1'aux9_2 + -1'aux9_3 + -2'c14 + 2'c7 + c8 + -2'c5 + 2'in1_0 = -5
invariant :aux16_1 + -1'aux16_6 + aux14_1 + aux14_2 + aux14_3 + aux14_7 + out7_1 + -1'out7_6 + out8_1 + out8_3 + out8_2 + out8_7 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -2'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + 2'out6_2 + -1'out5_7 + out6_0 + out6_6 + out6_5 + out6_4 + 2'out6_3 + aux15_1 + 2'out6_7 + -1'aux15_6 + -1'aux13_0 + out3_1 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'out3_6 + -1'out4_0 + -1'out4_6 + 2'c17 + -1'out4_5 + -1'out4_4 + -1'out1_6 + out2_0 + out1_1 + 2'out2_7 + out2_5 + out2_6 + 2'out2_3 + out2_4 + 2'out2_1 + 2'out2_2 + -1'aux8_6 + aux6_1 + -1'aux12_6 + aux12_1 + aux11_3 + aux11_2 + aux11_1 + c11 + -1'aux7_6 + aux10_1 + aux11_7 + 2'aux5_1 + aux5_0 + aux5_5 + aux5_4 + aux9_7 + in4_7 + -1'aux10_6 + aux9_1 + aux9_2 + aux9_3 + 2'c16 + 2'c15 + 2'c14 + -2'c7 + -1'c8 + 4'c5 + -1'in1_1 + -2'in1_0 = 10
invariant :-1'aux16_1 + aux16_6 + aux16_7 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'out7_1 + out7_7 + out7_6 + -1'out8_1 + -1'out8_3 + -1'out8_2 + out5_2 + out5_0 + out5_5 + 2'out5_6 + out5_3 + out5_4 + -2'out6_1 + -2'out6_2 + 2'out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -2'out6_3 + -1'aux15_2 + -2'aux15_1 + -1'aux15_0 + -1'out6_7 + -1'aux15_5 + -1'aux15_4 + -1'aux15_3 + aux13_0 + aux13_7 + -1'out3_1 + aux13_4 + aux13_5 + aux13_6 + out3_6 + out3_7 + -1'out4_1 + -1'out4_3 + -1'out4_2 + out1_6 + out1_7 + -1'out1_1 + -1'out2_3 + -1'out2_1 + -1'out2_2 + aux8_7 + aux8_6 + -1'aux6_1 + aux12_6 + -1'aux12_1 + -1'aux11_3 + -1'aux11_2 + -1'aux11_1 + -1'c11 + aux12_7 + -1'aux10_1 + -1'aux5_1 + -1'aux7_3 + -1'aux7_2 + aux10_6 + aux10_7 + -1'aux9_1 + -1'aux9_2 + -1'aux9_3 + -2'c15 + -2'c14 + c8 + -1'in1_1 = -5
invariant :aux16_0 + aux16_1 + aux16_4 + -1'aux14_5 + out7_1 + out7_0 + out7_4 + -1'out8_5 + -1'out5_2 + -1'out5_5 + -1'out5_6 + -1'out5_3 + out6_1 + out6_2 + -1'out5_7 + out6_0 + out6_6 + out6_4 + out6_3 + aux15_1 + aux15_0 + out6_7 + aux15_4 + -1'aux13_5 + -1'out3_6 + -1'out3_7 + out4_0 + out4_1 + -1'out3_2 + -1'out3_3 + -1'out3_5 + out4_7 + out4_6 + out1_0 + out4_3 + out4_2 + out4_4 + out1_1 + out1_4 + -1'out2_5 + aux8_7 + aux8_3 + aux8_6 + -1'aux6_5 + aux8_2 + aux12_4 + aux12_1 + aux12_0 + -1'aux11_5 + -1'c11 + aux10_0 + aux10_1 + aux10_4 + -1'aux5_5 + -1'aux9_5 + in3_4 + 2'c7 + 2'c8 + -2'c5 + in1_1 + in1_0 = 5
invariant :aux16_1 + -1'aux16_6 + -2'aux16_7 + aux14_1 + aux14_2 + aux14_3 + -1'aux14_7 + out7_1 + -2'out7_7 + -1'out7_6 + out8_1 + out8_3 + out8_2 + -1'out8_7 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -2'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + 2'out6_2 + -3'out5_7 + out6_0 + out6_6 + out6_5 + out6_4 + 2'out6_3 + 2'aux15_2 + 3'aux15_1 + 2'aux15_0 + aux15_6 + 2'aux15_5 + 2'aux15_4 + 2'aux15_3 + -1'aux13_0 + -2'aux13_7 + out3_1 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'out3_6 + -2'out3_7 + out4_0 + 2'out4_1 + out4_6 + 2'c17 + 2'out4_3 + 2'out4_2 + out4_5 + out4_4 + -1'out1_6 + 3'out2_0 + -2'out1_7 + out1_1 + 2'out2_7 + 3'out2_5 + 3'out2_6 + 4'out2_3 + 3'out2_4 + 4'out2_1 + 4'out2_2 + -2'aux8_7 + -1'aux8_6 + aux6_1 + -1'aux12_6 + aux12_1 + aux11_3 + aux11_2 + aux11_1 + c11 + -2'aux12_7 + aux7_6 + 2'aux10_0 + 2'aux10_2 + 3'aux10_1 + 2'aux10_4 + 2'aux10_3 + -1'aux11_7 + 4'aux5_1 + 3'aux5_0 + 3'aux5_5 + 3'aux5_4 + 2'aux7_3 + 2'aux7_2 + -1'aux9_7 + -1'in4_7 + 2'aux10_5 + aux10_6 + -4'c9 + aux9_1 + aux9_2 + aux9_3 + 2'c15 + 2'c14 + -2'c7 + -5'c8 + 8'c5 + -1'in1_1 + -2'in1_0 = 20
invariant :out5_1 + out5_2 + out5_0 + out5_5 + out5_6 + out5_3 + out5_4 + -1'out6_1 + -1'out6_2 + out5_7 + -1'out6_0 + -1'out6_6 + -1'out6_5 + -1'out6_4 + -1'out6_3 + -1'out6_7 = 0
invariant :aux16_1 + aux14_1 + out7_1 + out8_1 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -1'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + out6_2 + -1'out5_7 + out6_0 + out6_6 + out6_5 + out6_4 + out6_3 + aux15_1 + out6_7 + aux13_1 + out3_1 + out4_1 + out1_1 + out2_1 + aux6_1 + aux12_1 + aux11_1 + aux10_1 + aux5_1 + aux9_1 + in1_1 = 5
invariant :aux16_0 + aux14_0 + out7_0 + out8_0 + out5_0 + out6_0 + aux15_0 + aux13_0 + -1'out3_1 + -1'out3_6 + -1'out3_7 + 2'out4_0 + out4_1 + -1'out3_2 + -1'out3_3 + -1'out3_4 + -1'out3_5 + out4_7 + out4_6 + out1_0 + out4_3 + out4_2 + out4_5 + out4_4 + out2_0 + aux8_7 + aux8_3 + aux8_6 + -1'aux6_5 + aux8_2 + -1'aux6_1 + -1'aux6_4 + aux12_0 + aux11_0 + aux10_0 + aux5_0 + aux9_0 + 2'c7 + 2'c8 + in1_0 = 5
invariant :c110 + -1'aux5_1 + -1'aux5_0 + -1'aux5_5 + -1'aux5_4 + 2'c9 + 2'c7 + 2'c8 + -4'c5 + 2'in1_1 + 2'in1_0 = 0
invariant :out3_0 + out3_1 + out3_6 + out3_7 + -1'out4_0 + -1'out4_1 + out3_2 + out3_3 + out3_4 + out3_5 + -1'out4_7 + -1'out4_6 + -1'out4_3 + -1'out4_2 + -1'out4_5 + -1'out4_4 = 0
invariant :aux16_1 + aux14_1 + aux14_2 + aux14_3 + aux14_6 + aux14_7 + out7_1 + out8_1 + out8_3 + out8_2 + out8_6 + out8_7 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -1'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + 2'out6_2 + -1'out5_7 + out6_0 + 2'out6_6 + out6_5 + out6_4 + 2'out6_3 + aux15_1 + 2'out6_7 + -1'aux13_0 + out3_1 + -1'aux13_4 + -1'aux13_5 + -1'out4_0 + -1'out4_5 + -1'out4_4 + -1'out2_0 + out1_1 + -1'out2_5 + -1'out2_4 + aux6_1 + aux12_1 + aux11_3 + aux11_2 + aux11_1 + c11 + aux10_1 + aux11_7 + aux11_6 + 2'aux5_1 + aux5_0 + aux5_5 + aux5_4 + -1'aux9_4 + -1'aux9_5 + -2'c9 + -1'aux9_0 + c14 + -2'c7 + -2'c8 + 4'c5 + -1'in1_1 + -2'in1_0 = 5
invariant :aux16_2 + aux16_3 + aux16_6 + aux16_7 + out7_3 + out7_2 + out7_7 + out7_6 + out5_2 + out5_6 + out5_3 + out5_7 + -1'aux15_1 + -1'aux15_0 + -1'aux15_5 + -1'aux15_4 + out3_6 + out3_7 + -1'out4_0 + -1'out4_1 + out3_2 + out3_3 + -1'out4_7 + -1'out4_6 + -2'c17 + -1'out4_3 + -1'out4_2 + -1'out4_5 + -1'out4_4 + out1_6 + -3'out2_0 + out1_7 + out1_2 + out1_3 + -3'out2_7 + -3'out2_5 + -3'out2_6 + -3'out2_3 + -3'out2_4 + -3'out2_1 + -3'out2_2 + -1'aux8_7 + -1'aux8_3 + -1'aux8_6 + -1'aux8_2 + -1'aux12_5 + -1'aux12_4 + -1'aux12_1 + -1'aux12_0 + c11 + -1'aux10_0 + -1'aux10_1 + -1'aux10_4 + -1'aux10_5 + -2'c7 + -2'c8 + 2'c5 + -2'in1_1 + -2'in1_0 = -10
invariant :aux16_1 + -1'aux16_6 + aux14_1 + aux14_2 + aux14_3 + aux14_7 + out7_1 + -1'out7_6 + out8_1 + out8_3 + out8_2 + out8_7 + -1'out5_2 + -1'out5_0 + -1'out5_5 + -2'out5_6 + -1'out5_3 + -1'out5_4 + 2'out6_1 + 2'out6_2 + -1'out5_7 + out6_0 + out6_6 + out6_5 + out6_4 + 2'out6_3 + aux15_2 + 2'aux15_1 + aux15_0 + 2'out6_7 + aux15_5 + aux15_4 + aux15_3 + -1'aux13_0 + aux15_7 + out3_1 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'out3_6 + out4_1 + out4_7 + out4_3 + out4_2 + -1'out1_6 + out1_1 + out2_7 + out2_3 + out2_1 + out2_2 + -1'aux8_6 + aux6_1 + -1'aux12_6 + aux12_1 + aux11_3 + aux11_2 + aux11_1 + c11 + -1'aux7_6 + aux10_1 + aux11_7 + 2'aux5_1 + aux5_0 + aux5_5 + aux5_4 + aux9_7 + in4_7 + -1'aux10_6 + aux9_1 + aux9_2 + aux9_3 + 2'c15 + 2'c14 + -2'c7 + -1'c8 + 4'c5 + -1'in1_1 + -2'in1_0 = 10
invariant :in3_5 + in3_4 + -1'in1_1 + -1'in1_0 = 0
invariant :aux16_5 + aux14_5 + -1'out7_1 + -1'out7_0 + -1'out7_3 + -1'out7_2 + -1'out7_4 + -1'out7_7 + -1'out7_6 + out8_1 + out8_0 + out8_3 + out8_2 + out8_6 + out8_7 + out8_4 + 2'out8_5 + out5_5 + out6_5 + aux15_5 + aux13_5 + out3_5 + -1'out1_0 + out4_5 + -1'out1_6 + out2_0 + -1'out1_7 + -1'out1_2 + -1'out1_1 + -1'out1_4 + -1'out1_3 + out2_7 + 2'out2_5 + out2_6 + out2_3 + out2_4 + out2_1 + out2_2 + aux6_5 + aux12_5 + aux11_5 + aux5_5 + aux9_5 + aux10_5 + -1'in3_4 + in1_1 + in1_0 = 5
P-invariant computation with GreatSPN timed out. Skipping.
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock, --load-order, /home/mcc/execution/model.ord], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock --load-order /home/mcc/execution/model.ord
Read 16 LTL properties
Successfully loaded order from file /home/mcc/execution/model.ord
Checking formula 0 : !((false))
Formula 0 simplified : 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 7495 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 181 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 5719 ms.
FORMULA PermAdmissibility-PT-05-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 9436 ms.
FORMULA PermAdmissibility-PT-05-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 10171 ms.
FORMULA PermAdmissibility-PT-05-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (((LTLAP0==true))U([]((LTLAP1==true))))U([](<>(<>((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (((LTLAP0==true))U([]((LTLAP1==true))))U([](<>(<>((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, [](([](<>((LTLAP3==true))))U(<>(<>((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, [](([](<>((LTLAP3==true))))U(<>(<>((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>((<>(<>((LTLAP2==true))))U(X((LTLAP3==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 867 ms.
FORMULA PermAdmissibility-PT-05-LTLFireability-05 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ((LTLAP0==true))U(<>([](<>((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ((LTLAP0==true))U(<>([](<>((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ([](((LTLAP3==true))U((LTLAP5==true))))U(<>((LTLAP6==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ([](((LTLAP3==true))U((LTLAP5==true))))U(<>((LTLAP6==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []([](<>((LTLAP7==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 7898 ms.
FORMULA PermAdmissibility-PT-05-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((LTLAP8==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 163749 ms.
FORMULA PermAdmissibility-PT-05-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (((LTLAP9==true))U((LTLAP10==true)))U(<>(X([]((LTLAP11==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1110 ms.
FORMULA PermAdmissibility-PT-05-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ([](<>(<>((LTLAP12==true)))))U([]((LTLAP13==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 7404 ms.
FORMULA PermAdmissibility-PT-05-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, ([]([](X((LTLAP14==true)))))U(<>(<>([]((LTLAP15==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1709 ms.
FORMULA PermAdmissibility-PT-05-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((((LTLAP16==true))U((LTLAP17==true)))U([](<>((LTLAP18==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2033 ms.
FORMULA PermAdmissibility-PT-05-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 6679 ms.
FORMULA PermAdmissibility-PT-05-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X((LTLAP19==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Detected timeout of ITS tools.
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 5 LTL properties
Checking formula 0 : !(((("((((((((((((((((((c12>=1)&&(aux8_7>=1))&&(aux6_1>=1))||(((aux8_7>=1)&&(c12>=1))&&(aux6_4>=1)))||(((aux8_7>=1)&&(c12>=1))&&(aux6_5>=1)))||(((c12>=1)&&(aux8_3>=1))&&(aux6_1>=1)))||(((c12>=1)&&(aux8_3>=1))&&(aux6_4>=1)))||(((aux6_5>=1)&&(c12>=1))&&(aux8_3>=1)))||(((c12>=1)&&(aux8_6>=1))&&(aux6_0>=1)))||(((aux6_1>=1)&&(aux8_6>=1))&&(c12>=1)))||(((aux8_6>=1)&&(c12>=1))&&(aux6_4>=1)))||(((aux6_5>=1)&&(aux8_6>=1))&&(c12>=1)))||(((c12>=1)&&(aux8_7>=1))&&(aux6_0>=1)))||(((aux6_0>=1)&&(c12>=1))&&(aux8_2>=1)))||(((aux6_4>=1)&&(aux8_2>=1))&&(c12>=1)))||(((aux8_2>=1)&&(c12>=1))&&(aux6_1>=1)))||(((aux6_0>=1)&&(c12>=1))&&(aux8_3>=1)))||(((aux8_2>=1)&&(c12>=1))&&(aux6_5>=1)))")U(G("((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((c13>=1)&&(aux11_1>=1))&&(aux9_0>=1))||(((aux9_0>=1)&&(c13>=1))&&(aux11_2>=1)))||(((aux11_3>=1)&&(c13>=1))&&(aux9_0>=1)))||(((aux11_4>=1)&&(c13>=1))&&(aux9_0>=1)))||(((c13>=1)&&(aux11_0>=1))&&(aux9_0>=1)))||(((aux9_5>=1)&&(c13>=1))&&(aux11_3>=1)))||(((c13>=1)&&(aux11_4>=1))&&(aux9_5>=1)))||(((aux11_1>=1)&&(c13>=1))&&(aux9_5>=1)))||(((aux9_5>=1)&&(aux11_2>=1))&&(c13>=1)))||(((c13>=1)&&(aux11_7>=1))&&(aux9_4>=1)))||(((aux9_5>=1)&&(c13>=1))&&(aux11_0>=1)))||(((aux9_4>=1)&&(aux11_5>=1))&&(c13>=1)))||(((aux9_4>=1)&&(c13>=1))&&(aux11_6>=1)))||(((aux11_3>=1)&&(aux9_6>=1))&&(c13>=1)))||(((c13>=1)&&(aux11_4>=1))&&(aux9_6>=1)))||(((c13>=1)&&(aux9_6>=1))&&(aux11_1>=1)))||(((c13>=1)&&(aux9_6>=1))&&(aux11_2>=1)))||(((c13>=1)&&(aux9_5>=1))&&(aux11_7>=1)))||(((aux9_6>=1)&&(aux11_0>=1))&&(c13>=1)))||(((aux9_5>=1)&&(c13>=1))&&(aux11_5>=1)))||(((aux9_5>=1)&&(aux11_6>=1))&&(c13>=1)))||(((aux11_4>=1)&&(c13>=1))&&(aux9_7>=1)))||(((c13>=1)&&(aux11_3>=1))&&(aux9_7>=1)))||(((aux9_7>=1)&&(c13>=1))&&(aux11_2>=1)))||(((c13>=1)&&(aux11_1>=1))&&(aux9_7>=1)))||(((aux9_7>=1)&&(aux11_0>=1))&&(c13>=1)))||(((aux9_6>=1)&&(aux11_7>=1))&&(c13>=1)))||(((aux9_6>=1)&&(aux11_6>=1))&&(c13>=1)))||(((c13>=1)&&(aux11_5>=1))&&(aux9_6>=1)))||(((aux9_7>=1)&&(c13>=1))&&(aux11_7>=1)))||(((c13>=1)&&(aux11_6>=1))&&(aux9_7>=1)))||(((aux9_7>=1)&&(aux11_5>=1))&&(c13>=1)))||(((aux9_1>=1)&&(c13>=1))&&(aux11_1>=1)))||(((aux11_2>=1)&&(aux9_1>=1))&&(c13>=1)))||(((aux9_1>=1)&&(aux11_3>=1))&&(c13>=1)))||(((c13>=1)&&(aux9_1>=1))&&(aux11_4>=1)))||(((aux9_0>=1)&&(aux11_5>=1))&&(c13>=1)))||(((aux11_6>=1)&&(c13>=1))&&(aux9_0>=1)))||(((aux9_0>=1)&&(aux11_7>=1))&&(c13>=1)))||(((aux9_1>=1)&&(c13>=1))&&(aux11_0>=1)))||(((c13>=1)&&(aux9_2>=1))&&(aux11_1>=1)))||(((aux9_2>=1)&&(aux11_2>=1))&&(c13>=1)))||(((c13>=1)&&(aux11_3>=1))&&(aux9_2>=1)))||(((aux9_2>=1)&&(c13>=1))&&(aux11_4>=1)))||(((aux11_5>=1)&&(aux9_1>=1))&&(c13>=1)))||(((c13>=1)&&(aux11_6>=1))&&(aux9_1>=1)))||(((aux11_7>=1)&&(aux9_1>=1))&&(c13>=1)))||(((aux9_2>=1)&&(aux11_0>=1))&&(c13>=1)))||(((c13>=1)&&(aux11_2>=1))&&(aux9_3>=1)))||(((c13>=1)&&(aux11_1>=1))&&(aux9_3>=1)))||(((c13>=1)&&(aux11_4>=1))&&(aux9_3>=1)))||(((c13>=1)&&(aux11_3>=1))&&(aux9_3>=1)))||(((aux11_6>=1)&&(c13>=1))&&(aux9_2>=1)))||(((aux9_2>=1)&&(c13>=1))&&(aux11_5>=1)))||(((c13>=1)&&(aux11_0>=1))&&(aux9_3>=1)))||(((aux11_7>=1)&&(c13>=1))&&(aux9_2>=1)))||(((c13>=1)&&(aux11_2>=1))&&(aux9_4>=1)))||(((aux11_1>=1)&&(aux9_4>=1))&&(c13>=1)))||(((c13>=1)&&(aux9_4>=1))&&(aux11_4>=1)))||(((aux9_4>=1)&&(aux11_3>=1))&&(c13>=1)))||(((c13>=1)&&(aux9_3>=1))&&(aux11_6>=1)))||(((c13>=1)&&(aux11_5>=1))&&(aux9_3>=1)))||(((c13>=1)&&(aux11_0>=1))&&(aux9_4>=1)))||(((c13>=1)&&(aux9_3>=1))&&(aux11_7>=1)))")))U(G(F(F("((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((c15>=1)&&(aux10_0>=1))&&(aux12_0>=1))||(((aux10_0>=1)&&(aux12_4>=1))&&(c15>=1)))||(((aux10_0>=1)&&(aux12_3>=1))&&(c15>=1)))||(((aux10_0>=1)&&(aux12_2>=1))&&(c15>=1)))||(((c15>=1)&&(aux10_0>=1))&&(aux12_1>=1)))||(((aux12_4>=1)&&(c15>=1))&&(aux10_6>=1)))||(((aux12_3>=1)&&(c15>=1))&&(aux10_6>=1)))||(((aux10_6>=1)&&(c15>=1))&&(aux12_2>=1)))||(((aux12_1>=1)&&(aux10_6>=1))&&(c15>=1)))||(((c15>=1)&&(aux10_6>=1))&&(aux12_0>=1)))||(((aux12_7>=1)&&(c15>=1))&&(aux10_5>=1)))||(((c15>=1)&&(aux10_5>=1))&&(aux12_6>=1)))||(((aux10_5>=1)&&(aux12_5>=1))&&(c15>=1)))||(((c15>=1)&&(aux10_5>=1))&&(aux12_4>=1)))||(((aux10_5>=1)&&(aux12_3>=1))&&(c15>=1)))||(((c15>=1)&&(aux12_2>=1))&&(aux10_5>=1)))||(((aux12_1>=1)&&(aux10_5>=1))&&(c15>=1)))||(((aux10_5>=1)&&(aux12_0>=1))&&(c15>=1)))||(((c15>=1)&&(aux10_4>=1))&&(aux12_7>=1)))||(((c15>=1)&&(aux10_4>=1))&&(aux12_6>=1)))||(((c15>=1)&&(aux12_5>=1))&&(aux10_4>=1)))||(((aux10_7>=1)&&(aux12_7>=1))&&(c15>=1)))||(((c15>=1)&&(aux12_5>=1))&&(aux10_7>=1)))||(((aux10_7>=1)&&(aux12_6>=1))&&(c15>=1)))||(((c15>=1)&&(aux10_7>=1))&&(aux12_3>=1)))||(((c15>=1)&&(aux12_4>=1))&&(aux10_7>=1)))||(((c15>=1)&&(aux10_7>=1))&&(aux12_1>=1)))||(((c15>=1)&&(aux10_7>=1))&&(aux12_2>=1)))||(((aux12_7>=1)&&(aux10_6>=1))&&(c15>=1)))||(((aux12_0>=1)&&(aux10_7>=1))&&(c15>=1)))||(((aux12_5>=1)&&(c15>=1))&&(aux10_6>=1)))||(((aux12_6>=1)&&(aux10_6>=1))&&(c15>=1)))||(((aux12_2>=1)&&(aux10_2>=1))&&(c15>=1)))||(((aux12_1>=1)&&(aux10_2>=1))&&(c15>=1)))||(((c15>=1)&&(aux10_2>=1))&&(aux12_4>=1)))||(((c15>=1)&&(aux10_2>=1))&&(aux12_3>=1)))||(((aux12_6>=1)&&(c15>=1))&&(aux10_1>=1)))||(((c15>=1)&&(aux10_1>=1))&&(aux12_5>=1)))||(((aux12_0>=1)&&(aux10_2>=1))&&(c15>=1)))||(((c15>=1)&&(aux10_1>=1))&&(aux12_7>=1)))||(((c15>=1)&&(aux10_1>=1))&&(aux12_2>=1)))||(((c15>=1)&&(aux10_1>=1))&&(aux12_1>=1)))||(((aux10_1>=1)&&(c15>=1))&&(aux12_4>=1)))||(((aux12_3>=1)&&(aux10_1>=1))&&(c15>=1)))||(((aux12_6>=1)&&(aux10_0>=1))&&(c15>=1)))||(((aux12_5>=1)&&(aux10_0>=1))&&(c15>=1)))||(((aux10_1>=1)&&(aux12_0>=1))&&(c15>=1)))||(((aux12_7>=1)&&(aux10_0>=1))&&(c15>=1)))||(((aux12_1>=1)&&(c15>=1))&&(aux10_4>=1)))||(((aux12_2>=1)&&(c15>=1))&&(aux10_4>=1)))||(((aux10_4>=1)&&(c15>=1))&&(aux12_3>=1)))||(((aux10_4>=1)&&(c15>=1))&&(aux12_4>=1)))||(((c15>=1)&&(aux10_3>=1))&&(aux12_5>=1)))||(((aux12_6>=1)&&(aux10_3>=1))&&(c15>=1)))||(((aux12_7>=1)&&(aux10_3>=1))&&(c15>=1)))||(((c15>=1)&&(aux10_4>=1))&&(aux12_0>=1)))||(((c15>=1)&&(aux12_1>=1))&&(aux10_3>=1)))||(((c15>=1)&&(aux12_2>=1))&&(aux10_3>=1)))||(((aux10_3>=1)&&(aux12_3>=1))&&(c15>=1)))||(((c15>=1)&&(aux10_3>=1))&&(aux12_4>=1)))||(((aux10_2>=1)&&(aux12_5>=1))&&(c15>=1)))||(((c15>=1)&&(aux12_6>=1))&&(aux10_2>=1)))||(((c15>=1)&&(aux12_7>=1))&&(aux10_2>=1)))||(((c15>=1)&&(aux12_0>=1))&&(aux10_3>=1)))"))))))
Formula 0 simplified : !(("((((((((((((((((((c12>=1)&&(aux8_7>=1))&&(aux6_1>=1))||(((aux8_7>=1)&&(c12>=1))&&(aux6_4>=1)))||(((aux8_7>=1)&&(c12>=1))&&(aux6_5>=1)))||(((c12>=1)&&(aux8_3>=1))&&(aux6_1>=1)))||(((c12>=1)&&(aux8_3>=1))&&(aux6_4>=1)))||(((aux6_5>=1)&&(c12>=1))&&(aux8_3>=1)))||(((c12>=1)&&(aux8_6>=1))&&(aux6_0>=1)))||(((aux6_1>=1)&&(aux8_6>=1))&&(c12>=1)))||(((aux8_6>=1)&&(c12>=1))&&(aux6_4>=1)))||(((aux6_5>=1)&&(aux8_6>=1))&&(c12>=1)))||(((c12>=1)&&(aux8_7>=1))&&(aux6_0>=1)))||(((aux6_0>=1)&&(c12>=1))&&(aux8_2>=1)))||(((aux6_4>=1)&&(aux8_2>=1))&&(c12>=1)))||(((aux8_2>=1)&&(c12>=1))&&(aux6_1>=1)))||(((aux6_0>=1)&&(c12>=1))&&(aux8_3>=1)))||(((aux8_2>=1)&&(c12>=1))&&(aux6_5>=1)))" U G"((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((c13>=1)&&(aux11_1>=1))&&(aux9_0>=1))||(((aux9_0>=1)&&(c13>=1))&&(aux11_2>=1)))||(((aux11_3>=1)&&(c13>=1))&&(aux9_0>=1)))||(((aux11_4>=1)&&(c13>=1))&&(aux9_0>=1)))||(((c13>=1)&&(aux11_0>=1))&&(aux9_0>=1)))||(((aux9_5>=1)&&(c13>=1))&&(aux11_3>=1)))||(((c13>=1)&&(aux11_4>=1))&&(aux9_5>=1)))||(((aux11_1>=1)&&(c13>=1))&&(aux9_5>=1)))||(((aux9_5>=1)&&(aux11_2>=1))&&(c13>=1)))||(((c13>=1)&&(aux11_7>=1))&&(aux9_4>=1)))||(((aux9_5>=1)&&(c13>=1))&&(aux11_0>=1)))||(((aux9_4>=1)&&(aux11_5>=1))&&(c13>=1)))||(((aux9_4>=1)&&(c13>=1))&&(aux11_6>=1)))||(((aux11_3>=1)&&(aux9_6>=1))&&(c13>=1)))||(((c13>=1)&&(aux11_4>=1))&&(aux9_6>=1)))||(((c13>=1)&&(aux9_6>=1))&&(aux11_1>=1)))||(((c13>=1)&&(aux9_6>=1))&&(aux11_2>=1)))||(((c13>=1)&&(aux9_5>=1))&&(aux11_7>=1)))||(((aux9_6>=1)&&(aux11_0>=1))&&(c13>=1)))||(((aux9_5>=1)&&(c13>=1))&&(aux11_5>=1)))||(((aux9_5>=1)&&(aux11_6>=1))&&(c13>=1)))||(((aux11_4>=1)&&(c13>=1))&&(aux9_7>=1)))||(((c13>=1)&&(aux11_3>=1))&&(aux9_7>=1)))||(((aux9_7>=1)&&(c13>=1))&&(aux11_2>=1)))||(((c13>=1)&&(aux11_1>=1))&&(aux9_7>=1)))||(((aux9_7>=1)&&(aux11_0>=1))&&(c13>=1)))||(((aux9_6>=1)&&(aux11_7>=1))&&(c13>=1)))||(((aux9_6>=1)&&(aux11_6>=1))&&(c13>=1)))||(((c13>=1)&&(aux11_5>=1))&&(aux9_6>=1)))||(((aux9_7>=1)&&(c13>=1))&&(aux11_7>=1)))||(((c13>=1)&&(aux11_6>=1))&&(aux9_7>=1)))||(((aux9_7>=1)&&(aux11_5>=1))&&(c13>=1)))||(((aux9_1>=1)&&(c13>=1))&&(aux11_1>=1)))||(((aux11_2>=1)&&(aux9_1>=1))&&(c13>=1)))||(((aux9_1>=1)&&(aux11_3>=1))&&(c13>=1)))||(((c13>=1)&&(aux9_1>=1))&&(aux11_4>=1)))||(((aux9_0>=1)&&(aux11_5>=1))&&(c13>=1)))||(((aux11_6>=1)&&(c13>=1))&&(aux9_0>=1)))||(((aux9_0>=1)&&(aux11_7>=1))&&(c13>=1)))||(((aux9_1>=1)&&(c13>=1))&&(aux11_0>=1)))||(((c13>=1)&&(aux9_2>=1))&&(aux11_1>=1)))||(((aux9_2>=1)&&(aux11_2>=1))&&(c13>=1)))||(((c13>=1)&&(aux11_3>=1))&&(aux9_2>=1)))||(((aux9_2>=1)&&(c13>=1))&&(aux11_4>=1)))||(((aux11_5>=1)&&(aux9_1>=1))&&(c13>=1)))||(((c13>=1)&&(aux11_6>=1))&&(aux9_1>=1)))||(((aux11_7>=1)&&(aux9_1>=1))&&(c13>=1)))||(((aux9_2>=1)&&(aux11_0>=1))&&(c13>=1)))||(((c13>=1)&&(aux11_2>=1))&&(aux9_3>=1)))||(((c13>=1)&&(aux11_1>=1))&&(aux9_3>=1)))||(((c13>=1)&&(aux11_4>=1))&&(aux9_3>=1)))||(((c13>=1)&&(aux11_3>=1))&&(aux9_3>=1)))||(((aux11_6>=1)&&(c13>=1))&&(aux9_2>=1)))||(((aux9_2>=1)&&(c13>=1))&&(aux11_5>=1)))||(((c13>=1)&&(aux11_0>=1))&&(aux9_3>=1)))||(((aux11_7>=1)&&(c13>=1))&&(aux9_2>=1)))||(((c13>=1)&&(aux11_2>=1))&&(aux9_4>=1)))||(((aux11_1>=1)&&(aux9_4>=1))&&(c13>=1)))||(((c13>=1)&&(aux9_4>=1))&&(aux11_4>=1)))||(((aux9_4>=1)&&(aux11_3>=1))&&(c13>=1)))||(((c13>=1)&&(aux9_3>=1))&&(aux11_6>=1)))||(((c13>=1)&&(aux11_5>=1))&&(aux9_3>=1)))||(((c13>=1)&&(aux11_0>=1))&&(aux9_4>=1)))||(((c13>=1)&&(aux9_3>=1))&&(aux11_7>=1)))") U GF"((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((c15>=1)&&(aux10_0>=1))&&(aux12_0>=1))||(((aux10_0>=1)&&(aux12_4>=1))&&(c15>=1)))||(((aux10_0>=1)&&(aux12_3>=1))&&(c15>=1)))||(((aux10_0>=1)&&(aux12_2>=1))&&(c15>=1)))||(((c15>=1)&&(aux10_0>=1))&&(aux12_1>=1)))||(((aux12_4>=1)&&(c15>=1))&&(aux10_6>=1)))||(((aux12_3>=1)&&(c15>=1))&&(aux10_6>=1)))||(((aux10_6>=1)&&(c15>=1))&&(aux12_2>=1)))||(((aux12_1>=1)&&(aux10_6>=1))&&(c15>=1)))||(((c15>=1)&&(aux10_6>=1))&&(aux12_0>=1)))||(((aux12_7>=1)&&(c15>=1))&&(aux10_5>=1)))||(((c15>=1)&&(aux10_5>=1))&&(aux12_6>=1)))||(((aux10_5>=1)&&(aux12_5>=1))&&(c15>=1)))||(((c15>=1)&&(aux10_5>=1))&&(aux12_4>=1)))||(((aux10_5>=1)&&(aux12_3>=1))&&(c15>=1)))||(((c15>=1)&&(aux12_2>=1))&&(aux10_5>=1)))||(((aux12_1>=1)&&(aux10_5>=1))&&(c15>=1)))||(((aux10_5>=1)&&(aux12_0>=1))&&(c15>=1)))||(((c15>=1)&&(aux10_4>=1))&&(aux12_7>=1)))||(((c15>=1)&&(aux10_4>=1))&&(aux12_6>=1)))||(((c15>=1)&&(aux12_5>=1))&&(aux10_4>=1)))||(((aux10_7>=1)&&(aux12_7>=1))&&(c15>=1)))||(((c15>=1)&&(aux12_5>=1))&&(aux10_7>=1)))||(((aux10_7>=1)&&(aux12_6>=1))&&(c15>=1)))||(((c15>=1)&&(aux10_7>=1))&&(aux12_3>=1)))||(((c15>=1)&&(aux12_4>=1))&&(aux10_7>=1)))||(((c15>=1)&&(aux10_7>=1))&&(aux12_1>=1)))||(((c15>=1)&&(aux10_7>=1))&&(aux12_2>=1)))||(((aux12_7>=1)&&(aux10_6>=1))&&(c15>=1)))||(((aux12_0>=1)&&(aux10_7>=1))&&(c15>=1)))||(((aux12_5>=1)&&(c15>=1))&&(aux10_6>=1)))||(((aux12_6>=1)&&(aux10_6>=1))&&(c15>=1)))||(((aux12_2>=1)&&(aux10_2>=1))&&(c15>=1)))||(((aux12_1>=1)&&(aux10_2>=1))&&(c15>=1)))||(((c15>=1)&&(aux10_2>=1))&&(aux12_4>=1)))||(((c15>=1)&&(aux10_2>=1))&&(aux12_3>=1)))||(((aux12_6>=1)&&(c15>=1))&&(aux10_1>=1)))||(((c15>=1)&&(aux10_1>=1))&&(aux12_5>=1)))||(((aux12_0>=1)&&(aux10_2>=1))&&(c15>=1)))||(((c15>=1)&&(aux10_1>=1))&&(aux12_7>=1)))||(((c15>=1)&&(aux10_1>=1))&&(aux12_2>=1)))||(((c15>=1)&&(aux10_1>=1))&&(aux12_1>=1)))||(((aux10_1>=1)&&(c15>=1))&&(aux12_4>=1)))||(((aux12_3>=1)&&(aux10_1>=1))&&(c15>=1)))||(((aux12_6>=1)&&(aux10_0>=1))&&(c15>=1)))||(((aux12_5>=1)&&(aux10_0>=1))&&(c15>=1)))||(((aux10_1>=1)&&(aux12_0>=1))&&(c15>=1)))||(((aux12_7>=1)&&(aux10_0>=1))&&(c15>=1)))||(((aux12_1>=1)&&(c15>=1))&&(aux10_4>=1)))||(((aux12_2>=1)&&(c15>=1))&&(aux10_4>=1)))||(((aux10_4>=1)&&(c15>=1))&&(aux12_3>=1)))||(((aux10_4>=1)&&(c15>=1))&&(aux12_4>=1)))||(((c15>=1)&&(aux10_3>=1))&&(aux12_5>=1)))||(((aux12_6>=1)&&(aux10_3>=1))&&(c15>=1)))||(((aux12_7>=1)&&(aux10_3>=1))&&(c15>=1)))||(((c15>=1)&&(aux10_4>=1))&&(aux12_0>=1)))||(((c15>=1)&&(aux12_1>=1))&&(aux10_3>=1)))||(((c15>=1)&&(aux12_2>=1))&&(aux10_3>=1)))||(((aux10_3>=1)&&(aux12_3>=1))&&(c15>=1)))||(((c15>=1)&&(aux10_3>=1))&&(aux12_4>=1)))||(((aux10_2>=1)&&(aux12_5>=1))&&(c15>=1)))||(((c15>=1)&&(aux12_6>=1))&&(aux10_2>=1)))||(((c15>=1)&&(aux12_7>=1))&&(aux10_2>=1)))||(((c15>=1)&&(aux12_0>=1))&&(aux10_3>=1)))")
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X((LTLAP19==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (((LTLAP0==true))U([]((LTLAP1==true))))U([](<>(<>((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Detected timeout of ITS tools.
Converted graph to binary with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201903251645/bin/convert-linux64, -i, /tmp/graph4906389522841863411.txt, -o, /tmp/graph4906389522841863411.bin, -w, /tmp/graph4906389522841863411.weights], workingDir=null]
Built communities with : CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.louvain.binaries_1.0.0.201903251645/bin/louvain-linux64, /tmp/graph4906389522841863411.bin, -l, -1, -v, -w, /tmp/graph4906389522841863411.weights, -q, 0, -e, 0.001], workingDir=null]
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 5 LTL properties
Checking formula 0 : !(((("((((((((((((((((((u3.c12>=1)&&(u3.aux8_7>=1))&&(u3.aux6_1>=1))||(((u3.aux8_7>=1)&&(u3.c12>=1))&&(u3.aux6_4>=1)))||(((u3.aux8_7>=1)&&(u3.c12>=1))&&(u3.aux6_5>=1)))||(((u3.c12>=1)&&(u3.aux8_3>=1))&&(u3.aux6_1>=1)))||(((u3.c12>=1)&&(u3.aux8_3>=1))&&(u3.aux6_4>=1)))||(((u3.aux6_5>=1)&&(u3.c12>=1))&&(u3.aux8_3>=1)))||(((u3.c12>=1)&&(u3.aux8_6>=1))&&(u3.aux6_0>=1)))||(((u3.aux6_1>=1)&&(u3.aux8_6>=1))&&(u3.c12>=1)))||(((u3.aux8_6>=1)&&(u3.c12>=1))&&(u3.aux6_4>=1)))||(((u3.aux6_5>=1)&&(u3.aux8_6>=1))&&(u3.c12>=1)))||(((u3.c12>=1)&&(u3.aux8_7>=1))&&(u3.aux6_0>=1)))||(((u3.aux6_0>=1)&&(u3.c12>=1))&&(u3.aux8_2>=1)))||(((u3.aux6_4>=1)&&(u3.aux8_2>=1))&&(u3.c12>=1)))||(((u3.aux8_2>=1)&&(u3.c12>=1))&&(u3.aux6_1>=1)))||(((u3.aux6_0>=1)&&(u3.c12>=1))&&(u3.aux8_3>=1)))||(((u3.aux8_2>=1)&&(u3.c12>=1))&&(u3.aux6_5>=1)))")U(G("((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((u2.c13>=1)&&(u4.aux11_1>=1))&&(u4.aux9_0>=1))||(((u4.aux9_0>=1)&&(u2.c13>=1))&&(u4.aux11_2>=1)))||(((u4.aux11_3>=1)&&(u2.c13>=1))&&(u4.aux9_0>=1)))||(((u4.aux11_4>=1)&&(u2.c13>=1))&&(u4.aux9_0>=1)))||(((u2.c13>=1)&&(u4.aux11_0>=1))&&(u4.aux9_0>=1)))||(((u4.aux9_5>=1)&&(u2.c13>=1))&&(u4.aux11_3>=1)))||(((u2.c13>=1)&&(u4.aux11_4>=1))&&(u4.aux9_5>=1)))||(((u4.aux11_1>=1)&&(u2.c13>=1))&&(u4.aux9_5>=1)))||(((u4.aux9_5>=1)&&(u4.aux11_2>=1))&&(u2.c13>=1)))||(((u2.c13>=1)&&(u4.aux11_7>=1))&&(u4.aux9_4>=1)))||(((u4.aux9_5>=1)&&(u2.c13>=1))&&(u4.aux11_0>=1)))||(((u4.aux9_4>=1)&&(u4.aux11_5>=1))&&(u2.c13>=1)))||(((u4.aux9_4>=1)&&(u2.c13>=1))&&(u4.aux11_6>=1)))||(((u4.aux11_3>=1)&&(u4.aux9_6>=1))&&(u2.c13>=1)))||(((u2.c13>=1)&&(u4.aux11_4>=1))&&(u4.aux9_6>=1)))||(((u2.c13>=1)&&(u4.aux9_6>=1))&&(u4.aux11_1>=1)))||(((u2.c13>=1)&&(u4.aux9_6>=1))&&(u4.aux11_2>=1)))||(((u2.c13>=1)&&(u4.aux9_5>=1))&&(u4.aux11_7>=1)))||(((u4.aux9_6>=1)&&(u4.aux11_0>=1))&&(u2.c13>=1)))||(((u4.aux9_5>=1)&&(u2.c13>=1))&&(u4.aux11_5>=1)))||(((u4.aux9_5>=1)&&(u4.aux11_6>=1))&&(u2.c13>=1)))||(((u4.aux11_4>=1)&&(u2.c13>=1))&&(u4.aux9_7>=1)))||(((u2.c13>=1)&&(u4.aux11_3>=1))&&(u4.aux9_7>=1)))||(((u4.aux9_7>=1)&&(u2.c13>=1))&&(u4.aux11_2>=1)))||(((u2.c13>=1)&&(u4.aux11_1>=1))&&(u4.aux9_7>=1)))||(((u4.aux9_7>=1)&&(u4.aux11_0>=1))&&(u2.c13>=1)))||(((u4.aux9_6>=1)&&(u4.aux11_7>=1))&&(u2.c13>=1)))||(((u4.aux9_6>=1)&&(u4.aux11_6>=1))&&(u2.c13>=1)))||(((u2.c13>=1)&&(u4.aux11_5>=1))&&(u4.aux9_6>=1)))||(((u4.aux9_7>=1)&&(u2.c13>=1))&&(u4.aux11_7>=1)))||(((u2.c13>=1)&&(u4.aux11_6>=1))&&(u4.aux9_7>=1)))||(((u4.aux9_7>=1)&&(u4.aux11_5>=1))&&(u2.c13>=1)))||(((u4.aux9_1>=1)&&(u2.c13>=1))&&(u4.aux11_1>=1)))||(((u4.aux11_2>=1)&&(u4.aux9_1>=1))&&(u2.c13>=1)))||(((u4.aux9_1>=1)&&(u4.aux11_3>=1))&&(u2.c13>=1)))||(((u2.c13>=1)&&(u4.aux9_1>=1))&&(u4.aux11_4>=1)))||(((u4.aux9_0>=1)&&(u4.aux11_5>=1))&&(u2.c13>=1)))||(((u4.aux11_6>=1)&&(u2.c13>=1))&&(u4.aux9_0>=1)))||(((u4.aux9_0>=1)&&(u4.aux11_7>=1))&&(u2.c13>=1)))||(((u4.aux9_1>=1)&&(u2.c13>=1))&&(u4.aux11_0>=1)))||(((u2.c13>=1)&&(u4.aux9_2>=1))&&(u4.aux11_1>=1)))||(((u4.aux9_2>=1)&&(u4.aux11_2>=1))&&(u2.c13>=1)))||(((u2.c13>=1)&&(u4.aux11_3>=1))&&(u4.aux9_2>=1)))||(((u4.aux9_2>=1)&&(u2.c13>=1))&&(u4.aux11_4>=1)))||(((u4.aux11_5>=1)&&(u4.aux9_1>=1))&&(u2.c13>=1)))||(((u2.c13>=1)&&(u4.aux11_6>=1))&&(u4.aux9_1>=1)))||(((u4.aux11_7>=1)&&(u4.aux9_1>=1))&&(u2.c13>=1)))||(((u4.aux9_2>=1)&&(u4.aux11_0>=1))&&(u2.c13>=1)))||(((u2.c13>=1)&&(u4.aux11_2>=1))&&(u4.aux9_3>=1)))||(((u2.c13>=1)&&(u4.aux11_1>=1))&&(u4.aux9_3>=1)))||(((u2.c13>=1)&&(u4.aux11_4>=1))&&(u4.aux9_3>=1)))||(((u2.c13>=1)&&(u4.aux11_3>=1))&&(u4.aux9_3>=1)))||(((u4.aux11_6>=1)&&(u2.c13>=1))&&(u4.aux9_2>=1)))||(((u4.aux9_2>=1)&&(u2.c13>=1))&&(u4.aux11_5>=1)))||(((u2.c13>=1)&&(u4.aux11_0>=1))&&(u4.aux9_3>=1)))||(((u4.aux11_7>=1)&&(u2.c13>=1))&&(u4.aux9_2>=1)))||(((u2.c13>=1)&&(u4.aux11_2>=1))&&(u4.aux9_4>=1)))||(((u4.aux11_1>=1)&&(u4.aux9_4>=1))&&(u2.c13>=1)))||(((u2.c13>=1)&&(u4.aux9_4>=1))&&(u4.aux11_4>=1)))||(((u4.aux9_4>=1)&&(u4.aux11_3>=1))&&(u2.c13>=1)))||(((u2.c13>=1)&&(u4.aux9_3>=1))&&(u4.aux11_6>=1)))||(((u2.c13>=1)&&(u4.aux11_5>=1))&&(u4.aux9_3>=1)))||(((u2.c13>=1)&&(u4.aux11_0>=1))&&(u4.aux9_4>=1)))||(((u2.c13>=1)&&(u4.aux9_3>=1))&&(u4.aux11_7>=1)))")))U(G(F(F("((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((u4.c15>=1)&&(u1.aux10_0>=1))&&(u1.aux12_0>=1))||(((u1.aux10_0>=1)&&(u1.aux12_4>=1))&&(u4.c15>=1)))||(((u1.aux10_0>=1)&&(u1.aux12_3>=1))&&(u4.c15>=1)))||(((u1.aux10_0>=1)&&(u1.aux12_2>=1))&&(u4.c15>=1)))||(((u4.c15>=1)&&(u1.aux10_0>=1))&&(u1.aux12_1>=1)))||(((u1.aux12_4>=1)&&(u4.c15>=1))&&(u1.aux10_6>=1)))||(((u1.aux12_3>=1)&&(u4.c15>=1))&&(u1.aux10_6>=1)))||(((u1.aux10_6>=1)&&(u4.c15>=1))&&(u1.aux12_2>=1)))||(((u1.aux12_1>=1)&&(u1.aux10_6>=1))&&(u4.c15>=1)))||(((u4.c15>=1)&&(u1.aux10_6>=1))&&(u1.aux12_0>=1)))||(((u1.aux12_7>=1)&&(u4.c15>=1))&&(u1.aux10_5>=1)))||(((u4.c15>=1)&&(u1.aux10_5>=1))&&(u1.aux12_6>=1)))||(((u1.aux10_5>=1)&&(u1.aux12_5>=1))&&(u4.c15>=1)))||(((u4.c15>=1)&&(u1.aux10_5>=1))&&(u1.aux12_4>=1)))||(((u1.aux10_5>=1)&&(u1.aux12_3>=1))&&(u4.c15>=1)))||(((u4.c15>=1)&&(u1.aux12_2>=1))&&(u1.aux10_5>=1)))||(((u1.aux12_1>=1)&&(u1.aux10_5>=1))&&(u4.c15>=1)))||(((u1.aux10_5>=1)&&(u1.aux12_0>=1))&&(u4.c15>=1)))||(((u4.c15>=1)&&(u1.aux10_4>=1))&&(u1.aux12_7>=1)))||(((u4.c15>=1)&&(u1.aux10_4>=1))&&(u1.aux12_6>=1)))||(((u4.c15>=1)&&(u1.aux12_5>=1))&&(u1.aux10_4>=1)))||(((u1.aux10_7>=1)&&(u1.aux12_7>=1))&&(u4.c15>=1)))||(((u4.c15>=1)&&(u1.aux12_5>=1))&&(u1.aux10_7>=1)))||(((u1.aux10_7>=1)&&(u1.aux12_6>=1))&&(u4.c15>=1)))||(((u4.c15>=1)&&(u1.aux10_7>=1))&&(u1.aux12_3>=1)))||(((u4.c15>=1)&&(u1.aux12_4>=1))&&(u1.aux10_7>=1)))||(((u4.c15>=1)&&(u1.aux10_7>=1))&&(u1.aux12_1>=1)))||(((u4.c15>=1)&&(u1.aux10_7>=1))&&(u1.aux12_2>=1)))||(((u1.aux12_7>=1)&&(u1.aux10_6>=1))&&(u4.c15>=1)))||(((u1.aux12_0>=1)&&(u1.aux10_7>=1))&&(u4.c15>=1)))||(((u1.aux12_5>=1)&&(u4.c15>=1))&&(u1.aux10_6>=1)))||(((u1.aux12_6>=1)&&(u1.aux10_6>=1))&&(u4.c15>=1)))||(((u1.aux12_2>=1)&&(u1.aux10_2>=1))&&(u4.c15>=1)))||(((u1.aux12_1>=1)&&(u1.aux10_2>=1))&&(u4.c15>=1)))||(((u4.c15>=1)&&(u1.aux10_2>=1))&&(u1.aux12_4>=1)))||(((u4.c15>=1)&&(u1.aux10_2>=1))&&(u1.aux12_3>=1)))||(((u1.aux12_6>=1)&&(u4.c15>=1))&&(u1.aux10_1>=1)))||(((u4.c15>=1)&&(u1.aux10_1>=1))&&(u1.aux12_5>=1)))||(((u1.aux12_0>=1)&&(u1.aux10_2>=1))&&(u4.c15>=1)))||(((u4.c15>=1)&&(u1.aux10_1>=1))&&(u1.aux12_7>=1)))||(((u4.c15>=1)&&(u1.aux10_1>=1))&&(u1.aux12_2>=1)))||(((u4.c15>=1)&&(u1.aux10_1>=1))&&(u1.aux12_1>=1)))||(((u1.aux10_1>=1)&&(u4.c15>=1))&&(u1.aux12_4>=1)))||(((u1.aux12_3>=1)&&(u1.aux10_1>=1))&&(u4.c15>=1)))||(((u1.aux12_6>=1)&&(u1.aux10_0>=1))&&(u4.c15>=1)))||(((u1.aux12_5>=1)&&(u1.aux10_0>=1))&&(u4.c15>=1)))||(((u1.aux10_1>=1)&&(u1.aux12_0>=1))&&(u4.c15>=1)))||(((u1.aux12_7>=1)&&(u1.aux10_0>=1))&&(u4.c15>=1)))||(((u1.aux12_1>=1)&&(u4.c15>=1))&&(u1.aux10_4>=1)))||(((u1.aux12_2>=1)&&(u4.c15>=1))&&(u1.aux10_4>=1)))||(((u1.aux10_4>=1)&&(u4.c15>=1))&&(u1.aux12_3>=1)))||(((u1.aux10_4>=1)&&(u4.c15>=1))&&(u1.aux12_4>=1)))||(((u4.c15>=1)&&(u1.aux10_3>=1))&&(u1.aux12_5>=1)))||(((u1.aux12_6>=1)&&(u1.aux10_3>=1))&&(u4.c15>=1)))||(((u1.aux12_7>=1)&&(u1.aux10_3>=1))&&(u4.c15>=1)))||(((u4.c15>=1)&&(u1.aux10_4>=1))&&(u1.aux12_0>=1)))||(((u4.c15>=1)&&(u1.aux12_1>=1))&&(u1.aux10_3>=1)))||(((u4.c15>=1)&&(u1.aux12_2>=1))&&(u1.aux10_3>=1)))||(((u1.aux10_3>=1)&&(u1.aux12_3>=1))&&(u4.c15>=1)))||(((u4.c15>=1)&&(u1.aux10_3>=1))&&(u1.aux12_4>=1)))||(((u1.aux10_2>=1)&&(u1.aux12_5>=1))&&(u4.c15>=1)))||(((u4.c15>=1)&&(u1.aux12_6>=1))&&(u1.aux10_2>=1)))||(((u4.c15>=1)&&(u1.aux12_7>=1))&&(u1.aux10_2>=1)))||(((u4.c15>=1)&&(u1.aux12_0>=1))&&(u1.aux10_3>=1)))"))))))
Formula 0 simplified : !(("((((((((((((((((((u3.c12>=1)&&(u3.aux8_7>=1))&&(u3.aux6_1>=1))||(((u3.aux8_7>=1)&&(u3.c12>=1))&&(u3.aux6_4>=1)))||(((u3.aux8_7>=1)&&(u3.c12>=1))&&(u3.aux6_5>=1)))||(((u3.c12>=1)&&(u3.aux8_3>=1))&&(u3.aux6_1>=1)))||(((u3.c12>=1)&&(u3.aux8_3>=1))&&(u3.aux6_4>=1)))||(((u3.aux6_5>=1)&&(u3.c12>=1))&&(u3.aux8_3>=1)))||(((u3.c12>=1)&&(u3.aux8_6>=1))&&(u3.aux6_0>=1)))||(((u3.aux6_1>=1)&&(u3.aux8_6>=1))&&(u3.c12>=1)))||(((u3.aux8_6>=1)&&(u3.c12>=1))&&(u3.aux6_4>=1)))||(((u3.aux6_5>=1)&&(u3.aux8_6>=1))&&(u3.c12>=1)))||(((u3.c12>=1)&&(u3.aux8_7>=1))&&(u3.aux6_0>=1)))||(((u3.aux6_0>=1)&&(u3.c12>=1))&&(u3.aux8_2>=1)))||(((u3.aux6_4>=1)&&(u3.aux8_2>=1))&&(u3.c12>=1)))||(((u3.aux8_2>=1)&&(u3.c12>=1))&&(u3.aux6_1>=1)))||(((u3.aux6_0>=1)&&(u3.c12>=1))&&(u3.aux8_3>=1)))||(((u3.aux8_2>=1)&&(u3.c12>=1))&&(u3.aux6_5>=1)))" U G"((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((u2.c13>=1)&&(u4.aux11_1>=1))&&(u4.aux9_0>=1))||(((u4.aux9_0>=1)&&(u2.c13>=1))&&(u4.aux11_2>=1)))||(((u4.aux11_3>=1)&&(u2.c13>=1))&&(u4.aux9_0>=1)))||(((u4.aux11_4>=1)&&(u2.c13>=1))&&(u4.aux9_0>=1)))||(((u2.c13>=1)&&(u4.aux11_0>=1))&&(u4.aux9_0>=1)))||(((u4.aux9_5>=1)&&(u2.c13>=1))&&(u4.aux11_3>=1)))||(((u2.c13>=1)&&(u4.aux11_4>=1))&&(u4.aux9_5>=1)))||(((u4.aux11_1>=1)&&(u2.c13>=1))&&(u4.aux9_5>=1)))||(((u4.aux9_5>=1)&&(u4.aux11_2>=1))&&(u2.c13>=1)))||(((u2.c13>=1)&&(u4.aux11_7>=1))&&(u4.aux9_4>=1)))||(((u4.aux9_5>=1)&&(u2.c13>=1))&&(u4.aux11_0>=1)))||(((u4.aux9_4>=1)&&(u4.aux11_5>=1))&&(u2.c13>=1)))||(((u4.aux9_4>=1)&&(u2.c13>=1))&&(u4.aux11_6>=1)))||(((u4.aux11_3>=1)&&(u4.aux9_6>=1))&&(u2.c13>=1)))||(((u2.c13>=1)&&(u4.aux11_4>=1))&&(u4.aux9_6>=1)))||(((u2.c13>=1)&&(u4.aux9_6>=1))&&(u4.aux11_1>=1)))||(((u2.c13>=1)&&(u4.aux9_6>=1))&&(u4.aux11_2>=1)))||(((u2.c13>=1)&&(u4.aux9_5>=1))&&(u4.aux11_7>=1)))||(((u4.aux9_6>=1)&&(u4.aux11_0>=1))&&(u2.c13>=1)))||(((u4.aux9_5>=1)&&(u2.c13>=1))&&(u4.aux11_5>=1)))||(((u4.aux9_5>=1)&&(u4.aux11_6>=1))&&(u2.c13>=1)))||(((u4.aux11_4>=1)&&(u2.c13>=1))&&(u4.aux9_7>=1)))||(((u2.c13>=1)&&(u4.aux11_3>=1))&&(u4.aux9_7>=1)))||(((u4.aux9_7>=1)&&(u2.c13>=1))&&(u4.aux11_2>=1)))||(((u2.c13>=1)&&(u4.aux11_1>=1))&&(u4.aux9_7>=1)))||(((u4.aux9_7>=1)&&(u4.aux11_0>=1))&&(u2.c13>=1)))||(((u4.aux9_6>=1)&&(u4.aux11_7>=1))&&(u2.c13>=1)))||(((u4.aux9_6>=1)&&(u4.aux11_6>=1))&&(u2.c13>=1)))||(((u2.c13>=1)&&(u4.aux11_5>=1))&&(u4.aux9_6>=1)))||(((u4.aux9_7>=1)&&(u2.c13>=1))&&(u4.aux11_7>=1)))||(((u2.c13>=1)&&(u4.aux11_6>=1))&&(u4.aux9_7>=1)))||(((u4.aux9_7>=1)&&(u4.aux11_5>=1))&&(u2.c13>=1)))||(((u4.aux9_1>=1)&&(u2.c13>=1))&&(u4.aux11_1>=1)))||(((u4.aux11_2>=1)&&(u4.aux9_1>=1))&&(u2.c13>=1)))||(((u4.aux9_1>=1)&&(u4.aux11_3>=1))&&(u2.c13>=1)))||(((u2.c13>=1)&&(u4.aux9_1>=1))&&(u4.aux11_4>=1)))||(((u4.aux9_0>=1)&&(u4.aux11_5>=1))&&(u2.c13>=1)))||(((u4.aux11_6>=1)&&(u2.c13>=1))&&(u4.aux9_0>=1)))||(((u4.aux9_0>=1)&&(u4.aux11_7>=1))&&(u2.c13>=1)))||(((u4.aux9_1>=1)&&(u2.c13>=1))&&(u4.aux11_0>=1)))||(((u2.c13>=1)&&(u4.aux9_2>=1))&&(u4.aux11_1>=1)))||(((u4.aux9_2>=1)&&(u4.aux11_2>=1))&&(u2.c13>=1)))||(((u2.c13>=1)&&(u4.aux11_3>=1))&&(u4.aux9_2>=1)))||(((u4.aux9_2>=1)&&(u2.c13>=1))&&(u4.aux11_4>=1)))||(((u4.aux11_5>=1)&&(u4.aux9_1>=1))&&(u2.c13>=1)))||(((u2.c13>=1)&&(u4.aux11_6>=1))&&(u4.aux9_1>=1)))||(((u4.aux11_7>=1)&&(u4.aux9_1>=1))&&(u2.c13>=1)))||(((u4.aux9_2>=1)&&(u4.aux11_0>=1))&&(u2.c13>=1)))||(((u2.c13>=1)&&(u4.aux11_2>=1))&&(u4.aux9_3>=1)))||(((u2.c13>=1)&&(u4.aux11_1>=1))&&(u4.aux9_3>=1)))||(((u2.c13>=1)&&(u4.aux11_4>=1))&&(u4.aux9_3>=1)))||(((u2.c13>=1)&&(u4.aux11_3>=1))&&(u4.aux9_3>=1)))||(((u4.aux11_6>=1)&&(u2.c13>=1))&&(u4.aux9_2>=1)))||(((u4.aux9_2>=1)&&(u2.c13>=1))&&(u4.aux11_5>=1)))||(((u2.c13>=1)&&(u4.aux11_0>=1))&&(u4.aux9_3>=1)))||(((u4.aux11_7>=1)&&(u2.c13>=1))&&(u4.aux9_2>=1)))||(((u2.c13>=1)&&(u4.aux11_2>=1))&&(u4.aux9_4>=1)))||(((u4.aux11_1>=1)&&(u4.aux9_4>=1))&&(u2.c13>=1)))||(((u2.c13>=1)&&(u4.aux9_4>=1))&&(u4.aux11_4>=1)))||(((u4.aux9_4>=1)&&(u4.aux11_3>=1))&&(u2.c13>=1)))||(((u2.c13>=1)&&(u4.aux9_3>=1))&&(u4.aux11_6>=1)))||(((u2.c13>=1)&&(u4.aux11_5>=1))&&(u4.aux9_3>=1)))||(((u2.c13>=1)&&(u4.aux11_0>=1))&&(u4.aux9_4>=1)))||(((u2.c13>=1)&&(u4.aux9_3>=1))&&(u4.aux11_7>=1)))") U GF"((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((u4.c15>=1)&&(u1.aux10_0>=1))&&(u1.aux12_0>=1))||(((u1.aux10_0>=1)&&(u1.aux12_4>=1))&&(u4.c15>=1)))||(((u1.aux10_0>=1)&&(u1.aux12_3>=1))&&(u4.c15>=1)))||(((u1.aux10_0>=1)&&(u1.aux12_2>=1))&&(u4.c15>=1)))||(((u4.c15>=1)&&(u1.aux10_0>=1))&&(u1.aux12_1>=1)))||(((u1.aux12_4>=1)&&(u4.c15>=1))&&(u1.aux10_6>=1)))||(((u1.aux12_3>=1)&&(u4.c15>=1))&&(u1.aux10_6>=1)))||(((u1.aux10_6>=1)&&(u4.c15>=1))&&(u1.aux12_2>=1)))||(((u1.aux12_1>=1)&&(u1.aux10_6>=1))&&(u4.c15>=1)))||(((u4.c15>=1)&&(u1.aux10_6>=1))&&(u1.aux12_0>=1)))||(((u1.aux12_7>=1)&&(u4.c15>=1))&&(u1.aux10_5>=1)))||(((u4.c15>=1)&&(u1.aux10_5>=1))&&(u1.aux12_6>=1)))||(((u1.aux10_5>=1)&&(u1.aux12_5>=1))&&(u4.c15>=1)))||(((u4.c15>=1)&&(u1.aux10_5>=1))&&(u1.aux12_4>=1)))||(((u1.aux10_5>=1)&&(u1.aux12_3>=1))&&(u4.c15>=1)))||(((u4.c15>=1)&&(u1.aux12_2>=1))&&(u1.aux10_5>=1)))||(((u1.aux12_1>=1)&&(u1.aux10_5>=1))&&(u4.c15>=1)))||(((u1.aux10_5>=1)&&(u1.aux12_0>=1))&&(u4.c15>=1)))||(((u4.c15>=1)&&(u1.aux10_4>=1))&&(u1.aux12_7>=1)))||(((u4.c15>=1)&&(u1.aux10_4>=1))&&(u1.aux12_6>=1)))||(((u4.c15>=1)&&(u1.aux12_5>=1))&&(u1.aux10_4>=1)))||(((u1.aux10_7>=1)&&(u1.aux12_7>=1))&&(u4.c15>=1)))||(((u4.c15>=1)&&(u1.aux12_5>=1))&&(u1.aux10_7>=1)))||(((u1.aux10_7>=1)&&(u1.aux12_6>=1))&&(u4.c15>=1)))||(((u4.c15>=1)&&(u1.aux10_7>=1))&&(u1.aux12_3>=1)))||(((u4.c15>=1)&&(u1.aux12_4>=1))&&(u1.aux10_7>=1)))||(((u4.c15>=1)&&(u1.aux10_7>=1))&&(u1.aux12_1>=1)))||(((u4.c15>=1)&&(u1.aux10_7>=1))&&(u1.aux12_2>=1)))||(((u1.aux12_7>=1)&&(u1.aux10_6>=1))&&(u4.c15>=1)))||(((u1.aux12_0>=1)&&(u1.aux10_7>=1))&&(u4.c15>=1)))||(((u1.aux12_5>=1)&&(u4.c15>=1))&&(u1.aux10_6>=1)))||(((u1.aux12_6>=1)&&(u1.aux10_6>=1))&&(u4.c15>=1)))||(((u1.aux12_2>=1)&&(u1.aux10_2>=1))&&(u4.c15>=1)))||(((u1.aux12_1>=1)&&(u1.aux10_2>=1))&&(u4.c15>=1)))||(((u4.c15>=1)&&(u1.aux10_2>=1))&&(u1.aux12_4>=1)))||(((u4.c15>=1)&&(u1.aux10_2>=1))&&(u1.aux12_3>=1)))||(((u1.aux12_6>=1)&&(u4.c15>=1))&&(u1.aux10_1>=1)))||(((u4.c15>=1)&&(u1.aux10_1>=1))&&(u1.aux12_5>=1)))||(((u1.aux12_0>=1)&&(u1.aux10_2>=1))&&(u4.c15>=1)))||(((u4.c15>=1)&&(u1.aux10_1>=1))&&(u1.aux12_7>=1)))||(((u4.c15>=1)&&(u1.aux10_1>=1))&&(u1.aux12_2>=1)))||(((u4.c15>=1)&&(u1.aux10_1>=1))&&(u1.aux12_1>=1)))||(((u1.aux10_1>=1)&&(u4.c15>=1))&&(u1.aux12_4>=1)))||(((u1.aux12_3>=1)&&(u1.aux10_1>=1))&&(u4.c15>=1)))||(((u1.aux12_6>=1)&&(u1.aux10_0>=1))&&(u4.c15>=1)))||(((u1.aux12_5>=1)&&(u1.aux10_0>=1))&&(u4.c15>=1)))||(((u1.aux10_1>=1)&&(u1.aux12_0>=1))&&(u4.c15>=1)))||(((u1.aux12_7>=1)&&(u1.aux10_0>=1))&&(u4.c15>=1)))||(((u1.aux12_1>=1)&&(u4.c15>=1))&&(u1.aux10_4>=1)))||(((u1.aux12_2>=1)&&(u4.c15>=1))&&(u1.aux10_4>=1)))||(((u1.aux10_4>=1)&&(u4.c15>=1))&&(u1.aux12_3>=1)))||(((u1.aux10_4>=1)&&(u4.c15>=1))&&(u1.aux12_4>=1)))||(((u4.c15>=1)&&(u1.aux10_3>=1))&&(u1.aux12_5>=1)))||(((u1.aux12_6>=1)&&(u1.aux10_3>=1))&&(u4.c15>=1)))||(((u1.aux12_7>=1)&&(u1.aux10_3>=1))&&(u4.c15>=1)))||(((u4.c15>=1)&&(u1.aux10_4>=1))&&(u1.aux12_0>=1)))||(((u4.c15>=1)&&(u1.aux12_1>=1))&&(u1.aux10_3>=1)))||(((u4.c15>=1)&&(u1.aux12_2>=1))&&(u1.aux10_3>=1)))||(((u1.aux10_3>=1)&&(u1.aux12_3>=1))&&(u4.c15>=1)))||(((u4.c15>=1)&&(u1.aux10_3>=1))&&(u1.aux12_4>=1)))||(((u1.aux10_2>=1)&&(u1.aux12_5>=1))&&(u4.c15>=1)))||(((u4.c15>=1)&&(u1.aux12_6>=1))&&(u1.aux10_2>=1)))||(((u4.c15>=1)&&(u1.aux12_7>=1))&&(u1.aux10_2>=1)))||(((u4.c15>=1)&&(u1.aux12_0>=1))&&(u1.aux10_3>=1)))")
built 12 ordering constraints for composite.
WARNING : LTSmin timed out (>1800 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (((LTLAP0==true))U([]((LTLAP1==true))))U([](<>(<>((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, [](([](<>((LTLAP3==true))))U(<>(<>((LTLAP1==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 27, 2019 4:26:33 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt]
Mar 27, 2019 4:26:33 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 27, 2019 4:26:33 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 147 ms
Mar 27, 2019 4:26:33 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 168 places.
Mar 27, 2019 4:26:34 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 592 transitions.
Mar 27, 2019 4:26:34 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 48 ms
Mar 27, 2019 4:26:34 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 239 ms
Mar 27, 2019 4:26:34 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 259 ms
Mar 27, 2019 4:26:35 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 592 transitions.
Mar 27, 2019 4:26:35 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 592 transitions.
Mar 27, 2019 4:26:35 AM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 168 places.
Mar 27, 2019 4:26:35 AM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 592 transitions.
Mar 27, 2019 4:26:35 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 32 place invariants in 108 ms
Mar 27, 2019 4:26:36 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 168 variables to be positive in 947 ms
Mar 27, 2019 4:26:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 592 transitions.
Mar 27, 2019 4:26:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/592 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 27, 2019 4:26:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 56 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 27, 2019 4:26:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 592 transitions.
Mar 27, 2019 4:26:36 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 19 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 27, 2019 4:26:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 592 transitions.
Mar 27, 2019 4:26:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/592) took 706 ms. Total solver calls (SAT/UNSAT): 523(523/0)
Mar 27, 2019 4:26:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/592) took 7068 ms. Total solver calls (SAT/UNSAT): 1799(1799/0)
Mar 27, 2019 4:27:05 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 3 ms
Mar 27, 2019 4:27:05 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 4 ms
Mar 27, 2019 4:27:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(4/592) took 27161 ms. Total solver calls (SAT/UNSAT): 2386(2386/0)
Mar 27, 2019 4:27:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(5/592) took 41203 ms. Total solver calls (SAT/UNSAT): 2970(2970/0)
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown' twice, overapproximating result to 1.
Mar 27, 2019 4:27:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(6/592) took 48412 ms. Total solver calls (SAT/UNSAT): 3308(3308/0)
Mar 27, 2019 4:27:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 48431 ms. Total solver calls (SAT/UNSAT): 3308(3308/0)
Mar 27, 2019 4:27:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 592 transitions.
Mar 27, 2019 4:27:41 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:27:42 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:27:42 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Mar 27, 2019 4:27:43 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an error :unknown
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeDoNotAccord(NecessaryEnablingsolver.java:628)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:538)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Mar 27, 2019 4:27:43 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 68949ms conformant to PINS in folder :/home/mcc/execution
Mar 27, 2019 4:47:06 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 392 ms
Mar 27, 2019 4:47:06 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 17 ms
Mar 27, 2019 4:47:06 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 3 ms
Mar 27, 2019 5:07:06 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Mar 27, 2019 5:07:07 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 491 ms
Mar 27, 2019 5:07:07 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 495 ms
Begin: Wed Mar 27 05:07:08 2019

Computation of communities with the Newman-Girvan Modularity quality function

level 0:
start computation: Wed Mar 27 05:07:08 2019
network size: 168 nodes, 3230 links, 1184 weight
quality increased from -0.0143131 to 0.348089
end computation: Wed Mar 27 05:07:08 2019
level 1:
start computation: Wed Mar 27 05:07:08 2019
network size: 5 nodes, 23 links, 1184 weight
quality increased from 0.348089 to 0.348089
end computation: Wed Mar 27 05:07:08 2019
End: Wed Mar 27 05:07:08 2019
Total duration: 0 sec
0.348089
Mar 27, 2019 5:07:08 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Mar 27, 2019 5:07:08 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 128 events :switch12_2_6,switch12_1_6,switch12_3_0,switch12_2_7,switch12_2_6,switch12_2_5,switch12_2_6,switch12_1_6,switch12_3_0,switch12_7_4,switch12_6_5,switch12_1_6,switch12_1_6,switch12_1_2,switch12_0_7,switch12_1_0,switch12_0_5,switch12_3_0,switch12_2_6,switch12_2_6,switch12_1_7,switch12_2_0,switch12_1_5,switch12_1_6,switch12_7_4,switch12_7_4,switch12_6_5,switch12_7_4,switch12_7_4,switch12_7_5,switch12_6_5,switch12_6_5,switch12_6_5,switch12_3_0,switch12_3_0,switch10_2_0,switch10_7_4,switch10_6_4,switch10_2_0,switch10_2_7,switch10_2_0,switch10_2_6,switch10_2_0,switch10_2_0,switch10_2_0,switch10_2_0,switch10_7_4,switch10_6_4,switch10_2_0,switch10_7_4,switch10_6_4,switch10_7_4,switch10_7_6,switch10_7_4,switch10_7_4,switch10_7_4,switch10_6_4,switch10_7_4,switch10_6_4,switch10_6_4,switch10_6_4,switch10_6_4,switch10_6_4,switch10_7_4,switch10_2_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,display2_6_0,
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 123 events :display1_3_2,display1_1_1,display1_1_1,display1_2_1,display1_1_1,display1_0_1,display1_1_1,display1_1_1,display1_1_1,display1_1_1,display1_1_1,display1_1_1,display1_2_2,display1_3_1,display1_1_1,display1_1_1,display1_1_1,display1_1_1,display1_0_1,display1_1_1,display1_2_1,display1_3_1,display1_1_1,display1_1_1,display1_1_1,display1_1_1,display1_0_1,display1_2_1,display1_1_1,display1_1_1,display1_3_2,display1_1_1,display1_1_1,display1_0_2,display1_1_1,display1_2_1,display1_1_1,display1_1_1,display1_3_2,display1_1_1,display1_1_1,display1_0_1,display1_1_1,display1_0_2,display1_1_1,display1_3_2,display1_2_1,display1_1_1,display2_0_1,display2_3_1,display2_2_1,display1_1_1,display1_1_1,display1_1_1,display1_1_1,display1_1_1,display1_1_1,display1_1_1,display1_1_1,display1_1_1,display2_0_1,display2_2_1,display2_3_1,display2_0_1,display2_2_1,display2_3_1,display2_0_1,display2_2_1,display2_3_1,display2_0_1,display2_2_1,display2_3_1,display2_3_1,display2_2_1,display2_0_1,display4_6_1,display4_4_0,display4_3_0,display4_6_1,display2_3_1,display2_2_1,display2_0_1,display4_4_0,display4_3_0,display4_6_1,display4_4_0,display4_3_0,display4_6_1,display4_3_0,display4_4_0,display4_6_1,display4_3_0,display4_4_0,display4_6_1,display4_6_1,display4_4_0,display4_3_0,display4_6_1,display4_4_0,display4_3_0,display4_6_1,display4_3_0,display4_4_0,display4_6_1,display4_3_0,display4_4_0,display4_6_1,display4_4_0,display4_3_0,display4_6_1,display4_4_0,display4_3_0,display4_6_1,display4_3_0,display4_4_0,display4_6_1,display4_3_0,display4_4_0,display4_4_0,display4_3_0,display4_6_1,display4_4_0,display4_3_0,
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 138 events :switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,switch11_0_0,display4_2_4,display4_2_4,display4_2_4,display4_2_4,display4_6_3,display4_6_3,display4_2_4,display4_6_3,display4_6_3,display4_6_3,display4_6_3,display4_6_3,display4_6_3,display4_5_5,display4_5_5,display4_5_5,display4_5_5,display4_5_5,display4_5_5,display4_5_5,display4_2_4,display4_2_4,display4_2_4,display4_5_5,display4_0_0,display4_0_0,display4_7_1,display4_0_0,display4_7_1,display4_7_1,display4_7_1,display4_7_1,display4_7_1,display4_7_1,display4_7_1,display4_0_0,display4_0_0,display4_0_0,display4_0_0,display4_0_0,display4_5_5,display4_2_4,display4_2_4,display4_2_4,display4_5_5,display4_5_5,display4_5_5,display4_5_5,display4_5_5,display4_5_5,display4_6_3,display4_6_3,display4_6_3,display4_6_3,display4_6_3,display4_6_3,display4_2_4,display4_6_3,display4_2_4,display4_2_4,display4_2_4,display4_7_1,display4_7_1,display4_7_1,display4_7_1,display4_0_0,display4_0_0,display4_7_1,display4_0_0,display4_7_1,display4_7_1,display4_0_0,display4_0_0,display4_0_0,display4_0_0,
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 94 events :switch11_3_7,switch11_3_6,switch11_3_5,switch11_4_0,switch11_1_0,switch11_4_0,switch11_3_7,switch11_3_6,switch11_3_5,switch11_4_0,switch11_4_0,switch11_4_1,switch11_3_7,switch11_1_0,switch11_3_5,switch11_3_6,switch11_1_0,switch11_1_0,switch11_1_7,switch11_1_5,switch11_1_6,switch11_4_0,switch11_1_0,switch11_6_5,switch11_3_7,switch11_6_7,switch11_3_7,switch11_7_4,switch11_7_5,switch11_4_5,switch11_4_6,switch11_3_5,switch11_3_5,switch11_3_6,switch11_3_6,switch9_3_7,switch9_4_0,switch9_3_5,switch9_3_6,switch9_4_3,switch9_4_1,switch9_4_2,switch9_2_7,switch9_3_0,switch9_2_5,switch9_2_6,switch9_3_1,switch9_3_2,switch9_2_0,switch9_1_7,switch9_1_6,switch9_1_5,switch9_2_1,switch9_1_0,switch9_0_7,switch9_0_6,switch9_0_5,switch9_7_5,switch9_7_6,switch9_6_5,switch9_7_4,switch9_6_4,switch9_4_5,display1_0_7,display1_0_7,switch8_1_7,switch8_1_7,switch8_1_7,switch8_1_7,switch8_1_7,switch8_1_7,switch8_1_7,switch8_1_7,switch8_1_7,switch8_1_7,switch8_1_7,switch8_1_7,switch8_1_7,switch8_1_7,switch8_1_7,display1_0_3,display1_0_3,display1_0_4,display1_0_4,display1_0_5,display1_0_5,display1_0_6,display1_0_6,display1_2_0,display1_2_0,display1_2_2,display1_2_2,display1_2_1,display1_2_1,
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 483 redundant transitions.
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 955 ms
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_1_7, u4.switch9_7_1]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch10_7_0, u4.switch10_7_1, u4.switch10_1_7, u4.switch10_7_3, u4.switch10_3_7, u4.switch10_7_4, u4.switch10_4_7, u4.switch10_7_5, u4.switch10_5_7, u4.switch10_0_7]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch12_7_1, u1.switch12_1_7]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch11_6_0, u1.switch11_0_6, u1.switch11_6_2, u1.switch11_2_6, u1.switch11_6_3, u1.switch11_3_6]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu0_flat :[u0.display3_1_4, u0.display3_0_4, u0.display4_7_4, u0.display3_2_4, u0.display3_5_4, u0.display4_5_4, u0.display3_7_4, u0.display4_2_4, u0.display4_1_4, u0.display4_0_4]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_0_7, u4.switch9_7_0]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_2_3, u4.switch9_3_2]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch10_3_2, u4.switch10_2_3, u4.switch10_0_2, u4.switch10_4_2, u4.switch10_2_4, u4.switch10_5_2, u4.switch10_2_5, u4.switch10_2_0, u4.switch10_2_1, u4.switch10_1_2]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu0_flat :[u0.display3_3_3, u0.display4_3_3]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_4_5, u4.switch9_5_4]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_3_7, u4.switch9_7_3]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch12_2_1, u1.switch12_1_2]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu0_flat :[u0.display3_6_3, u0.display4_6_3]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_5_7, u4.switch9_7_5]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch12_7_2, u1.switch12_2_7]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch12_5_4, u1.switch12_4_5, u1.switch12_3_5, u1.switch12_5_3, u1.switch12_6_5, u1.switch12_5_6]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch10_6_2, u4.switch10_2_6]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu0_flat :[u0.display3_3_5, u0.display4_3_5]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu0_flat :[u0.display3_6_1, u0.display4_6_1]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_2_5, u4.switch9_5_2]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch10_6_0, u4.switch10_6_1, u4.switch10_1_6, u4.switch10_6_3, u4.switch10_3_6, u4.switch10_6_4, u4.switch10_4_6, u4.switch10_6_5, u4.switch10_5_6, u4.switch10_0_6]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch11_5_7, u1.switch11_7_5]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch12_5_1, u1.switch12_1_5]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu2_flat :[u2.display1_2_0, u2.display1_0_5]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch11_5_0, u1.switch11_0_5, u1.switch11_5_2, u1.switch11_2_5, u1.switch11_5_3, u1.switch11_3_5]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_1_5, u4.switch9_5_1]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_0_4, u4.switch9_4_0]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_2_1, u4.switch9_1_2]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu0_flat :[u0.display3_4_4, u0.display4_4_4]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu0_flat :[u0.display4_6_5, u0.display3_6_5]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch12_2_5, u1.switch12_5_2]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_4_3, u4.switch9_3_4]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu2_flat :[u2.display2_3_0, u2.display2_3_1, u2.display2_3_6, u2.display2_3_7, u2.display2_3_4, u2.display2_3_5, u2.display2_3_2, u2.display2_3_3]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch11_4_0, u1.switch11_0_4, u1.switch11_4_2, u1.switch11_2_4, u1.switch11_4_3, u1.switch11_3_4]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch11_1_3, u1.switch11_3_1, u1.switch11_1_0, u1.switch11_0_1, u1.switch11_1_2, u1.switch11_2_1]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu2_flat :[u2.display2_1_2, u2.display2_1_3, u2.display2_4_0, u2.display2_1_0, u2.display2_1_1, u2.display2_4_7, u2.display2_5_6, u2.display2_6_5, u2.display2_7_4, u2.display2_5_7, u2.display2_6_6, u2.display2_7_5, u2.display2_4_5, u2.display2_5_4, u2.display2_6_3, u2.display2_7_2, u2.display2_4_6, u2.display2_5_5, u2.display2_6_4, u2.display2_7_3, u2.display2_1_6, u2.display2_4_3, u2.display2_5_2, u2.display2_6_1, u2.display2_7_0, u2.display2_1_7, u2.display2_4_4, u2.display2_5_3, u2.display2_6_2, u2.display2_7_1, u2.display2_1_4, u2.display2_4_1, u2.display2_5_0, u2.display2_1_5, u2.display2_4_2, u2.display2_5_1, u2.display2_6_0, u2.display2_6_7, u2.display2_7_6, u2.display2_7_7]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu0_flat :[u0.display4_6_7, u0.display4_6_6, u0.display3_6_2, u0.display4_6_2, u0.display3_6_7, u0.display3_6_6]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu0_flat :[u0.display3_6_0, u0.display4_6_0]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_0_5, u4.switch9_5_0]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu0_flat :[u0.display3_3_1, u0.display4_3_1]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu0_flat :[u0.display4_0_0, u0.display3_2_0, u0.display3_5_0, u0.display3_7_0, u0.display4_7_0, u0.display4_5_0, u0.display4_2_0, u0.display3_1_0, u0.display4_1_0, u0.display3_0_0]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch12_7_5, u1.switch12_5_7]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_6_5, u4.switch9_5_6]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_1_3, u4.switch9_3_1]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_2_7, u4.switch9_7_2]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch11_2_2, u1.switch11_3_2, u1.switch11_2_3, u1.switch11_3_3, u1.switch11_0_0, u1.switch11_0_2, u1.switch11_2_0, u1.switch11_0_3, u1.switch11_3_0]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_4_7, u4.switch9_7_4]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch10_7_2, u4.switch10_2_7]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu2_flat :[u2.display2_0_3, u2.display2_0_4, u2.display2_0_1, u2.display2_0_2, u2.display2_0_0, u2.display2_0_7, u2.display2_0_5, u2.display2_0_6]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu0_flat :[u0.display3_4_1, u0.display4_4_1]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_3_6, u4.switch9_6_3]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_2_6, u4.switch9_6_2]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_4_6, u4.switch9_6_4]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu0_flat :[u0.display4_4_7, u0.display3_4_2, u0.display4_4_6, u0.display3_4_7, u0.display3_4_6, u0.display4_4_2]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch12_1_0, u1.switch12_0_1]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch11_5_1, u1.switch11_1_5]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu2_flat :[u2.display1_0_6, u2.display1_0_7]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch12_7_3, u1.switch12_3_7, u1.switch12_7_6, u1.switch12_6_7, u1.switch12_7_4, u1.switch12_4_7]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu2_flat :[u2.display1_7_7, u2.display1_1_5, u2.display1_4_2, u2.display1_5_1, u2.display1_6_0, u2.display1_1_6, u2.display1_4_3, u2.display1_5_2, u2.display1_6_1, u2.display1_7_0, u2.display1_1_7, u2.display1_4_4, u2.display1_5_3, u2.display1_6_2, u2.display1_7_1, u2.display1_4_5, u2.display1_5_4, u2.display1_6_3, u2.display1_7_2, u2.display1_4_6, u2.display1_5_5, u2.display1_6_4, u2.display1_7_3, u2.display1_4_7, u2.display1_5_6, u2.display1_6_5, u2.display1_7_4, u2.display1_5_7, u2.display1_6_6, u2.display1_7_5, u2.display1_6_7, u2.display1_7_6, u2.display1_1_0, u2.display1_1_1, u2.display1_1_2, u2.display1_1_3, u2.display1_4_0, u2.display1_1_4, u2.display1_4_1, u2.display1_5_0]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch11_5_6, u1.switch11_6_5]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu0_flat :[u0.display3_4_3, u0.display4_4_3]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch11_5_4, u1.switch11_4_5]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch12_4_1, u1.switch12_1_4, u1.switch12_3_1, u1.switch12_1_3, u1.switch12_6_1, u1.switch12_1_6]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_1_4, u4.switch9_4_1]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch11_4_6, u1.switch11_6_4]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu0_flat :[u0.display3_3_4, u0.display4_3_4]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu0_flat :[u0.display3_0_3, u0.display3_2_3, u0.display3_1_3, u0.display4_7_3, u0.display3_5_3, u0.display4_5_3, u0.display3_7_3, u0.display4_2_3, u0.display4_1_3, u0.display4_0_3]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu2_flat :[u2.display2_2_1, u2.display2_2_2, u2.display2_2_0, u2.display2_2_7, u2.display2_2_5, u2.display2_2_6, u2.display2_2_3, u2.display2_2_4]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu0_flat :[u0.display3_4_5, u0.display4_4_5]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch12_5_0, u1.switch12_0_5]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch11_6_1, u1.switch11_1_6]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch12_2_0, u1.switch12_0_2]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_0_1, u4.switch9_1_0]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_0_6, u4.switch9_6_0]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu0_flat :[u0.display3_0_5, u0.display4_7_5, u0.display3_2_5, u0.display3_1_5, u0.display4_5_5, u0.display3_5_5, u0.display4_2_5, u0.display4_1_5, u0.display3_7_5, u0.display4_0_5]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch12_6_0, u1.switch12_0_6, u1.switch12_3_0, u1.switch12_0_3, u1.switch12_4_0, u1.switch12_0_4]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu0_flat :[u0.display3_3_2, u0.display4_3_7, u0.display3_3_6, u0.display4_3_6, u0.display3_3_7, u0.display4_3_2]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu0_flat :[u0.display3_3_0, u0.display4_3_0]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch10_7_6, u4.switch10_6_7]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu0_flat :[u0.display3_2_1, u0.display3_1_1, u0.display3_5_1, u0.display3_7_1, u0.display4_7_1, u0.display4_5_1, u0.display4_2_1, u0.display4_1_1, u0.display3_0_1, u0.display4_0_1]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_0_3, u4.switch9_3_0]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_3_5, u4.switch9_5_3]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_1_6, u4.switch9_6_1]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu0_flat :[u0.display3_4_0, u0.display4_4_0]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_0_2, u4.switch9_2_0]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch11_7_6, u1.switch11_6_7]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch11_7_0, u1.switch11_0_7, u1.switch11_7_2, u1.switch11_2_7, u1.switch11_7_3, u1.switch11_3_7]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch12_7_0, u1.switch12_0_7]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch11_7_1, u1.switch11_1_7]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch12_3_2, u1.switch12_2_3, u1.switch12_2_4, u1.switch12_4_2, u1.switch12_6_2, u1.switch12_2_6]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu0_flat :[u0.display4_6_4, u0.display3_6_4]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_2_4, u4.switch9_4_2]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu2_flat :[u2.display1_2_1, u2.display1_0_4]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.switch9_6_7, u4.switch9_7_6]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch11_4_7, u1.switch11_7_4]
Mar 27, 2019 5:07:09 AM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.switch11_4_1, u1.switch11_1_4]
Mar 27, 2019 5:07:09 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 13 ms
Mar 27, 2019 5:07:09 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 4 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-PT-05"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsm"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstoolsm"
echo " Input is PermAdmissibility-PT-05, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r197-oct2-155272231000439"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-PT-05.tgz
mv PermAdmissibility-PT-05 execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;