fond
Model Checking Contest 2019
9th edition, Prague, Czech Republic, April 7, 2019 (TOOLympics)
Execution of r197-oct2-155272230500305
Last Updated
Apr 15, 2019

About the Execution of ITS-Tools.M for ParamProductionCell-PT-5

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1764.340 3600000.00 8016989.00 131.60 TFFTFFFTTTFTFFTF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2019-input.r197-oct2-155272230500305.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2019-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstoolsm
Input is ParamProductionCell-PT-5, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r197-oct2-155272230500305
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 324K
-rw-r--r-- 1 mcc users 3.9K Feb 12 03:17 CTLCardinality.txt
-rw-r--r-- 1 mcc users 18K Feb 12 03:17 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Feb 8 02:15 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 8 02:15 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.8K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 111 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 349 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.8K Feb 5 00:21 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K Feb 5 00:21 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 4 22:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.2K Feb 4 22:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.3K Feb 4 07:18 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 13K Feb 4 07:18 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.3K Feb 1 01:26 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 1 01:26 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 4 22:22 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 4 22:22 UpperBounds.xml

-rw-r--r-- 1 mcc users 6 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 2 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 167K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ParamProductionCell-PT-5-ReachabilityCardinality-00
FORMULA_NAME ParamProductionCell-PT-5-ReachabilityCardinality-01
FORMULA_NAME ParamProductionCell-PT-5-ReachabilityCardinality-02
FORMULA_NAME ParamProductionCell-PT-5-ReachabilityCardinality-03
FORMULA_NAME ParamProductionCell-PT-5-ReachabilityCardinality-04
FORMULA_NAME ParamProductionCell-PT-5-ReachabilityCardinality-05
FORMULA_NAME ParamProductionCell-PT-5-ReachabilityCardinality-06
FORMULA_NAME ParamProductionCell-PT-5-ReachabilityCardinality-07
FORMULA_NAME ParamProductionCell-PT-5-ReachabilityCardinality-08
FORMULA_NAME ParamProductionCell-PT-5-ReachabilityCardinality-09
FORMULA_NAME ParamProductionCell-PT-5-ReachabilityCardinality-10
FORMULA_NAME ParamProductionCell-PT-5-ReachabilityCardinality-11
FORMULA_NAME ParamProductionCell-PT-5-ReachabilityCardinality-12
FORMULA_NAME ParamProductionCell-PT-5-ReachabilityCardinality-13
FORMULA_NAME ParamProductionCell-PT-5-ReachabilityCardinality-14
FORMULA_NAME ParamProductionCell-PT-5-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1553648796741

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 202 rows 231 cols
invariant :table_bottom_pos + table_top_pos = 1
invariant :arm1_storing + arm1_having_swivel_1 + arm1_waiting_for_swivel_2 + A1L_out + A1L_loaded + arm1_magnet_off + A1L_ret_rs + A1L_ret_run + A1U_rotated + A1U_in + A1U_rot1_in + A1U_rot2_in + A1U_rot3_in + A1U_rot1_rs + A1U_rot1_run + A1U_rot2_rs + A1U_rot2_run + A1U_rot3_rs + A1U_rot3_run + A1U_extendet + A1U_ext_rs + A1U_ext_run = 1
invariant :ch_A1P_full + ch_A1P_free + press_ready_for_unloading + PU_out + blank_forged + PU_in + PU_lower_rs + PU_lower_run + forge_rs + forge_run + PL_in + PL_out + PL_lower_rs + PL_lower_run + -1'arm1_storing + -1'arm1_having_swivel_1 + -1'A1L_out + -1'A1L_loaded + -1'arm1_magnet_off + -1'A1L_ret_rs + -1'A1L_ret_run + A1U_out + A1U_unloadet + A1U_ret_rs + A1U_ret_run = 0
invariant :table_upward + -1'TL_lower_rs + -1'TL_lower_run + -1'TU_lift_rs + -1'TU_lift_run = 0
invariant :table_stop_v + TL_lower_rs + TL_lower_run + TU_lift_rs + TU_lift_run = 1
invariant :arm2_release_ext + arm2_retract_ext + arm2_pick_up_ext = 1
invariant :crane_store_free + crane_mag_on + CU_unloaded + CU_ready_to_transport + CU_out + CU_lift_rs + CU_lift_run + CU_trans_rs + CU_trans_run + CL_in + CL_ready_to_grasp + CL_lower_rs + CL_lower_run = 1
invariant :crane_transport_height + crane_release_height + crane_pick_up_height = 1
invariant :press_at_upper_pos + press_at_lower_pos + press_at_middle_pos = 1
invariant :crane_mag_off + crane_mag_on = 1
invariant :belt1_stop + FB_trans_rs + FB_trans_run + FB_deliver_rs + FB_deliver_run = 1
invariant :arm2_stop + A2U_ext_rs + A2U_ext_run + A2U_ret_rs + A2U_ret_run + A2L_ext_rs + A2L_ext_run + A2L_ret_rs + A2L_ret_run = 1
invariant :belt2_stop + DB_trans_rs + DB_trans_run + DB_deliver_rs + DB_deliver_run = 1
invariant :robot_right + -1'A2U_rot1_rs + -1'A2U_rot1_run + -1'A2U_rot3_rs + -1'A2U_rot3_run + -1'A1U_rot1_rs + -1'A1U_rot1_run + -1'A1U_rot2_rs + -1'A1U_rot2_run = 0
invariant :arm2_store_free + arm2_waiting_for_swivel_1 + arm2_having_swivel_2 + A2U_out + A2U_unloaded + arm2_magnet_on + A2U_ret_rs + A2U_ret_run + A2L_rotated + A2L_in + A2L_rot1_in + A2L_rot2_in + A2L_rot3_in + A2L_rot1_rs + A2L_rot1_run + A2L_rot2_rs + A2L_rot2_run + A2L_rot3_rs + A2L_rot3_run + A2L_extended + A2L_ext_rs + A2L_ext_run = 1
invariant :arm1_magnet_on + arm1_magnet_off = 1
invariant :deposit_belt_idle + deposit_belt_occupied + deposit_belt_empty + DB_in + DB_at_end + DB_out + DB_trans_rs + DB_trans_run + DB_deliver_rs + DB_deliver_run = 1
invariant :ch_CF_free + ch_CF_full + feed_belt_occupied + feed_belt_empty + FB_in + FB_at_end + FB_out + FB_trans_rs + FB_trans_run + FB_deliver_rs + FB_deliver_run + CU_unloaded + CU_ready_to_transport + CU_out + CU_ready_to_ungrasp + CU_in + CU_lift_rs + CU_lift_run + CU_trans_rs + CU_trans_run + CU_lower_rs + CU_lower_run = 1
invariant :press_up + -1'PL_lower_rs + -1'PL_lower_run = 0
invariant :ch_A2D_full + ch_A2D_free + deposit_belt_occupied + deposit_belt_empty + DB_in + DB_at_end + DB_out + DB_trans_rs + DB_trans_run + DB_deliver_rs + DB_deliver_run + -1'arm2_storing + -1'arm2_having_swivel_1 + A2U_out + A2U_unloaded + arm2_magnet_on + A2U_ret_rs + A2U_ret_run + -1'A2L_out + -1'A2L_loaded + -1'A2L_ret_rs + -1'A2L_ret_run = 1
invariant :belt2_start + -1'DB_trans_rs + -1'DB_trans_run + -1'DB_deliver_rs + -1'DB_deliver_run = 0
invariant :ch_DC_full + ch_CF_full + -1'ch_A1P_free + -1'ch_TA1_free + -1'ch_A2D_free + ch_FT_full + ch_PA2_full + -1'press_ready_for_unloading + -1'PL_in + -1'PL_out + -1'PL_lower_rs + -1'PL_lower_run + table_ready_for_unloading + TU_in + TU_out + table_at_unload_angle + TU_lift_rs + TU_lift_run + TU_rot_rs + TU_rot_run + -1'deposit_belt_empty + feed_belt_occupied + FB_in + FB_at_end + FB_out + FB_trans_rs + FB_trans_run + FB_deliver_rs + FB_deliver_run + -1'arm2_store_free + arm2_storing + -1'arm2_having_swivel_2 + arm2_having_swivel_1 + -1'A2U_out + -1'A2U_unloaded + -1'arm2_magnet_on + -1'A2U_ret_rs + -1'A2U_ret_run + A2L_out + A2L_loaded + A2L_ret_rs + A2L_ret_run + arm1_storing + arm1_having_swivel_1 + crane_mag_on + CU_unloaded + CU_ready_to_transport + CU_out + CU_lift_rs + CU_lift_run + CU_trans_rs + CU_trans_run + CL_in + CL_ready_to_grasp + CL_lower_rs + CL_lower_run = 2
invariant :arm1_forward + -1'A1L_ext_rs + -1'A1L_ext_run + -1'A1U_ext_rs + -1'A1U_ext_run = 0
invariant :arm2_forward + -1'A2U_ext_rs + -1'A2U_ext_run + -1'A2L_ext_rs + -1'A2L_ext_run = 0
invariant :press_stop + PU_lower_rs + PU_lower_run + forge_rs + forge_run + PL_lower_rs + PL_lower_run = 1
invariant :table_right + -1'TL_rot_rs + -1'TL_rot_run + -1'TU_rot_rs + -1'TU_rot_run = 0
invariant :robot_stop + A2U_rot1_rs + A2U_rot1_run + A2U_rot2_rs + A2U_rot2_run + A2U_rot3_rs + A2U_rot3_run + A2L_rot1_rs + A2L_rot1_run + A2L_rot2_rs + A2L_rot2_run + A2L_rot3_rs + A2L_rot3_run + A1L_rot1_rs + A1L_rot1_run + A1L_rot2_rs + A1L_rot2_run + A1L_rot3_rs + A1L_rot3_run + A1U_rot1_rs + A1U_rot1_run + A1U_rot2_rs + A1U_rot2_run + A1U_rot3_rs + A1U_rot3_run = 1
invariant :press_ready_for_loading + press_ready_for_unloading + PU_out + blank_forged + PU_in + PU_lower_rs + PU_lower_run + forge_rs + forge_run + PL_in + PL_out + PL_lower_rs + PL_lower_run = 1
invariant :ch_TA1_full + ch_TA1_free + -1'table_ready_for_unloading + -1'arm1_store_free + -1'arm1_having_swivel_2 + A1L_out + A1L_loaded + arm1_magnet_off + A1L_ret_rs + A1L_ret_run + -1'A1U_out + -1'A1U_unloadet + -1'A1U_ret_rs + -1'A1U_ret_run = 0
invariant :crane_to_belt2 + -1'CU_trans_rs + -1'CU_trans_run = 0
invariant :press_down + -1'PU_lower_rs + -1'PU_lower_run = 0
invariant :belt1_start + -1'FB_trans_rs + -1'FB_trans_run + -1'FB_deliver_rs + -1'FB_deliver_run = 0
invariant :arm1_store_free + arm1_waiting_for_swivel_1 + arm1_having_swivel_2 + A1L_rotated + A1L_in + A1L_rot1_in + A1L_rot2_in + A1L_rot3_in + A1L_rot1_rs + A1L_rot1_run + A1L_rot2_rs + A1L_rot2_run + A1L_rot3_rs + A1L_rot3_run + A1_extended + -1'arm1_magnet_off + A1L_ext_rs + A1L_ext_run + A1U_out + A1U_unloadet + A1U_ret_rs + A1U_ret_run = 0
invariant :table_ready_for_loading + table_ready_for_unloading + TL_out + TL_in + table_at_load_angle + TL_rot_rs + TL_rot_run + TL_lower_rs + TL_lower_run + TU_in + TU_out + table_at_unload_angle + TU_lift_rs + TU_lift_run + TU_rot_rs + TU_rot_run = 1
invariant :crane_to_belt1 + -1'CL_trans_rs + -1'CL_trans_run = 0
invariant :crane_stop_h + CU_trans_rs + CU_trans_run + CL_trans_rs + CL_trans_run = 1
invariant :crane_lift + -1'CU_lift_rs + -1'CU_lift_run + -1'CL_lift_rs + -1'CL_lift_run = 0
invariant :robot_left + -1'A2U_rot2_rs + -1'A2U_rot2_run + -1'A2L_rot1_rs + -1'A2L_rot1_run + -1'A2L_rot2_rs + -1'A2L_rot2_run + -1'A2L_rot3_rs + -1'A2L_rot3_run + -1'A1L_rot1_rs + -1'A1L_rot1_run + -1'A1L_rot2_rs + -1'A1L_rot2_run + -1'A1L_rot3_rs + -1'A1L_rot3_run + -1'A1U_rot3_rs + -1'A1U_rot3_run = 0
invariant :arm1_stop + A1L_ext_rs + A1L_ext_run + A1L_ret_rs + A1L_ret_run + A1U_ext_rs + A1U_ext_run + A1U_ret_rs + A1U_ret_run = 1
invariant :table_stop_h + TL_rot_rs + TL_rot_run + TU_rot_rs + TU_rot_run = 1
invariant :feed_belt_idle + feed_belt_occupied + feed_belt_empty + FB_in + FB_at_end + FB_out + FB_trans_rs + FB_trans_run + FB_deliver_rs + FB_deliver_run = 1
invariant :arm2_magnet_off + arm2_magnet_on = 1
invariant :arm2_backward + -1'A2U_ret_rs + -1'A2U_ret_run + -1'A2L_ret_rs + -1'A2L_ret_run = 0
invariant :crane_above_deposit_belt + crane_above_feed_belt = 1
invariant :crane_storing + -1'crane_mag_on + CU_ready_to_ungrasp + CU_in + CU_lower_rs + CU_lower_run + CL_out + CL_ready_to_transport + CL_loaded + CL_trans_rs + CL_trans_run + CL_lift_rs + CL_lift_run = 0
invariant :crane_lower + -1'CU_lower_rs + -1'CU_lower_run + -1'CL_lower_rs + -1'CL_lower_run = 0
invariant :crane_stop_v + CU_lift_rs + CU_lift_run + CU_lower_rs + CU_lower_run + CL_lower_rs + CL_lower_run + CL_lift_rs + CL_lift_run = 1
invariant :swivel + -1'arm2_store_free + -1'arm2_waiting_for_swivel_1 + -1'arm2_storing + -1'arm2_waiting_for_swivel_2 + -1'arm1_store_free + -1'arm1_waiting_for_swivel_1 + -1'arm1_storing + -1'arm1_waiting_for_swivel_2 = -1
invariant :belt2_light_barrier_true + belt2_light_barrier_false = 1
invariant :arm2_storing + arm2_having_swivel_1 + arm2_waiting_for_swivel_2 + A2U_rotated + A2U_in + A2U_rot1_in + A2U_rot2_in + A2U_rot3_in + A2U_rot1_rs + A2U_rot1_run + A2U_rot2_rs + A2U_rot2_run + A2U_rot3_rs + A2U_rot3_run + A2U_extended + -1'arm2_magnet_on + A2U_ext_rs + A2U_ext_run + A2L_out + A2L_loaded + A2L_ret_rs + A2L_ret_run = 0
invariant :arm2_release_angle + arm1_pick_up_angle + arm1_release_angle + arm2_pick_up_angle = 1
invariant :ch_DC_free + -1'ch_CF_full + ch_A1P_free + ch_TA1_free + ch_A2D_free + -1'ch_FT_full + -1'ch_PA2_full + press_ready_for_unloading + PL_in + PL_out + PL_lower_rs + PL_lower_run + -1'table_ready_for_unloading + -1'TU_in + -1'TU_out + -1'table_at_unload_angle + -1'TU_lift_rs + -1'TU_lift_run + -1'TU_rot_rs + -1'TU_rot_run + deposit_belt_empty + DB_in + DB_at_end + DB_out + DB_trans_rs + DB_trans_run + DB_deliver_rs + DB_deliver_run + -1'feed_belt_occupied + -1'FB_in + -1'FB_at_end + -1'FB_out + -1'FB_trans_rs + -1'FB_trans_run + -1'FB_deliver_rs + -1'FB_deliver_run + arm2_store_free + -1'arm2_storing + arm2_having_swivel_2 + -1'arm2_having_swivel_1 + A2U_out + A2U_unloaded + arm2_magnet_on + A2U_ret_rs + A2U_ret_run + -1'A2L_out + -1'A2L_loaded + -1'A2L_ret_rs + -1'A2L_ret_run + -1'arm1_storing + -1'arm1_having_swivel_1 + -1'crane_mag_on + -1'CU_unloaded + -1'CU_ready_to_transport + -1'CU_out + -1'CU_lift_rs + -1'CU_lift_run + -1'CU_trans_rs + -1'CU_trans_run + CL_out + CL_ready_to_transport + CL_loaded + CL_trans_rs + CL_trans_run + CL_lift_rs + CL_lift_run = -1
invariant :ch_FT_free + ch_FT_full + table_ready_for_unloading + TL_out + TL_in + table_at_load_angle + TL_rot_rs + TL_rot_run + TL_lower_rs + TL_lower_run + TU_in + TU_out + table_at_unload_angle + TU_lift_rs + TU_lift_run + TU_rot_rs + TU_rot_run + FB_in + FB_at_end + FB_out + FB_trans_rs + FB_trans_run + FB_deliver_rs + FB_deliver_run = 1
invariant :ch_PA2_free + ch_PA2_full + -1'press_ready_for_unloading + -1'arm2_store_free + -1'arm2_having_swivel_2 + -1'A2U_out + -1'A2U_unloaded + -1'arm2_magnet_on + -1'A2U_ret_rs + -1'A2U_ret_run + A2L_out + A2L_loaded + A2L_ret_rs + A2L_ret_run = -1
invariant :table_load_angle + table_unload_angle = 1
invariant :arm1_pick_up_ext + arm1_retract_ext + arm1_release_ext = 1
invariant :arm1_backward + -1'A1L_ret_rs + -1'A1L_ret_run + -1'A1U_ret_rs + -1'A1U_ret_run = 0
invariant :belt1_light_barrier_true + belt1_light_barrier_false = 1
invariant :press_upward + -1'forge_rs + -1'forge_run = 0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 1889 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 46 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, ParamProductionCellPT5ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
LTSmin run took 249 ms.
Found Violation
FORMULA ParamProductionCell-PT-5-ReachabilityCardinality-00 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, ParamProductionCellPT5ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
LTSmin run took 19504 ms.
Invariant validated
FORMULA ParamProductionCell-PT-5-ReachabilityCardinality-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, ParamProductionCellPT5ReachabilityCardinality02==true], workingDir=/home/mcc/execution]
LTSmin run took 813 ms.
Found Violation
FORMULA ParamProductionCell-PT-5-ReachabilityCardinality-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, ParamProductionCellPT5ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
LTSmin run took 39832 ms.
Invariant validated
FORMULA ParamProductionCell-PT-5-ReachabilityCardinality-03 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, ParamProductionCellPT5ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
LTSmin run took 200 ms.
Found Violation
FORMULA ParamProductionCell-PT-5-ReachabilityCardinality-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, ParamProductionCellPT5ReachabilityCardinality05==true], workingDir=/home/mcc/execution]
LTSmin run took 14438 ms.
Invariant validated
FORMULA ParamProductionCell-PT-5-ReachabilityCardinality-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, ParamProductionCellPT5ReachabilityCardinality06==true], workingDir=/home/mcc/execution]
LTSmin run took 43200 ms.
Invariant validated
FORMULA ParamProductionCell-PT-5-ReachabilityCardinality-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, ParamProductionCellPT5ReachabilityCardinality07==true], workingDir=/home/mcc/execution]
LTSmin run took 327 ms.
Found Violation
FORMULA ParamProductionCell-PT-5-ReachabilityCardinality-07 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, ParamProductionCellPT5ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
LTSmin run took 218 ms.
Found Violation
FORMULA ParamProductionCell-PT-5-ReachabilityCardinality-08 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, ParamProductionCellPT5ReachabilityCardinality09==true], workingDir=/home/mcc/execution]
LTSmin run took 13787 ms.
Invariant validated
FORMULA ParamProductionCell-PT-5-ReachabilityCardinality-09 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, ParamProductionCellPT5ReachabilityCardinality10==true], workingDir=/home/mcc/execution]
LTSmin run took 490 ms.
Found Violation
FORMULA ParamProductionCell-PT-5-ReachabilityCardinality-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, ParamProductionCellPT5ReachabilityCardinality11==true], workingDir=/home/mcc/execution]
LTSmin run took 763 ms.
Found Violation
FORMULA ParamProductionCell-PT-5-ReachabilityCardinality-11 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, ParamProductionCellPT5ReachabilityCardinality12==true], workingDir=/home/mcc/execution]
LTSmin run took 2046 ms.
Found Violation
FORMULA ParamProductionCell-PT-5-ReachabilityCardinality-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, ParamProductionCellPT5ReachabilityCardinality13==true], workingDir=/home/mcc/execution]
LTSmin run took 1610 ms.
Found Violation
FORMULA ParamProductionCell-PT-5-ReachabilityCardinality-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, ParamProductionCellPT5ReachabilityCardinality14==true], workingDir=/home/mcc/execution]
LTSmin run took 120368 ms.
Invariant validated
FORMULA ParamProductionCell-PT-5-ReachabilityCardinality-14 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, ParamProductionCellPT5ReachabilityCardinality15==true], workingDir=/home/mcc/execution]
LTSmin run took 49739 ms.
Invariant validated
FORMULA ParamProductionCell-PT-5-ReachabilityCardinality-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 27, 2019 1:06:38 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt]
Mar 27, 2019 1:06:38 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 27, 2019 1:06:38 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 52 ms
Mar 27, 2019 1:06:38 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 231 places.
Mar 27, 2019 1:06:38 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 202 transitions.
Mar 27, 2019 1:06:38 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 14 ms
Mar 27, 2019 1:06:38 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 62 ms
Mar 27, 2019 1:06:38 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 83 ms
Mar 27, 2019 1:06:38 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 104 ms
Mar 27, 2019 1:06:38 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 202 transitions.
Mar 27, 2019 1:06:38 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 202 transitions.
Mar 27, 2019 1:06:39 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 59 place invariants in 48 ms
Mar 27, 2019 1:06:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 776 ms.
Mar 27, 2019 1:06:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-00(UNSAT) depth K=0 took 27 ms
Mar 27, 2019 1:06:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-01(UNSAT) depth K=0 took 25 ms
Mar 27, 2019 1:06:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-02(UNSAT) depth K=0 took 33 ms
Mar 27, 2019 1:06:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-03(UNSAT) depth K=0 took 18 ms
Mar 27, 2019 1:06:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-04(UNSAT) depth K=0 took 25 ms
Mar 27, 2019 1:06:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-05(UNSAT) depth K=0 took 25 ms
Mar 27, 2019 1:06:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-06(UNSAT) depth K=0 took 28 ms
Mar 27, 2019 1:06:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-07(UNSAT) depth K=0 took 23 ms
Mar 27, 2019 1:06:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-08(UNSAT) depth K=0 took 32 ms
Mar 27, 2019 1:06:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-09(UNSAT) depth K=0 took 44 ms
Mar 27, 2019 1:06:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-10(UNSAT) depth K=0 took 7 ms
Mar 27, 2019 1:06:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-11(UNSAT) depth K=0 took 18 ms
Mar 27, 2019 1:06:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-12(UNSAT) depth K=0 took 1 ms
Mar 27, 2019 1:06:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-13(UNSAT) depth K=0 took 24 ms
Mar 27, 2019 1:06:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-14(UNSAT) depth K=0 took 11 ms
Mar 27, 2019 1:06:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-15(UNSAT) depth K=0 took 14 ms
Mar 27, 2019 1:06:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-00(UNSAT) depth K=1 took 27 ms
Mar 27, 2019 1:06:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-01(UNSAT) depth K=1 took 22 ms
Mar 27, 2019 1:06:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-02(UNSAT) depth K=1 took 25 ms
Mar 27, 2019 1:06:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-03(UNSAT) depth K=1 took 25 ms
Mar 27, 2019 1:06:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-04(UNSAT) depth K=1 took 25 ms
Mar 27, 2019 1:06:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-05(UNSAT) depth K=1 took 7 ms
Mar 27, 2019 1:06:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-06(UNSAT) depth K=1 took 48 ms
Mar 27, 2019 1:06:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-07(UNSAT) depth K=1 took 31 ms
Mar 27, 2019 1:06:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-08(UNSAT) depth K=1 took 20 ms
Mar 27, 2019 1:06:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-09(UNSAT) depth K=1 took 12 ms
Mar 27, 2019 1:06:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-10(UNSAT) depth K=1 took 13 ms
Mar 27, 2019 1:06:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-11(UNSAT) depth K=1 took 25 ms
Mar 27, 2019 1:06:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-12(UNSAT) depth K=1 took 12 ms
Mar 27, 2019 1:06:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-13(UNSAT) depth K=1 took 24 ms
Mar 27, 2019 1:06:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-14(UNSAT) depth K=1 took 28 ms
Mar 27, 2019 1:06:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-15(UNSAT) depth K=1 took 42 ms
Mar 27, 2019 1:06:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-00(UNSAT) depth K=2 took 76 ms
Mar 27, 2019 1:06:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-01(UNSAT) depth K=2 took 82 ms
Mar 27, 2019 1:06:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-02(UNSAT) depth K=2 took 72 ms
Mar 27, 2019 1:06:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-03(UNSAT) depth K=2 took 50 ms
Mar 27, 2019 1:06:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-04(UNSAT) depth K=2 took 110 ms
Mar 27, 2019 1:06:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-05(UNSAT) depth K=2 took 85 ms
Mar 27, 2019 1:06:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-06(UNSAT) depth K=2 took 155 ms
Mar 27, 2019 1:06:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-07(UNSAT) depth K=2 took 168 ms
Mar 27, 2019 1:06:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-08(UNSAT) depth K=2 took 228 ms
Mar 27, 2019 1:06:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-09(UNSAT) depth K=2 took 92 ms
Mar 27, 2019 1:06:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-10(UNSAT) depth K=2 took 100 ms
Mar 27, 2019 1:06:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-11(UNSAT) depth K=2 took 139 ms
Mar 27, 2019 1:06:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-12(UNSAT) depth K=2 took 153 ms
Mar 27, 2019 1:06:41 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 231 variables to be positive in 2808 ms
Mar 27, 2019 1:06:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 202 transitions.
Mar 27, 2019 1:06:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/202 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 27, 2019 1:06:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 17 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 27, 2019 1:06:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 202 transitions.
Mar 27, 2019 1:06:41 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 9 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 27, 2019 1:06:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-13(UNSAT) depth K=2 took 206 ms
Mar 27, 2019 1:06:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-14(UNSAT) depth K=2 took 150 ms
Mar 27, 2019 1:06:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-15(UNSAT) depth K=2 took 130 ms
Mar 27, 2019 1:06:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 202 transitions.
Mar 27, 2019 1:06:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/202) took 574 ms. Total solver calls (SAT/UNSAT): 28(13/15)
Mar 27, 2019 1:06:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-00(UNSAT) depth K=3 took 5850 ms
Mar 27, 2019 1:06:48 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-01(UNSAT) depth K=3 took 678 ms
Mar 27, 2019 1:06:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(5/202) took 3607 ms. Total solver calls (SAT/UNSAT): 299(224/75)
Mar 27, 2019 1:06:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(12/202) took 7698 ms. Total solver calls (SAT/UNSAT): 505(388/117)
Mar 27, 2019 1:06:54 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-02(UNSAT) depth K=3 took 5208 ms
Mar 27, 2019 1:06:55 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-03(UNSAT) depth K=3 took 1705 ms
Mar 27, 2019 1:06:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(16/202) took 11107 ms. Total solver calls (SAT/UNSAT): 849(700/149)
Mar 27, 2019 1:06:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-04(UNSAT) depth K=3 took 948 ms
Mar 27, 2019 1:06:58 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-05(UNSAT) depth K=3 took 1429 ms
Mar 27, 2019 1:06:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(23/202) took 14205 ms. Total solver calls (SAT/UNSAT): 1145(821/324)
Mar 27, 2019 1:07:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-06(UNSAT) depth K=3 took 3272 ms
Mar 27, 2019 1:07:02 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-07(UNSAT) depth K=3 took 1161 ms
Mar 27, 2019 1:07:03 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(29/202) took 18073 ms. Total solver calls (SAT/UNSAT): 1364(929/435)
Mar 27, 2019 1:07:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-08(UNSAT) depth K=3 took 2192 ms
Mar 27, 2019 1:07:05 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-09(UNSAT) depth K=3 took 808 ms
Mar 27, 2019 1:07:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-10(UNSAT) depth K=3 took 1641 ms
Mar 27, 2019 1:07:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(32/202) took 22013 ms. Total solver calls (SAT/UNSAT): 1568(1091/477)
Mar 27, 2019 1:07:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-11(UNSAT) depth K=3 took 2404 ms
Mar 27, 2019 1:07:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-12(UNSAT) depth K=3 took 708 ms
Mar 27, 2019 1:07:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(35/202) took 25428 ms. Total solver calls (SAT/UNSAT): 1763(1253/510)
Mar 27, 2019 1:07:12 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-13(UNSAT) depth K=3 took 2483 ms
Mar 27, 2019 1:07:13 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-14(UNSAT) depth K=3 took 879 ms
Mar 27, 2019 1:07:14 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(39/202) took 29323 ms. Total solver calls (SAT/UNSAT): 1961(1413/548)
Mar 27, 2019 1:07:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-15(UNSAT) depth K=3 took 1682 ms
Mar 27, 2019 1:07:17 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(42/202) took 32367 ms. Total solver calls (SAT/UNSAT): 2120(1554/566)
Mar 27, 2019 1:07:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(49/202) took 35739 ms. Total solver calls (SAT/UNSAT): 2480(1853/627)
Mar 27, 2019 1:07:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-00(UNSAT) depth K=4 took 7348 ms
Mar 27, 2019 1:07:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(57/202) took 39087 ms. Total solver calls (SAT/UNSAT): 2868(2077/791)
Mar 27, 2019 1:07:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-01(UNSAT) depth K=4 took 2163 ms
Mar 27, 2019 1:07:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(64/202) took 42309 ms. Total solver calls (SAT/UNSAT): 3242(2313/929)
Mar 27, 2019 1:07:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(71/202) took 45364 ms. Total solver calls (SAT/UNSAT): 3586(2507/1079)
Mar 27, 2019 1:07:30 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-02(UNSAT) depth K=4 took 6038 ms
Mar 27, 2019 1:07:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-03(UNSAT) depth K=4 took 2469 ms
Mar 27, 2019 1:07:33 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(76/202) took 48477 ms. Total solver calls (SAT/UNSAT): 3878(2571/1307)
Mar 27, 2019 1:07:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(83/202) took 52027 ms. Total solver calls (SAT/UNSAT): 4249(2678/1571)
Mar 27, 2019 1:07:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-04(UNSAT) depth K=4 took 5814 ms
Mar 27, 2019 1:07:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(93/202) took 55129 ms. Total solver calls (SAT/UNSAT): 4586(2800/1786)
Mar 27, 2019 1:07:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(102/202) took 58275 ms. Total solver calls (SAT/UNSAT): 4937(2822/2115)
Mar 27, 2019 1:07:43 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-05(UNSAT) depth K=4 took 4549 ms
Mar 27, 2019 1:07:47 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(118/202) took 61793 ms. Total solver calls (SAT/UNSAT): 5331(3033/2298)
Mar 27, 2019 1:07:50 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(128/202) took 64813 ms. Total solver calls (SAT/UNSAT): 5661(3195/2466)
Mar 27, 2019 1:07:51 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-06(UNSAT) depth K=4 took 7649 ms
Mar 27, 2019 1:07:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(142/202) took 67895 ms. Total solver calls (SAT/UNSAT): 6005(3304/2701)
Mar 27, 2019 1:07:54 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-07(UNSAT) depth K=4 took 2745 ms
Mar 27, 2019 1:07:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(172/202) took 70951 ms. Total solver calls (SAT/UNSAT): 6346(3306/3040)
Mar 27, 2019 1:07:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-08(UNSAT) depth K=4 took 2606 ms
Mar 27, 2019 1:07:58 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-09(UNSAT) depth K=4 took 1959 ms
Mar 27, 2019 1:07:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(195/202) took 73965 ms. Total solver calls (SAT/UNSAT): 6699(3406/3293)
Mar 27, 2019 1:07:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 74140 ms. Total solver calls (SAT/UNSAT): 6714(3414/3300)
Mar 27, 2019 1:07:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 202 transitions.
Mar 27, 2019 1:08:00 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 549 ms. Total solver calls (SAT/UNSAT): 61(0/61)
Mar 27, 2019 1:08:00 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 81379ms conformant to PINS in folder :/home/mcc/execution
Mar 27, 2019 1:08:18 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-10(UNSAT) depth K=4 took 20223 ms
Mar 27, 2019 1:08:40 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-11(UNSAT) depth K=4 took 21491 ms
Mar 27, 2019 1:09:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-12(UNSAT) depth K=4 took 39051 ms
Mar 27, 2019 1:10:19 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-13(UNSAT) depth K=4 took 59570 ms
Mar 27, 2019 1:10:57 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-14(UNSAT) depth K=4 took 38044 ms
Mar 27, 2019 1:11:20 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-5-ReachabilityCardinality-15(UNSAT) depth K=4 took 23401 ms
Mar 27, 2019 1:13:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Mar 27, 2019 1:13:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying ParamProductionCell-PT-5-ReachabilityCardinality-14 SMT depth 5
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
Mar 27, 2019 1:13:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 5
Mar 27, 2019 1:13:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 5

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ParamProductionCell-PT-5"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsm"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstoolsm"
echo " Input is ParamProductionCell-PT-5, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r197-oct2-155272230500305"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ParamProductionCell-PT-5.tgz
mv ParamProductionCell-PT-5 execution
cd execution
if [ "ReachabilityCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;