fond
Model Checking Contest 2019
9th edition, Prague, Czech Republic, April 7, 2019 (TOOLympics)
Execution of r196-smll-155246587200170
Last Updated
Apr 15, 2019

About the Execution of ITS-Tools.M for LamportFastMutEx-COL-7

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
11636.470 3600000.00 14272899.00 406.90 FTT?T?FTT?FFT?T? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2019-input.r196-smll-155246587200170.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2019-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-3957
Executing tool itstoolsm
Input is LamportFastMutEx-COL-7, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r196-smll-155246587200170
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 216K
-rw-r--r-- 1 mcc users 4.2K Feb 11 22:46 CTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 11 22:46 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 7 23:36 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 7 23:36 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 109 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 347 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.4K Feb 5 00:11 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.6K Feb 5 00:11 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Feb 4 22:36 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.6K Feb 4 22:36 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K Feb 4 06:23 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K Feb 4 06:23 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.3K Jan 31 23:55 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 20K Jan 31 23:55 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 4 22:21 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 4 22:21 UpperBounds.xml

-rw-r--r-- 1 mcc users 5 Jan 29 09:34 equiv_pt
-rw-r--r-- 1 mcc users 2 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 43K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-00
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-01
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-02
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-03
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-04
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-05
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-06
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-07
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-08
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-09
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-10
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-11
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-12
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-13
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-14
FORMULA_NAME LamportFastMutEx-COL-7-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1553660640101

04:24:02.921 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
04:24:02.925 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness, --load-order, /home/mcc/execution/model.ord], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness --load-order /home/mcc/execution/model.ord
Successfully loaded order from file /home/mcc/execution/model.ord
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : LamportFastMutEx-COL-7-ReachabilityCardinality-00 with value :(((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)+P_fordo_12_7)<=(((((((P_ify0_4_0+P_ify0_4_1)+P_ify0_4_2)+P_ify0_4_3)+P_ify0_4_4)+P_ify0_4_5)+P_ify0_4_6)+P_ify0_4_7))||((((((((P_ifxi_10_0+P_ifxi_10_1)+P_ifxi_10_2)+P_ifxi_10_3)+P_ifxi_10_4)+P_ifxi_10_5)+P_ifxi_10_6)+P_ifxi_10_7)<=(((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)+P_start_1_7)))
Read [reachable] property : LamportFastMutEx-COL-7-ReachabilityCardinality-01 with value :((((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)+P_fordo_12_7)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)+done_25)+done_26)+done_27)+done_28)+done_29)+done_30)+done_31)+done_32)+done_33)+done_34)+done_35)+done_36)+done_37)+done_38)+done_39)+done_40)+done_41)+done_42)+done_43)+done_44)+done_45)+done_46)+done_47)+done_48)+done_49)+done_50)+done_51)+done_52)+done_53)+done_54)+done_55)+done_56)+done_57)+done_58)+done_59)+done_60)+done_61)+done_62)+done_63))||((((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6)+P_setx_3_7)>=3))&&((!((((((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)+b_14)+b_15)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)+done_25)+done_26)+done_27)+done_28)+done_29)+done_30)+done_31)+done_32)+done_33)+done_34)+done_35)+done_36)+done_37)+done_38)+done_39)+done_40)+done_41)+done_42)+done_43)+done_44)+done_45)+done_46)+done_47)+done_48)+done_49)+done_50)+done_51)+done_52)+done_53)+done_54)+done_55)+done_56)+done_57)+done_58)+done_59)+done_60)+done_61)+done_62)+done_63)))&&(((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)+P_sety_9_7)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)+wait_49)+wait_50)+wait_51)+wait_52)+wait_53)+wait_54)+wait_55)+wait_56)+wait_57)+wait_58)+wait_59)+wait_60)+wait_61)+wait_62)+wait_63))&&((((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)+y_7)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)+done_25)+done_26)+done_27)+done_28)+done_29)+done_30)+done_31)+done_32)+done_33)+done_34)+done_35)+done_36)+done_37)+done_38)+done_39)+done_40)+done_41)+done_42)+done_43)+done_44)+done_45)+done_46)+done_47)+done_48)+done_49)+done_50)+done_51)+done_52)+done_53)+done_54)+done_55)+done_56)+done_57)+done_58)+done_59)+done_60)+done_61)+done_62)+done_63)))))
Read [reachable] property : LamportFastMutEx-COL-7-ReachabilityCardinality-02 with value :((!((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)+x_7)>=3))&&((!((((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)+P_setbi_24_7)>=2))&&(!((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)+P_sety_9_7)<=(((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)+P_start_1_7)))))
Read [reachable] property : LamportFastMutEx-COL-7-ReachabilityCardinality-03 with value :(((((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)+P_setbi_24_7)>=3)&&(!(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)+wait_49)+wait_50)+wait_51)+wait_52)+wait_53)+wait_54)+wait_55)+wait_56)+wait_57)+wait_58)+wait_59)+wait_60)+wait_61)+wait_62)+wait_63)<=(((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)+P_awaity_7))&&((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)+x_7)>=2))))
Read [reachable] property : LamportFastMutEx-COL-7-ReachabilityCardinality-04 with value :((((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)+P_awaity_7)>=1)
Read [reachable] property : LamportFastMutEx-COL-7-ReachabilityCardinality-05 with value :(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)+wait_49)+wait_50)+wait_51)+wait_52)+wait_53)+wait_54)+wait_55)+wait_56)+wait_57)+wait_58)+wait_59)+wait_60)+wait_61)+wait_62)+wait_63)<=(((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)+P_ifyi_15_7))&&((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)+P_sety_9_7)>=1))&&(((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)+P_sety_9_7)<=(((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)+P_await_13_7))&&((((((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)+b_14)+b_15)>=3)))&&((((((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)+P_start_1_7)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)+done_25)+done_26)+done_27)+done_28)+done_29)+done_30)+done_31)+done_32)+done_33)+done_34)+done_35)+done_36)+done_37)+done_38)+done_39)+done_40)+done_41)+done_42)+done_43)+done_44)+done_45)+done_46)+done_47)+done_48)+done_49)+done_50)+done_51)+done_52)+done_53)+done_54)+done_55)+done_56)+done_57)+done_58)+done_59)+done_60)+done_61)+done_62)+done_63))&&((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)+P_ifyi_15_7)<=(((((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)+b_14)+b_15)))||(((((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)+y_7)<=(((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)+P_start_1_7))||((((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)+P_start_1_7)>=2))))
Read [invariant] property : LamportFastMutEx-COL-7-ReachabilityCardinality-06 with value :((!(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)+done_25)+done_26)+done_27)+done_28)+done_29)+done_30)+done_31)+done_32)+done_33)+done_34)+done_35)+done_36)+done_37)+done_38)+done_39)+done_40)+done_41)+done_42)+done_43)+done_44)+done_45)+done_46)+done_47)+done_48)+done_49)+done_50)+done_51)+done_52)+done_53)+done_54)+done_55)+done_56)+done_57)+done_58)+done_59)+done_60)+done_61)+done_62)+done_63)>=2)||((((((((P_ifxi_10_0+P_ifxi_10_1)+P_ifxi_10_2)+P_ifxi_10_3)+P_ifxi_10_4)+P_ifxi_10_5)+P_ifxi_10_6)+P_ifxi_10_7)>=2)))&&((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)+wait_49)+wait_50)+wait_51)+wait_52)+wait_53)+wait_54)+wait_55)+wait_56)+wait_57)+wait_58)+wait_59)+wait_60)+wait_61)+wait_62)+wait_63)>=1)&&((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)+x_7)>=3))||(!((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)+P_sety_9_7)>=3))))
Read [reachable] property : LamportFastMutEx-COL-7-ReachabilityCardinality-07 with value :((((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)+P_setbi_5_7)>=3)
Read [reachable] property : LamportFastMutEx-COL-7-ReachabilityCardinality-08 with value :((!(((((((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4)+P_setbi_11_5)+P_setbi_11_6)+P_setbi_11_7)<=(((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6)+P_setx_3_7))||((((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)+P_setbi_5_7)>=2)))&&((((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)+P_setbi_5_7)<=(((((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)+b_14)+b_15)))
Read [invariant] property : LamportFastMutEx-COL-7-ReachabilityCardinality-09 with value :((((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)+y_7)>=1)
Read [invariant] property : LamportFastMutEx-COL-7-ReachabilityCardinality-10 with value :(!((((((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)+y_7)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)+wait_49)+wait_50)+wait_51)+wait_52)+wait_53)+wait_54)+wait_55)+wait_56)+wait_57)+wait_58)+wait_59)+wait_60)+wait_61)+wait_62)+wait_63))&&((((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)+P_start_1_7)<=(((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)+P_await_13_7)))||((((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)+y_7)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)+wait_49)+wait_50)+wait_51)+wait_52)+wait_53)+wait_54)+wait_55)+wait_56)+wait_57)+wait_58)+wait_59)+wait_60)+wait_61)+wait_62)+wait_63))))
Read [invariant] property : LamportFastMutEx-COL-7-ReachabilityCardinality-11 with value :(((((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)+P_awaity_7)<=(((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)+y_7))||((!((((((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4)+P_setx_3_5)+P_setx_3_6)+P_setx_3_7)>=2))||(((((((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4)+P_setbi_11_5)+P_setbi_11_6)+P_setbi_11_7)<=(((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)+P_ifyi_15_7))&&((((((((P_ify0_4_0+P_ify0_4_1)+P_ify0_4_2)+P_ify0_4_3)+P_ify0_4_4)+P_ify0_4_5)+P_ify0_4_6)+P_ify0_4_7)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)+wait_49)+wait_50)+wait_51)+wait_52)+wait_53)+wait_54)+wait_55)+wait_56)+wait_57)+wait_58)+wait_59)+wait_60)+wait_61)+wait_62)+wait_63)))))
Read [reachable] property : LamportFastMutEx-COL-7-ReachabilityCardinality-12 with value :(((((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)+P_start_1_7)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)+wait_49)+wait_50)+wait_51)+wait_52)+wait_53)+wait_54)+wait_55)+wait_56)+wait_57)+wait_58)+wait_59)+wait_60)+wait_61)+wait_62)+wait_63))&&((!((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)+P_sety_9_7)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)+wait_49)+wait_50)+wait_51)+wait_52)+wait_53)+wait_54)+wait_55)+wait_56)+wait_57)+wait_58)+wait_59)+wait_60)+wait_61)+wait_62)+wait_63)))||((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)+P_fordo_12_7)>=1)))
Read [invariant] property : LamportFastMutEx-COL-7-ReachabilityCardinality-13 with value :(((((((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)+y_7)<=(((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)+P_ifyi_15_7))&&((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)+P_ifyi_15_7)>=1))||(((((((((P_ify0_4_0+P_ify0_4_1)+P_ify0_4_2)+P_ify0_4_3)+P_ify0_4_4)+P_ify0_4_5)+P_ify0_4_6)+P_ify0_4_7)<=(((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)+P_setbi_5_7))||((((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)+P_start_1_7)<=(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)+P_CS_21_7))))||((((((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)+b_14)+b_15)>=1))
Read [reachable] property : LamportFastMutEx-COL-7-ReachabilityCardinality-14 with value :((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)+P_sety_9_7)>=3)
Read [invariant] property : LamportFastMutEx-COL-7-ReachabilityCardinality-15 with value :(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)+done_25)+done_26)+done_27)+done_28)+done_29)+done_30)+done_31)+done_32)+done_33)+done_34)+done_35)+done_36)+done_37)+done_38)+done_39)+done_40)+done_41)+done_42)+done_43)+done_44)+done_45)+done_46)+done_47)+done_48)+done_49)+done_50)+done_51)+done_52)+done_53)+done_54)+done_55)+done_56)+done_57)+done_58)+done_59)+done_60)+done_61)+done_62)+done_63)<=(((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)+P_setbi_24_7))||((!((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)+P_fordo_12_7)>=2))||(!((((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)+P_awaity_7)<=(((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)+y_7)))))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 392
// Phase 1: matrix 392 rows 264 cols
invariant :wait_27 + -1'P_await_13_3 + done_27 = 0
invariant :wait_2 + -1'P_await_13_0 + done_2 = 0
invariant :wait_35 + -1'P_await_13_4 + done_35 = 0
invariant :b_10 + b_11 = 1
invariant :P_start_1_6 + P_setx_3_6 + P_setbi_5_6 + P_ify0_4_6 + P_sety_9_6 + P_ifxi_10_6 + P_setbi_11_6 + P_fordo_12_6 + P_await_13_6 + P_ifyi_15_6 + P_awaity_6 + P_CS_21_6 + P_setbi_24_6 = 1
invariant :wait_32 + done_32 = 0
invariant :wait_6 + -1'P_await_13_0 + done_6 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :wait_14 + -1'P_await_13_1 + done_14 = 0
invariant :wait_42 + -1'P_await_13_5 + done_42 = 0
invariant :wait_39 + -1'P_await_13_4 + done_39 = 0
invariant :wait_43 + -1'P_await_13_5 + done_43 = 0
invariant :wait_40 + done_40 = 0
invariant :b_0 + b_1 = 0
invariant :wait_52 + -1'P_await_13_6 + done_52 = 0
invariant :wait_53 + -1'P_await_13_6 + done_53 = 0
invariant :wait_26 + -1'P_await_13_3 + done_26 = 0
invariant :wait_60 + -1'P_await_13_7 + done_60 = 0
invariant :wait_5 + -1'P_await_13_0 + done_5 = 0
invariant :wait_22 + -1'P_await_13_2 + done_22 = 0
invariant :wait_55 + -1'P_await_13_6 + done_55 = 0
invariant :wait_31 + -1'P_await_13_3 + done_31 = 0
invariant :wait_17 + -1'P_await_13_2 + done_17 = 0
invariant :b_8 + b_9 = 1
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :wait_41 + -1'P_await_13_5 + done_41 = 0
invariant :wait_10 + -1'P_await_13_1 + done_10 = 0
invariant :wait_29 + -1'P_await_13_3 + done_29 = 0
invariant :wait_21 + -1'P_await_13_2 + done_21 = 0
invariant :wait_50 + -1'P_await_13_6 + done_50 = 0
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :b_2 + b_3 = 1
invariant :wait_1 + -1'P_await_13_0 + done_1 = 0
invariant :wait_0 + done_0 = 0
invariant :wait_11 + -1'P_await_13_1 + done_11 = 0
invariant :wait_8 + done_8 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :wait_13 + -1'P_await_13_1 + done_13 = 0
invariant :wait_23 + -1'P_await_13_2 + done_23 = 0
invariant :wait_7 + -1'P_await_13_0 + done_7 = 0
invariant :wait_47 + -1'P_await_13_5 + done_47 = 0
invariant :wait_38 + -1'P_await_13_4 + done_38 = 0
invariant :b_14 + b_15 = 1
invariant :wait_63 + -1'P_await_13_7 + done_63 = 0
invariant :wait_62 + -1'P_await_13_7 + done_62 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 + y_5 + y_6 + y_7 = 1
invariant :wait_57 + -1'P_await_13_7 + done_57 = 0
invariant :wait_49 + -1'P_await_13_6 + done_49 = 0
invariant :wait_36 + -1'P_await_13_4 + done_36 = 0
invariant :b_6 + b_7 = 1
invariant :wait_20 + -1'P_await_13_2 + done_20 = 0
invariant :wait_45 + -1'P_await_13_5 + done_45 = 0
invariant :P_start_1_5 + P_setx_3_5 + P_setbi_5_5 + P_ify0_4_5 + P_sety_9_5 + P_ifxi_10_5 + P_setbi_11_5 + P_fordo_12_5 + P_await_13_5 + P_ifyi_15_5 + P_awaity_5 + P_CS_21_5 + P_setbi_24_5 = 1
invariant :wait_18 + -1'P_await_13_2 + done_18 = 0
invariant :wait_48 + done_48 = 0
invariant :wait_9 + -1'P_await_13_1 + done_9 = 0
invariant :b_12 + b_13 = 1
invariant :wait_61 + -1'P_await_13_7 + done_61 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :wait_33 + -1'P_await_13_4 + done_33 = 0
invariant :wait_56 + done_56 = 0
invariant :wait_19 + -1'P_await_13_2 + done_19 = 0
invariant :wait_25 + -1'P_await_13_3 + done_25 = 0
invariant :b_4 + b_5 = 1
invariant :wait_28 + -1'P_await_13_3 + done_28 = 0
invariant :wait_34 + -1'P_await_13_4 + done_34 = 0
invariant :wait_44 + -1'P_await_13_5 + done_44 = 0
invariant :wait_58 + -1'P_await_13_7 + done_58 = 0
invariant :wait_46 + -1'P_await_13_5 + done_46 = 0
invariant :wait_12 + -1'P_await_13_1 + done_12 = 0
invariant :wait_15 + -1'P_await_13_1 + done_15 = 0
invariant :wait_4 + -1'P_await_13_0 + done_4 = 0
invariant :wait_59 + -1'P_await_13_7 + done_59 = 0
invariant :wait_30 + -1'P_await_13_3 + done_30 = 0
invariant :wait_54 + -1'P_await_13_6 + done_54 = 0
invariant :wait_51 + -1'P_await_13_6 + done_51 = 0
invariant :wait_37 + -1'P_await_13_4 + done_37 = 0
invariant :wait_3 + -1'P_await_13_0 + done_3 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 + x_5 + x_6 + x_7 = 1
invariant :wait_16 + done_16 = 0
invariant :P_start_1_7 + P_setx_3_7 + P_setbi_5_7 + P_ify0_4_7 + P_sety_9_7 + P_ifxi_10_7 + P_setbi_11_7 + P_fordo_12_7 + P_await_13_7 + P_ifyi_15_7 + P_awaity_7 + P_CS_21_7 + P_setbi_24_7 = 1
invariant :wait_24 + done_24 = 0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 10159 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 215 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality00==true], workingDir=/home/mcc/execution]
LTSmin run took 107344 ms.
Found Violation
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality01==true], workingDir=/home/mcc/execution]
LTSmin run took 3908 ms.
Found Violation
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-01 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality02==true], workingDir=/home/mcc/execution]
LTSmin run took 4000 ms.
Found Violation
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-02 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality04==true], workingDir=/home/mcc/execution]
LTSmin run took 2413 ms.
Found Violation
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-04 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality05==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality05==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality06==true], workingDir=/home/mcc/execution]
LTSmin run took 2719 ms.
Found Violation
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality07==true], workingDir=/home/mcc/execution]
LTSmin run took 44396 ms.
Found Violation
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-07 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality08==true], workingDir=/home/mcc/execution]
LTSmin run took 1901 ms.
Found Violation
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-08 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality09==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality09==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality10==true], workingDir=/home/mcc/execution]
LTSmin run took 3233 ms.
Found Violation
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality11==true], workingDir=/home/mcc/execution]
LTSmin run took 122728 ms.
Found Violation
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality12==true], workingDir=/home/mcc/execution]
LTSmin run took 4031 ms.
Found Violation
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-12 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality13==true], workingDir=/home/mcc/execution]
Detected timeout of ITS tools.
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : LamportFastMutEx-COL-7-ReachabilityCardinality-03 with value :(((((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)+P_setbi_24_7)>=3)&&(!(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)+wait_49)+wait_50)+wait_51)+wait_52)+wait_53)+wait_54)+wait_55)+wait_56)+wait_57)+wait_58)+wait_59)+wait_60)+wait_61)+wait_62)+wait_63)<=(((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)+P_awaity_7))&&((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)+x_7)>=2))))
Read [reachable] property : LamportFastMutEx-COL-7-ReachabilityCardinality-05 with value :(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)+wait_49)+wait_50)+wait_51)+wait_52)+wait_53)+wait_54)+wait_55)+wait_56)+wait_57)+wait_58)+wait_59)+wait_60)+wait_61)+wait_62)+wait_63)<=(((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)+P_ifyi_15_7))&&((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)+P_sety_9_7)>=1))&&(((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)+P_sety_9_7)<=(((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)+P_await_13_7))&&((((((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)+b_14)+b_15)>=3)))&&((((((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)+P_start_1_7)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)+done_25)+done_26)+done_27)+done_28)+done_29)+done_30)+done_31)+done_32)+done_33)+done_34)+done_35)+done_36)+done_37)+done_38)+done_39)+done_40)+done_41)+done_42)+done_43)+done_44)+done_45)+done_46)+done_47)+done_48)+done_49)+done_50)+done_51)+done_52)+done_53)+done_54)+done_55)+done_56)+done_57)+done_58)+done_59)+done_60)+done_61)+done_62)+done_63))&&((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)+P_ifyi_15_7)<=(((((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)+b_14)+b_15)))||(((((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)+y_7)<=(((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)+P_start_1_7))||((((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)+P_start_1_7)>=2))))
Read [invariant] property : LamportFastMutEx-COL-7-ReachabilityCardinality-09 with value :((((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)+y_7)>=1)
Read [invariant] property : LamportFastMutEx-COL-7-ReachabilityCardinality-13 with value :(((((((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)+y_7)<=(((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)+P_ifyi_15_7))&&((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)+P_ifyi_15_7)>=1))||(((((((((P_ify0_4_0+P_ify0_4_1)+P_ify0_4_2)+P_ify0_4_3)+P_ify0_4_4)+P_ify0_4_5)+P_ify0_4_6)+P_ify0_4_7)<=(((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)+P_setbi_5_7))||((((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)+P_start_1_7)<=(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)+P_CS_21_7))))||((((((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)+b_14)+b_15)>=1))
Read [reachable] property : LamportFastMutEx-COL-7-ReachabilityCardinality-14 with value :((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)+P_sety_9_7)>=3)
Read [invariant] property : LamportFastMutEx-COL-7-ReachabilityCardinality-15 with value :(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)+done_25)+done_26)+done_27)+done_28)+done_29)+done_30)+done_31)+done_32)+done_33)+done_34)+done_35)+done_36)+done_37)+done_38)+done_39)+done_40)+done_41)+done_42)+done_43)+done_44)+done_45)+done_46)+done_47)+done_48)+done_49)+done_50)+done_51)+done_52)+done_53)+done_54)+done_55)+done_56)+done_57)+done_58)+done_59)+done_60)+done_61)+done_62)+done_63)<=(((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)+P_setbi_24_7))||((!((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)+P_fordo_12_7)>=2))||(!((((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)+P_awaity_7)<=(((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)+y_7)))))
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality13==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality14==true], workingDir=/home/mcc/execution]
LTSmin run took 2043 ms.
Found Violation
FORMULA LamportFastMutEx-COL-7-ReachabilityCardinality-14 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality15==true], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality15==true], workingDir=/home/mcc/execution]
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
Detected timeout of ITS tools.
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : LamportFastMutEx-COL-7-ReachabilityCardinality-03 with value :(((((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)+P_setbi_24_7)>=3)&&(!(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)+wait_49)+wait_50)+wait_51)+wait_52)+wait_53)+wait_54)+wait_55)+wait_56)+wait_57)+wait_58)+wait_59)+wait_60)+wait_61)+wait_62)+wait_63)<=(((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)+P_awaity_7))&&((((((((x_0+x_1)+x_2)+x_3)+x_4)+x_5)+x_6)+x_7)>=2))))
Read [reachable] property : LamportFastMutEx-COL-7-ReachabilityCardinality-05 with value :(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)+wait_25)+wait_26)+wait_27)+wait_28)+wait_29)+wait_30)+wait_31)+wait_32)+wait_33)+wait_34)+wait_35)+wait_36)+wait_37)+wait_38)+wait_39)+wait_40)+wait_41)+wait_42)+wait_43)+wait_44)+wait_45)+wait_46)+wait_47)+wait_48)+wait_49)+wait_50)+wait_51)+wait_52)+wait_53)+wait_54)+wait_55)+wait_56)+wait_57)+wait_58)+wait_59)+wait_60)+wait_61)+wait_62)+wait_63)<=(((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)+P_ifyi_15_7))&&((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)+P_sety_9_7)>=1))&&(((((((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)+P_sety_9_5)+P_sety_9_6)+P_sety_9_7)<=(((((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)+P_await_13_5)+P_await_13_6)+P_await_13_7))&&((((((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)+b_14)+b_15)>=3)))&&((((((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)+P_start_1_7)<=(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)+done_25)+done_26)+done_27)+done_28)+done_29)+done_30)+done_31)+done_32)+done_33)+done_34)+done_35)+done_36)+done_37)+done_38)+done_39)+done_40)+done_41)+done_42)+done_43)+done_44)+done_45)+done_46)+done_47)+done_48)+done_49)+done_50)+done_51)+done_52)+done_53)+done_54)+done_55)+done_56)+done_57)+done_58)+done_59)+done_60)+done_61)+done_62)+done_63))&&((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)+P_ifyi_15_7)<=(((((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)+b_14)+b_15)))||(((((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)+y_7)<=(((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)+P_start_1_7))||((((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)+P_start_1_7)>=2))))
Read [invariant] property : LamportFastMutEx-COL-7-ReachabilityCardinality-09 with value :((((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)+y_7)>=1)
Read [invariant] property : LamportFastMutEx-COL-7-ReachabilityCardinality-13 with value :(((((((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)+y_7)<=(((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)+P_ifyi_15_7))&&((((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)+P_ifyi_15_5)+P_ifyi_15_6)+P_ifyi_15_7)>=1))||(((((((((P_ify0_4_0+P_ify0_4_1)+P_ify0_4_2)+P_ify0_4_3)+P_ify0_4_4)+P_ify0_4_5)+P_ify0_4_6)+P_ify0_4_7)<=(((((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)+P_setbi_5_5)+P_setbi_5_6)+P_setbi_5_7))||((((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)+P_start_1_5)+P_start_1_6)+P_start_1_7)<=(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)+P_CS_21_5)+P_CS_21_6)+P_CS_21_7))))||((((((((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)+b_10)+b_11)+b_12)+b_13)+b_14)+b_15)>=1))
Read [invariant] property : LamportFastMutEx-COL-7-ReachabilityCardinality-15 with value :(((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)+done_25)+done_26)+done_27)+done_28)+done_29)+done_30)+done_31)+done_32)+done_33)+done_34)+done_35)+done_36)+done_37)+done_38)+done_39)+done_40)+done_41)+done_42)+done_43)+done_44)+done_45)+done_46)+done_47)+done_48)+done_49)+done_50)+done_51)+done_52)+done_53)+done_54)+done_55)+done_56)+done_57)+done_58)+done_59)+done_60)+done_61)+done_62)+done_63)<=(((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)+P_setbi_24_5)+P_setbi_24_6)+P_setbi_24_7))||((!((((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)+P_fordo_12_5)+P_fordo_12_6)+P_fordo_12_7)>=2))||(!((((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)+P_awaity_5)+P_awaity_6)+P_awaity_7)<=(((((((y_0+y_1)+y_2)+y_3)+y_4)+y_5)+y_6)+y_7)))))
WARNING : LTSmin timed out (>1800 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality03==true], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -i, LamportFastMutExCOL7ReachabilityCardinality05==true], workingDir=/home/mcc/execution]

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 27, 2019 4:24:02 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt]
Mar 27, 2019 4:24:02 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 27, 2019 4:24:02 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
Mar 27, 2019 4:24:03 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 988 ms
Mar 27, 2019 4:24:03 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 18 places.
Mar 27, 2019 4:24:03 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
Mar 27, 2019 4:24:03 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :pid * pid->wait,done,
pid * bool->b,
pid->P-start_1,x,y,P-setx_3,P-setbi_5,P-ify0_4,P-sety_9,P-ifxi_10,P-setbi_11,P-fordo_12,P-await_13,P-ifyi_15,P-awaity,P-CS_21,P-setbi_24,

Mar 27, 2019 4:24:03 AM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 17 transitions.
Mar 27, 2019 4:24:03 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
Mar 27, 2019 4:24:03 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 11 ms
Mar 27, 2019 4:24:03 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $y of transition T_yeqi_15
Mar 27, 2019 4:24:03 AM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $x of transition T_xeqi_10
Mar 27, 2019 4:24:03 AM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 17.0 instantiations of transitions. Total transitions/syncs built is 499
Mar 27, 2019 4:24:03 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 204 ms
Mar 27, 2019 4:24:05 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 111 ms
Mar 27, 2019 4:24:05 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 115 ms
Mar 27, 2019 4:24:05 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 84 transitions. Expanding to a total of 619 deterministic transitions.
Mar 27, 2019 4:24:05 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 26 ms.
Mar 27, 2019 4:24:05 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 84 transitions. Expanding to a total of 619 deterministic transitions.
Mar 27, 2019 4:24:05 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 2 ms.
Mar 27, 2019 4:24:05 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 84 transitions. Expanding to a total of 619 deterministic transitions.
Mar 27, 2019 4:24:05 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 2 ms.
Mar 27, 2019 4:24:05 AM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 264 places.
Mar 27, 2019 4:24:05 AM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 536 transitions.
Mar 27, 2019 4:24:05 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 12 ms
Mar 27, 2019 4:24:05 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 5 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 82 place invariants in 135 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 1078 ms.
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-00(UNSAT) depth K=0 took 15 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-01(UNSAT) depth K=0 took 8 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-02(UNSAT) depth K=0 took 5 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-03(UNSAT) depth K=0 took 13 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-04(UNSAT) depth K=0 took 11 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-05(UNSAT) depth K=0 took 11 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-06(UNSAT) depth K=0 took 15 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-07(UNSAT) depth K=0 took 15 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-08(UNSAT) depth K=0 took 15 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-09(UNSAT) depth K=0 took 2 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-10(UNSAT) depth K=0 took 15 ms
Exception in thread "Thread-8" Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-11(UNSAT) depth K=0 took 12 ms
java.lang.NullPointerException
at fr.lip6.move.gal.semantics.DeterministicNextBuilder$1.visit(DeterministicNextBuilder.java:49)
at fr.lip6.move.gal.semantics.DeterministicNextBuilder$1.visit(DeterministicNextBuilder.java:1)
at fr.lip6.move.gal.semantics.Sequence.accept(Sequence.java:67)
at fr.lip6.move.gal.semantics.DeterministicNextBuilder$1.visit(DeterministicNextBuilder.java:40)
at fr.lip6.move.gal.semantics.DeterministicNextBuilder$1.visit(DeterministicNextBuilder.java:1)
at fr.lip6.move.gal.semantics.Alternative.accept(Alternative.java:71)
at fr.lip6.move.gal.semantics.DeterministicNextBuilder.getDeterministicNext(DeterministicNextBuilder.java:56)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.init(NextBMCSolver.java:83)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:59)
at fr.lip6.move.gal.gal2smt.smt.ISMTSolver.init(ISMTSolver.java:17)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:278)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-12(UNSAT) depth K=0 took 3 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-13(UNSAT) depth K=0 took 3 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-14(UNSAT) depth K=0 took 10 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-15(UNSAT) depth K=0 took 7 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-00(UNSAT) depth K=1 took 12 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-01(UNSAT) depth K=1 took 38 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-02(UNSAT) depth K=1 took 8 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-03(UNSAT) depth K=1 took 11 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-04(UNSAT) depth K=1 took 9 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-05(UNSAT) depth K=1 took 40 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-06(UNSAT) depth K=1 took 44 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-07(UNSAT) depth K=1 took 11 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-08(UNSAT) depth K=1 took 9 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-09(UNSAT) depth K=1 took 4 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-10(UNSAT) depth K=1 took 16 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-11(UNSAT) depth K=1 took 8 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-12(UNSAT) depth K=1 took 17 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-13(UNSAT) depth K=1 took 10 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-14(UNSAT) depth K=1 took 9 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-15(UNSAT) depth K=1 took 19 ms
Mar 27, 2019 4:24:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-00(UNSAT) depth K=2 took 216 ms
Mar 27, 2019 4:24:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-01(UNSAT) depth K=2 took 391 ms
Mar 27, 2019 4:24:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-02(UNSAT) depth K=2 took 300 ms
Mar 27, 2019 4:24:07 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-03(UNSAT) depth K=2 took 261 ms
Mar 27, 2019 4:24:07 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 264 variables to be positive in 1928 ms
Mar 27, 2019 4:24:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 536 transitions.
Mar 27, 2019 4:24:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/536 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 27, 2019 4:24:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 85 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 27, 2019 4:24:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 536 transitions.
Mar 27, 2019 4:24:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 23 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 27, 2019 4:24:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-04(UNSAT) depth K=2 took 321 ms
Mar 27, 2019 4:24:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-05(UNSAT) depth K=2 took 998 ms
Mar 27, 2019 4:24:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-06(UNSAT) depth K=2 took 334 ms
Mar 27, 2019 4:24:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-07(UNSAT) depth K=2 took 562 ms
Mar 27, 2019 4:24:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-08(UNSAT) depth K=2 took 541 ms
Mar 27, 2019 4:24:10 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-09(UNSAT) depth K=2 took 150 ms
Mar 27, 2019 4:24:11 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-10(UNSAT) depth K=2 took 351 ms
Mar 27, 2019 4:24:11 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-11(UNSAT) depth K=2 took 214 ms
Mar 27, 2019 4:24:11 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-12(UNSAT) depth K=2 took 495 ms
Mar 27, 2019 4:24:12 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-13(UNSAT) depth K=2 took 585 ms
Mar 27, 2019 4:24:14 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-14(UNSAT) depth K=2 took 2062 ms
Mar 27, 2019 4:24:14 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-15(UNSAT) depth K=2 took 300 ms
Mar 27, 2019 4:24:18 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-00(UNSAT) depth K=3 took 3282 ms
Mar 27, 2019 4:24:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-01(UNSAT) depth K=3 took 26836 ms
Mar 27, 2019 4:24:53 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-02(UNSAT) depth K=3 took 8766 ms
Mar 27, 2019 4:24:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 536 transitions.
Mar 27, 2019 4:24:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/536) took 44 ms. Total solver calls (SAT/UNSAT): 73(0/73)
Mar 27, 2019 4:24:57 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(34/536) took 3059 ms. Total solver calls (SAT/UNSAT): 4333(214/4119)
Mar 27, 2019 4:24:59 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-03(UNSAT) depth K=3 took 5509 ms
Mar 27, 2019 4:25:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(63/536) took 6089 ms. Total solver calls (SAT/UNSAT): 8480(469/8011)
Mar 27, 2019 4:25:01 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-04(UNSAT) depth K=3 took 2384 ms
Mar 27, 2019 4:25:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(87/536) took 9174 ms. Total solver calls (SAT/UNSAT): 12676(777/11899)
Mar 27, 2019 4:25:07 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(97/536) took 12652 ms. Total solver calls (SAT/UNSAT): 15421(972/14449)
Mar 27, 2019 4:25:08 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-05(UNSAT) depth K=3 took 6811 ms
Mar 27, 2019 4:25:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(113/536) took 15775 ms. Total solver calls (SAT/UNSAT): 19605(1308/18297)
Mar 27, 2019 4:25:13 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(130/536) took 18783 ms. Total solver calls (SAT/UNSAT): 23770(1670/22100)
Mar 27, 2019 4:25:15 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-06(UNSAT) depth K=3 took 7166 ms
Mar 27, 2019 4:25:16 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(159/536) took 21892 ms. Total solver calls (SAT/UNSAT): 27632(2051/25581)
Mar 27, 2019 4:25:19 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(179/536) took 25019 ms. Total solver calls (SAT/UNSAT): 31862(2395/29467)
Mar 27, 2019 4:25:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-07(UNSAT) depth K=3 took 7445 ms
Mar 27, 2019 4:25:22 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(201/536) took 28050 ms. Total solver calls (SAT/UNSAT): 36053(2715/33338)
Mar 27, 2019 4:25:26 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(225/536) took 31111 ms. Total solver calls (SAT/UNSAT): 40073(3072/37001)
Mar 27, 2019 4:25:29 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(271/536) took 34125 ms. Total solver calls (SAT/UNSAT): 43928(3301/40627)
Mar 27, 2019 4:25:32 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(348/536) took 37132 ms. Total solver calls (SAT/UNSAT): 46596(3614/42982)
Mar 27, 2019 4:25:32 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-08(UNSAT) depth K=3 took 9315 ms
Mar 27, 2019 4:25:35 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(404/536) took 40189 ms. Total solver calls (SAT/UNSAT): 49976(3934/46042)
Mar 27, 2019 4:25:38 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(445/536) took 43207 ms. Total solver calls (SAT/UNSAT): 53625(4284/49341)
Mar 27, 2019 4:25:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 45906 ms. Total solver calls (SAT/UNSAT): 56020(4466/51554)
Mar 27, 2019 4:25:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 536 transitions.
Mar 27, 2019 4:25:41 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-09(UNSAT) depth K=3 took 9320 ms
Mar 27, 2019 4:25:54 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 13152 ms. Total solver calls (SAT/UNSAT): 462(0/462)
Mar 27, 2019 4:25:54 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 108999ms conformant to PINS in folder :/home/mcc/execution
Mar 27, 2019 4:25:54 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-10(UNSAT) depth K=3 took 13324 ms
Mar 27, 2019 4:25:57 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-11(UNSAT) depth K=3 took 2215 ms
Mar 27, 2019 4:26:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-12(UNSAT) depth K=3 took 12753 ms
Mar 27, 2019 4:26:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-13(UNSAT) depth K=3 took 40374 ms
Mar 27, 2019 4:27:09 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-14(UNSAT) depth K=3 took 19418 ms
Mar 27, 2019 4:27:21 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-15(UNSAT) depth K=3 took 11901 ms
Mar 27, 2019 4:29:56 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-00(UNSAT) depth K=4 took 154633 ms
Mar 27, 2019 4:32:50 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-01(UNSAT) depth K=4 took 174275 ms
Mar 27, 2019 4:38:39 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-02(UNSAT) depth K=4 took 348773 ms
Mar 27, 2019 4:41:04 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-03(UNSAT) depth K=4 took 145438 ms
Mar 27, 2019 4:44:07 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 190 ms
Mar 27, 2019 4:44:07 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 23 ms
Mar 27, 2019 4:44:07 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
Mar 27, 2019 4:44:14 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-04(UNSAT) depth K=4 took 189757 ms
Mar 27, 2019 4:50:34 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-05(UNSAT) depth K=4 took 380269 ms
Mar 27, 2019 4:53:42 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-06(UNSAT) depth K=4 took 187697 ms
Mar 27, 2019 4:57:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-07(UNSAT) depth K=4 took 225671 ms
Mar 27, 2019 5:03:44 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-08(UNSAT) depth K=4 took 376632 ms
Mar 27, 2019 5:04:08 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 231 ms
Mar 27, 2019 5:04:08 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 12 ms
Mar 27, 2019 5:04:08 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
Mar 27, 2019 5:07:21 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-09(UNSAT) depth K=4 took 217042 ms
Mar 27, 2019 5:09:51 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-10(UNSAT) depth K=4 took 149410 ms
Mar 27, 2019 5:14:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-11(UNSAT) depth K=4 took 275073 ms
Mar 27, 2019 5:19:06 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-7-ReachabilityCardinality-12(UNSAT) depth K=4 took 280505 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-COL-7"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsm"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3957"
echo " Executing tool itstoolsm"
echo " Input is LamportFastMutEx-COL-7, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r196-smll-155246587200170"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-COL-7.tgz
mv LamportFastMutEx-COL-7 execution
cd execution
if [ "ReachabilityCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;