fond
Model Checking Contest 2019
9th edition, Prague, Czech Republic, April 7, 2019 (TOOLympics)
Execution of r196-smll-155246587200143
Last Updated
Apr 15, 2019

About the Execution of ITS-Tools.M for LamportFastMutEx-COL-4

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1060.520 38294.00 141387.00 660.00 TFFTTFTFFTTFTTFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2019-input.r196-smll-155246587200143.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2019-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
......................
=====================================================================
Generated by BenchKit 2-3957
Executing tool itstoolsm
Input is LamportFastMutEx-COL-4, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r196-smll-155246587200143
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 216K
-rw-r--r-- 1 mcc users 3.3K Feb 11 22:44 CTLCardinality.txt
-rw-r--r-- 1 mcc users 17K Feb 11 22:44 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 7 23:34 CTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 7 23:33 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 109 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 347 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.4K Feb 5 00:10 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Feb 5 00:10 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Feb 4 22:36 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.9K Feb 4 22:36 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.1K Feb 4 06:22 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 22K Feb 4 06:22 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.1K Jan 31 23:52 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K Jan 31 23:52 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 4 22:21 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 4 22:21 UpperBounds.xml

-rw-r--r-- 1 mcc users 5 Jan 29 09:34 equiv_pt
-rw-r--r-- 1 mcc users 2 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 40K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-00
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-01
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-02
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-03
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-04
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-05
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-06
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-07
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-08
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-09
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-10
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-11
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-12
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-13
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-14
FORMULA_NAME LamportFastMutEx-COL-4-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1553632295367

20:31:38.884 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
20:31:38.887 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness, --load-order, /home/mcc/execution/model.ord], workingDir=/home/mcc/execution]
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 185
// Phase 1: matrix 185 rows 135 cols

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness --load-order /home/mcc/execution/model.ord
invariant :wait_9 + -1'P_await_13_1 + done_9 = 0
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :wait_4 + -1'P_await_13_0 + done_4 = 0
invariant :wait_2 + -1'P_await_13_0 + done_2 = 0
invariant :wait_19 + -1'P_await_13_3 + done_19 = 0
invariant :b_8 + b_9 = 1
invariant :wait_1 + -1'P_await_13_0 + done_1 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 = 1
invariant :wait_6 + -1'P_await_13_1 + done_6 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 = 1
invariant :wait_16 + -1'P_await_13_3 + done_16 = 0
invariant :wait_24 + -1'P_await_13_4 + done_24 = 0
invariant :wait_17 + -1'P_await_13_3 + done_17 = 0
invariant :wait_21 + -1'P_await_13_4 + done_21 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :wait_10 + done_10 = 0
invariant :wait_5 + done_5 = 0
invariant :wait_18 + -1'P_await_13_3 + done_18 = 0
invariant :wait_3 + -1'P_await_13_0 + done_3 = 0
invariant :b_2 + b_3 = 1
invariant :wait_14 + -1'P_await_13_2 + done_14 = 0
invariant :b_0 + b_1 = 0
invariant :wait_12 + -1'P_await_13_2 + done_12 = 0
invariant :wait_11 + -1'P_await_13_2 + done_11 = 0
invariant :wait_20 + done_20 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :wait_0 + done_0 = 0
invariant :wait_23 + -1'P_await_13_4 + done_23 = 0
invariant :wait_13 + -1'P_await_13_2 + done_13 = 0
invariant :b_6 + b_7 = 1
invariant :wait_22 + -1'P_await_13_4 + done_22 = 0
invariant :wait_8 + -1'P_await_13_1 + done_8 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :wait_7 + -1'P_await_13_1 + done_7 = 0
invariant :b_4 + b_5 = 1
invariant :wait_15 + done_15 = 0
Successfully loaded order from file /home/mcc/execution/model.ord
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : LamportFastMutEx-COL-4-ReachabilityCardinality-00 with value :((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)>=1)&&(((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)>=3))
Read [invariant] property : LamportFastMutEx-COL-4-ReachabilityCardinality-01 with value :((((((y_0+y_1)+y_2)+y_3)+y_4)>=2)||((!((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)<=((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)))||(((((x_0+x_1)+x_2)+x_3)+x_4)<=((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4))))
Read [invariant] property : LamportFastMutEx-COL-4-ReachabilityCardinality-02 with value :(((((((P_ify0_4_0+P_ify0_4_1)+P_ify0_4_2)+P_ify0_4_3)+P_ify0_4_4)<=((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4))||(!(((((P_ifxi_10_0+P_ifxi_10_1)+P_ifxi_10_2)+P_ifxi_10_3)+P_ifxi_10_4)>=3)))||((((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)>=3)&&((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)>=2)||(((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4)>=3))))
Read [reachable] property : LamportFastMutEx-COL-4-ReachabilityCardinality-03 with value :((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)>=1)&&((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)>=3))&&((((((y_0+y_1)+y_2)+y_3)+y_4)>=3)&&(((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)>=1)))||(((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)>=1)&&(((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4)>=1))&&((((((x_0+x_1)+x_2)+x_3)+x_4)>=2)||(((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)<=((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)))))
Read [reachable] property : LamportFastMutEx-COL-4-ReachabilityCardinality-04 with value :((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)>=1)||(((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)<=((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)))&&((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)>=3)&&(((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)<=((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4))))||(((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)>=2)&&(((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)<=((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)))&&((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)>=3)&&(((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)>=1))))
Read [reachable] property : LamportFastMutEx-COL-4-ReachabilityCardinality-05 with value :(!((!(((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)>=3))||((((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)<=((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4))&&(((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4)>=1))))
Read [invariant] property : LamportFastMutEx-COL-4-ReachabilityCardinality-06 with value :((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)<=((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4))||((!(((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)>=2))||(!(((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)<=((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)))))
Read [invariant] property : LamportFastMutEx-COL-4-ReachabilityCardinality-07 with value :(((!(((((P_setbi_24_0+P_setbi_24_1)+P_setbi_24_2)+P_setbi_24_3)+P_setbi_24_4)<=((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)))&&((((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)>=3)||(((((P_ifyi_15_0+P_ifyi_15_1)+P_ifyi_15_2)+P_ifyi_15_3)+P_ifyi_15_4)>=2)))||(((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)<=((((P_start_1_0+P_start_1_1)+P_start_1_2)+P_start_1_3)+P_start_1_4))||(((((P_sety_9_0+P_sety_9_1)+P_sety_9_2)+P_sety_9_3)+P_sety_9_4)<=((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)))||((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)>=3)&&(((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)>=2))))
Read [invariant] property : LamportFastMutEx-COL-4-ReachabilityCardinality-08 with value :(!((!(((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)<=((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)))&&(!(((((P_ify0_4_0+P_ify0_4_1)+P_ify0_4_2)+P_ify0_4_3)+P_ify0_4_4)<=((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)))))
Read [reachable] property : LamportFastMutEx-COL-4-ReachabilityCardinality-09 with value :(((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)>=2)||((((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)>=1)&&(((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)>=2)))&&((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)<=((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4))||((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)>=2)||(((((P_setbi_5_0+P_setbi_5_1)+P_setbi_5_2)+P_setbi_5_3)+P_setbi_5_4)<=((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4)))))
Read [invariant] property : LamportFastMutEx-COL-4-ReachabilityCardinality-10 with value :(true)
Read [reachable] property : LamportFastMutEx-COL-4-ReachabilityCardinality-11 with value :((((((P_CS_21_0+P_CS_21_1)+P_CS_21_2)+P_CS_21_3)+P_CS_21_4)>=2)&&((((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)>=1))
Read [reachable] property : LamportFastMutEx-COL-4-ReachabilityCardinality-12 with value :((((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)>=1)&&(((((P_fordo_12_0+P_fordo_12_1)+P_fordo_12_2)+P_fordo_12_3)+P_fordo_12_4)<=((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4)))
Read [reachable] property : LamportFastMutEx-COL-4-ReachabilityCardinality-13 with value :(((((P_await_13_0+P_await_13_1)+P_await_13_2)+P_await_13_3)+P_await_13_4)>=3)
Read [reachable] property : LamportFastMutEx-COL-4-ReachabilityCardinality-14 with value :((((((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)<=((((y_0+y_1)+y_2)+y_3)+y_4))||(((((((((((((((((((((((((wait_0+wait_1)+wait_2)+wait_3)+wait_4)+wait_5)+wait_6)+wait_7)+wait_8)+wait_9)+wait_10)+wait_11)+wait_12)+wait_13)+wait_14)+wait_15)+wait_16)+wait_17)+wait_18)+wait_19)+wait_20)+wait_21)+wait_22)+wait_23)+wait_24)>=1))&&((((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)<=((((P_setx_3_0+P_setx_3_1)+P_setx_3_2)+P_setx_3_3)+P_setx_3_4))&&(((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4)>=2)))&&(!((((((x_0+x_1)+x_2)+x_3)+x_4)<=((((P_setbi_11_0+P_setbi_11_1)+P_setbi_11_2)+P_setbi_11_3)+P_setbi_11_4))||(((((((((((((((((((((((((done_0+done_1)+done_2)+done_3)+done_4)+done_5)+done_6)+done_7)+done_8)+done_9)+done_10)+done_11)+done_12)+done_13)+done_14)+done_15)+done_16)+done_17)+done_18)+done_19)+done_20)+done_21)+done_22)+done_23)+done_24)>=3))))
Read [reachable] property : LamportFastMutEx-COL-4-ReachabilityCardinality-15 with value :(!(((((P_awaity_0+P_awaity_1)+P_awaity_2)+P_awaity_3)+P_awaity_4)<=(((((((((b_0+b_1)+b_2)+b_3)+b_4)+b_5)+b_6)+b_7)+b_8)+b_9)))
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-10 TRUE TECHNIQUES SAT_SMT TAUTOLOGY
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 185
// Phase 1: matrix 185 rows 135 cols
invariant :wait_9 + -1'P_await_13_1 + done_9 = 0
invariant :P_start_1_4 + P_setx_3_4 + P_setbi_5_4 + P_ify0_4_4 + P_sety_9_4 + P_ifxi_10_4 + P_setbi_11_4 + P_fordo_12_4 + P_await_13_4 + P_ifyi_15_4 + P_awaity_4 + P_CS_21_4 + P_setbi_24_4 = 1
invariant :P_start_1_1 + P_setx_3_1 + P_setbi_5_1 + P_ify0_4_1 + P_sety_9_1 + P_ifxi_10_1 + P_setbi_11_1 + P_fordo_12_1 + P_await_13_1 + P_ifyi_15_1 + P_awaity_1 + P_CS_21_1 + P_setbi_24_1 = 1
invariant :wait_4 + -1'P_await_13_0 + done_4 = 0
invariant :wait_2 + -1'P_await_13_0 + done_2 = 0
invariant :wait_19 + -1'P_await_13_3 + done_19 = 0
invariant :b_8 + b_9 = 1
invariant :wait_1 + -1'P_await_13_0 + done_1 = 0
invariant :x_0 + x_1 + x_2 + x_3 + x_4 = 1
invariant :wait_6 + -1'P_await_13_1 + done_6 = 0
invariant :y_0 + y_1 + y_2 + y_3 + y_4 = 1
invariant :wait_16 + -1'P_await_13_3 + done_16 = 0
invariant :wait_24 + -1'P_await_13_4 + done_24 = 0
invariant :wait_17 + -1'P_await_13_3 + done_17 = 0
invariant :wait_21 + -1'P_await_13_4 + done_21 = 0
invariant :P_start_1_2 + P_setx_3_2 + P_setbi_5_2 + P_ify0_4_2 + P_sety_9_2 + P_ifxi_10_2 + P_setbi_11_2 + P_fordo_12_2 + P_await_13_2 + P_ifyi_15_2 + P_awaity_2 + P_CS_21_2 + P_setbi_24_2 = 1
invariant :wait_10 + done_10 = 0
invariant :wait_5 + done_5 = 0
invariant :wait_18 + -1'P_await_13_3 + done_18 = 0
invariant :wait_3 + -1'P_await_13_0 + done_3 = 0
invariant :b_2 + b_3 = 1
invariant :wait_14 + -1'P_await_13_2 + done_14 = 0
invariant :b_0 + b_1 = 0
invariant :wait_12 + -1'P_await_13_2 + done_12 = 0
invariant :wait_11 + -1'P_await_13_2 + done_11 = 0
invariant :wait_20 + done_20 = 0
invariant :P_start_1_3 + P_setx_3_3 + P_setbi_5_3 + P_ify0_4_3 + P_sety_9_3 + P_ifxi_10_3 + P_setbi_11_3 + P_fordo_12_3 + P_await_13_3 + P_ifyi_15_3 + P_awaity_3 + P_CS_21_3 + P_setbi_24_3 = 1
invariant :wait_0 + done_0 = 0
invariant :wait_23 + -1'P_await_13_4 + done_23 = 0
invariant :wait_13 + -1'P_await_13_2 + done_13 = 0
invariant :b_6 + b_7 = 1
invariant :wait_22 + -1'P_await_13_4 + done_22 = 0
invariant :wait_8 + -1'P_await_13_1 + done_8 = 0
invariant :P_start_1_0 + P_setx_3_0 + P_setbi_5_0 + P_ify0_4_0 + P_sety_9_0 + P_ifxi_10_0 + P_setbi_11_0 + P_fordo_12_0 + P_await_13_0 + P_ifyi_15_0 + P_awaity_0 + P_CS_21_0 + P_setbi_24_0 = 0
invariant :wait_7 + -1'P_await_13_1 + done_7 = 0
invariant :b_4 + b_5 = 1
invariant :wait_15 + done_15 = 0
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-06 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-14 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-15 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
petri,1.91478e+06,26.4138,559920,2,35532,5,1.79547e+06,6,0,753,1.28786e+06,0
Total reachable state count : 1914784

Verifying 16 reachability properties.
Reachability property LamportFastMutEx-COL-4-ReachabilityCardinality-00 is true.
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-00,12,26.4838,560132,2,316,6,1.79547e+06,7,0,777,1.28786e+06,0
Invariant property LamportFastMutEx-COL-4-ReachabilityCardinality-01 does not hold.
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-01,1,26.5027,560196,2,136,7,1.79547e+06,8,0,916,1.28786e+06,0
Invariant property LamportFastMutEx-COL-4-ReachabilityCardinality-02 does not hold.
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-02,52,26.5284,560196,2,380,8,1.79547e+06,9,0,981,1.28786e+06,0
Reachability property LamportFastMutEx-COL-4-ReachabilityCardinality-03 is true.
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-03,22692,26.7319,560196,2,13249,9,1.79547e+06,10,0,1261,1.28786e+06,0
Reachability property LamportFastMutEx-COL-4-ReachabilityCardinality-04 is true.
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-04 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-04,96,28.5094,560196,2,381,10,1.79547e+06,11,0,10409,1.28786e+06,0
Reachability property LamportFastMutEx-COL-4-ReachabilityCardinality-05 does not hold.
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : LamportFastMutEx-COL-4-ReachabilityCardinality-05

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-05,0,28.5462,560204,1,0,10,1.79547e+06,12,0,10422,1.28786e+06,0
Invariant property LamportFastMutEx-COL-4-ReachabilityCardinality-06 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-06,0,28.6282,560204,1,0,10,1.79547e+06,13,0,10489,1.28786e+06,0
Invariant property LamportFastMutEx-COL-4-ReachabilityCardinality-07 does not hold.
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-07,36309,29.146,560204,2,16329,11,1.79547e+06,14,0,12311,1.28786e+06,0
Invariant property LamportFastMutEx-COL-4-ReachabilityCardinality-08 does not hold.
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-08,3048,30.0698,560204,2,5389,12,1.79547e+06,15,0,17943,1.28786e+06,0
Reachability property LamportFastMutEx-COL-4-ReachabilityCardinality-09 is true.
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-09,8451,30.383,560204,2,5127,13,1.79547e+06,16,0,18474,1.28786e+06,0
Invariant property LamportFastMutEx-COL-4-ReachabilityCardinality-10 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-10,0,30.3836,560204,1,0,13,1.79547e+06,16,0,18474,1.28786e+06,0
Reachability property LamportFastMutEx-COL-4-ReachabilityCardinality-11 does not hold.
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN
No reachable states exhibit your property : LamportFastMutEx-COL-4-ReachabilityCardinality-11

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-11,0,30.4215,560204,1,0,13,1.79547e+06,17,0,18486,1.28786e+06,0
Reachability property LamportFastMutEx-COL-4-ReachabilityCardinality-12 is true.
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-12,9153,30.5328,560204,2,9554,14,1.79547e+06,18,0,18545,1.28786e+06,0
Reachability property LamportFastMutEx-COL-4-ReachabilityCardinality-13 is true.
FORMULA LamportFastMutEx-COL-4-ReachabilityCardinality-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-13,8,30.5624,560204,2,139,15,1.79547e+06,19,0,18553,1.28786e+06,0
Reachability property LamportFastMutEx-COL-4-ReachabilityCardinality-14 does not hold.
No reachable states exhibit your property : LamportFastMutEx-COL-4-ReachabilityCardinality-14

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-14,0,30.6455,560204,1,0,15,1.79547e+06,20,0,18631,1.28786e+06,0
Reachability property LamportFastMutEx-COL-4-ReachabilityCardinality-15 does not hold.
No reachable states exhibit your property : LamportFastMutEx-COL-4-ReachabilityCardinality-15

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
LamportFastMutEx-COL-4-ReachabilityCardinality-15,0,30.7496,560204,1,0,15,1.79547e+06,21,0,18792,1.28786e+06,0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1553632333661

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 26, 2019 8:31:38 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt]
Mar 26, 2019 8:31:38 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 26, 2019 8:31:38 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
Mar 26, 2019 8:31:39 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 863 ms
Mar 26, 2019 8:31:39 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 18 places.
Mar 26, 2019 8:31:39 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
Mar 26, 2019 8:31:39 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :pid * pid->wait,done,
pid * bool->b,
pid->P-start_1,x,y,P-setx_3,P-setbi_5,P-ify0_4,P-sety_9,P-ifxi_10,P-setbi_11,P-fordo_12,P-await_13,P-ifyi_15,P-awaity,P-CS_21,P-setbi_24,

Mar 26, 2019 8:31:39 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 17 transitions.
Mar 26, 2019 8:31:39 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
Mar 26, 2019 8:31:39 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 10 ms
Mar 26, 2019 8:31:39 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $y of transition T_yeqi_15
Mar 26, 2019 8:31:39 PM fr.lip6.move.gal.instantiate.Instantiator fuseEqualParameters
INFO: Fused parameters : $i and $x of transition T_xeqi_10
Mar 26, 2019 8:31:39 PM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 11.0 instantiations of transitions. Total transitions/syncs built is 241
Mar 26, 2019 8:31:39 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 121 ms
Mar 26, 2019 8:31:40 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 72 ms
Mar 26, 2019 8:31:40 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 80 ms
Mar 26, 2019 8:31:40 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 57 transitions. Expanding to a total of 286 deterministic transitions.
Mar 26, 2019 8:31:40 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 22 ms.
Mar 26, 2019 8:31:40 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 57 transitions. Expanding to a total of 286 deterministic transitions.
Mar 26, 2019 8:31:40 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 4 ms.
Mar 26, 2019 8:31:40 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 57 transitions. Expanding to a total of 286 deterministic transitions.
Mar 26, 2019 8:31:40 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 3 ms.
Mar 26, 2019 8:31:40 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 135 places.
Mar 26, 2019 8:31:40 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 230 transitions.
Mar 26, 2019 8:31:40 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 3 ms
Mar 26, 2019 8:31:40 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 3 ms
Mar 26, 2019 8:31:40 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 37 place invariants in 83 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 1 / 16 in 628 ms.
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-00(UNSAT) depth K=0 took 33 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-01(UNSAT) depth K=0 took 17 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-02(UNSAT) depth K=0 took 16 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-03(UNSAT) depth K=0 took 10 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-04(UNSAT) depth K=0 took 23 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 57 transitions. Expanding to a total of 286 deterministic transitions.
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 4 ms.
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-05(UNSAT) depth K=0 took 18 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-06(UNSAT) depth K=0 took 9 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-07(UNSAT) depth K=0 took 7 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-08(UNSAT) depth K=0 took 11 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-09(UNSAT) depth K=0 took 10 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-11(UNSAT) depth K=0 took 9 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-12(UNSAT) depth K=0 took 10 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-13(UNSAT) depth K=0 took 13 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-14(UNSAT) depth K=0 took 11 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-15(UNSAT) depth K=0 took 10 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-00(UNSAT) depth K=1 took 9 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-01(UNSAT) depth K=1 took 9 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-02(UNSAT) depth K=1 took 9 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-03(UNSAT) depth K=1 took 10 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-04(UNSAT) depth K=1 took 20 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-05(UNSAT) depth K=1 took 10 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-06(UNSAT) depth K=1 took 14 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-07(UNSAT) depth K=1 took 11 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-08(UNSAT) depth K=1 took 7 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-09(UNSAT) depth K=1 took 11 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-11(UNSAT) depth K=1 took 13 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-12(UNSAT) depth K=1 took 17 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-13(UNSAT) depth K=1 took 15 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-14(UNSAT) depth K=1 took 16 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 37 place invariants in 55 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-15(UNSAT) depth K=1 took 19 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-00(UNSAT) depth K=2 took 113 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-01(UNSAT) depth K=2 took 200 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-02(UNSAT) depth K=2 took 35 ms
Mar 26, 2019 8:31:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-03(UNSAT) depth K=2 took 82 ms
Mar 26, 2019 8:31:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-04(UNSAT) depth K=2 took 108 ms
Mar 26, 2019 8:31:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-05(UNSAT) depth K=2 took 44 ms
Mar 26, 2019 8:31:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-06(UNSAT) depth K=2 took 52 ms
Mar 26, 2019 8:31:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-07(UNSAT) depth K=2 took 111 ms
Mar 26, 2019 8:31:42 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 135 variables to be positive in 1424 ms
Mar 26, 2019 8:31:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 230 transitions.
Mar 26, 2019 8:31:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/230 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 8:31:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-08(UNSAT) depth K=2 took 71 ms
Mar 26, 2019 8:31:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 56 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 8:31:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 230 transitions.
Mar 26, 2019 8:31:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 6 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 8:31:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-09(UNSAT) depth K=2 took 108 ms
Mar 26, 2019 8:31:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-11(UNSAT) depth K=2 took 69 ms
Mar 26, 2019 8:31:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-12(UNSAT) depth K=2 took 68 ms
Mar 26, 2019 8:31:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-13(UNSAT) depth K=2 took 28 ms
Mar 26, 2019 8:31:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-14(UNSAT) depth K=2 took 62 ms
Mar 26, 2019 8:31:42 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 135 variables to be positive in 1304 ms
Mar 26, 2019 8:31:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-15(UNSAT) depth K=2 took 100 ms
Mar 26, 2019 8:31:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-00
Mar 26, 2019 8:31:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-00(SAT) depth K=0 took 333 ms
Mar 26, 2019 8:31:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-00(UNSAT) depth K=3 took 465 ms
Mar 26, 2019 8:31:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-01(UNSAT) depth K=3 took 694 ms
Mar 26, 2019 8:31:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-01
Mar 26, 2019 8:31:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-01(SAT) depth K=0 took 1226 ms
Mar 26, 2019 8:31:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-02
Mar 26, 2019 8:31:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-02(SAT) depth K=0 took 201 ms
Mar 26, 2019 8:31:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-03
Mar 26, 2019 8:31:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-03(SAT) depth K=0 took 691 ms
Mar 26, 2019 8:31:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-02(UNSAT) depth K=3 took 1839 ms
Mar 26, 2019 8:31:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-04
Mar 26, 2019 8:31:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-04(SAT) depth K=0 took 1604 ms
Mar 26, 2019 8:31:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-05
Mar 26, 2019 8:31:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-05(SAT) depth K=0 took 303 ms
Mar 26, 2019 8:31:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-03(UNSAT) depth K=3 took 1434 ms
Mar 26, 2019 8:31:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant LamportFastMutEx-COL-4-ReachabilityCardinality-06
Mar 26, 2019 8:31:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-COL-4-ReachabilityCardinality-06
Mar 26, 2019 8:31:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-06(TRUE) depth K=0 took 413 ms
Mar 26, 2019 8:31:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-04(UNSAT) depth K=3 took 601 ms
Mar 26, 2019 8:31:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-05(UNSAT) depth K=3 took 231 ms
Mar 26, 2019 8:31:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-07
Mar 26, 2019 8:31:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-07(SAT) depth K=0 took 659 ms
Mar 26, 2019 8:31:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-08
Mar 26, 2019 8:31:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-08(SAT) depth K=0 took 195 ms
Mar 26, 2019 8:31:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-06(UNSAT) depth K=3 took 361 ms
Mar 26, 2019 8:31:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-07(UNSAT) depth K=3 took 388 ms
Mar 26, 2019 8:31:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-09
Mar 26, 2019 8:31:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-09(SAT) depth K=0 took 665 ms
Mar 26, 2019 8:31:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-11
Mar 26, 2019 8:31:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-11(SAT) depth K=0 took 143 ms
Mar 26, 2019 8:31:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-12
Mar 26, 2019 8:31:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-12(SAT) depth K=0 took 331 ms
Mar 26, 2019 8:31:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-08(UNSAT) depth K=3 took 1513 ms
Mar 26, 2019 8:31:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-13
Mar 26, 2019 8:31:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-13(SAT) depth K=0 took 838 ms
Mar 26, 2019 8:31:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-COL-4-ReachabilityCardinality-14
Mar 26, 2019 8:31:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-COL-4-ReachabilityCardinality-14
Mar 26, 2019 8:31:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-14(FALSE) depth K=0 took 317 ms
Mar 26, 2019 8:31:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-09(UNSAT) depth K=3 took 559 ms
Mar 26, 2019 8:31:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate LamportFastMutEx-COL-4-ReachabilityCardinality-15
Mar 26, 2019 8:31:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for LamportFastMutEx-COL-4-ReachabilityCardinality-15
Mar 26, 2019 8:31:50 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-15(FALSE) depth K=0 took 270 ms
Mar 26, 2019 8:31:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-11(UNSAT) depth K=3 took 1173 ms
Mar 26, 2019 8:31:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-12(UNSAT) depth K=3 took 227 ms
Mar 26, 2019 8:31:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-13(UNSAT) depth K=3 took 448 ms
Mar 26, 2019 8:31:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-14(UNSAT) depth K=3 took 529 ms
Mar 26, 2019 8:31:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-00
Mar 26, 2019 8:31:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-00(SAT) depth K=1 took 2860 ms
Mar 26, 2019 8:31:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-15(UNSAT) depth K=3 took 768 ms
Mar 26, 2019 8:31:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-01
Mar 26, 2019 8:31:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-01(SAT) depth K=1 took 1652 ms
Mar 26, 2019 8:31:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-02
Mar 26, 2019 8:31:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-02(SAT) depth K=1 took 823 ms
Mar 26, 2019 8:32:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-00(UNSAT) depth K=4 took 8085 ms
Mar 26, 2019 8:32:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-03
Mar 26, 2019 8:32:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-03(SAT) depth K=1 took 10285 ms
Mar 26, 2019 8:32:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesLamportFastMutEx-COL-4-ReachabilityCardinality-04
Mar 26, 2019 8:32:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property LamportFastMutEx-COL-4-ReachabilityCardinality-04(SAT) depth K=1 took 3842 ms
Mar 26, 2019 8:32:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Mar 26, 2019 8:32:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying LamportFastMutEx-COL-4-ReachabilityCardinality-01 SMT depth 4
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
Mar 26, 2019 8:32:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
WARNING: Unexpected error occurred while running SMT. Was verifying LamportFastMutEx-COL-4-ReachabilityCardinality-08 K-induction depth 1
Exception in thread "Thread-8" java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:336)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
... 3 more
Mar 26, 2019 8:32:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 4
Mar 26, 2019 8:32:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 4
Mar 26, 2019 8:32:12 PM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 4/ 16 properties. Interrupting other analysis methods.
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeAblingForPredicate(NecessaryEnablingsolver.java:755)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:512)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Mar 26, 2019 8:32:12 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 31871ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="LamportFastMutEx-COL-4"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsm"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3957"
echo " Executing tool itstoolsm"
echo " Input is LamportFastMutEx-COL-4, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r196-smll-155246587200143"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/LamportFastMutEx-COL-4.tgz
mv LamportFastMutEx-COL-4 execution
cd execution
if [ "ReachabilityCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;