fond
Model Checking Contest 2019
9th edition, Prague, Czech Republic, April 7, 2019 (TOOLympics)
Execution of r193-ebro-155234659400357
Last Updated
Apr 15, 2019

About the Execution of ITS-Tools.M for DiscoveryGPU-PT-11a

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
5380.450 1207319.00 4783434.00 269.00 TTTFTFFFTTFFFTFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/mnt/tpsp/fkordon/mcc2019-input.r193-ebro-155234659400357.qcow2', fmt=qcow2 size=4294967296 backing_file='/mnt/tpsp/fkordon/mcc2019-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
......................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstoolsm
Input is DiscoveryGPU-PT-11a, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r193-ebro-155234659400357
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 200K
-rw-r--r-- 1 mcc users 2.8K Feb 10 22:11 CTLCardinality.txt
-rw-r--r-- 1 mcc users 15K Feb 10 22:11 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Feb 6 18:50 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 6 18:50 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 106 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 344 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.4K Feb 4 23:34 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Feb 4 23:34 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K Feb 4 22:34 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.9K Feb 4 22:34 LTLFireability.xml
-rw-r--r-- 1 mcc users 2.9K Feb 3 07:29 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 13K Feb 3 07:29 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Jan 30 23:53 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K Jan 30 23:53 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 4 22:19 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 4 22:19 UpperBounds.xml

-rw-r--r-- 1 mcc users 6 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 4 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 39K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DiscoveryGPU-PT-11a-LTLCardinality-00
FORMULA_NAME DiscoveryGPU-PT-11a-LTLCardinality-01
FORMULA_NAME DiscoveryGPU-PT-11a-LTLCardinality-02
FORMULA_NAME DiscoveryGPU-PT-11a-LTLCardinality-03
FORMULA_NAME DiscoveryGPU-PT-11a-LTLCardinality-04
FORMULA_NAME DiscoveryGPU-PT-11a-LTLCardinality-05
FORMULA_NAME DiscoveryGPU-PT-11a-LTLCardinality-06
FORMULA_NAME DiscoveryGPU-PT-11a-LTLCardinality-07
FORMULA_NAME DiscoveryGPU-PT-11a-LTLCardinality-08
FORMULA_NAME DiscoveryGPU-PT-11a-LTLCardinality-09
FORMULA_NAME DiscoveryGPU-PT-11a-LTLCardinality-10
FORMULA_NAME DiscoveryGPU-PT-11a-LTLCardinality-11
FORMULA_NAME DiscoveryGPU-PT-11a-LTLCardinality-12
FORMULA_NAME DiscoveryGPU-PT-11a-LTLCardinality-13
FORMULA_NAME DiscoveryGPU-PT-11a-LTLCardinality-14
FORMULA_NAME DiscoveryGPU-PT-11a-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1553617586190

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock, --load-order, /home/mcc/execution/model.ord], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock --load-order /home/mcc/execution/model.ord
Read 16 LTL properties
Successfully loaded order from file /home/mcc/execution/model.ord
Checking formula 0 : !((true))
Formula 0 simplified : 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 144
// Phase 1: matrix 144 rows 113 cols
invariant :p111 + -1'p112 = 0
invariant :p0 + p112 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 3723 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 60 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, true, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 873 ms.
FORMULA DiscoveryGPU-PT-11a-LTLCardinality-00 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, true, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 431 ms.
FORMULA DiscoveryGPU-PT-11a-LTLCardinality-01 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, true, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 737 ms.
FORMULA DiscoveryGPU-PT-11a-LTLCardinality-02 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, [](((LTLAP0==true))U([]((LTLAP1==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1030 ms.
FORMULA DiscoveryGPU-PT-11a-LTLCardinality-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(([]((LTLAP2==true)))U(X((LTLAP3==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 706 ms.
FORMULA DiscoveryGPU-PT-11a-LTLCardinality-04 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 819 ms.
FORMULA DiscoveryGPU-PT-11a-LTLCardinality-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X([](X(X((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 9963 ms.
FORMULA DiscoveryGPU-PT-11a-LTLCardinality-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>([](((LTLAP5==true))U((LTLAP6==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 707 ms.
FORMULA DiscoveryGPU-PT-11a-LTLCardinality-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](<>(X((LTLAP7==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](<>(X((LTLAP7==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>((LTLAP8==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 356 ms.
FORMULA DiscoveryGPU-PT-11a-LTLCardinality-09 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []((LTLAP9==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 339 ms.
FORMULA DiscoveryGPU-PT-11a-LTLCardinality-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []((LTLAP10==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 288 ms.
FORMULA DiscoveryGPU-PT-11a-LTLCardinality-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (X(X((LTLAP11==true))))U(X((LTLAP12==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 319 ms.
FORMULA DiscoveryGPU-PT-11a-LTLCardinality-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, true, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 313 ms.
FORMULA DiscoveryGPU-PT-11a-LTLCardinality-13 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>((<>((LTLAP13==true)))U([]((LTLAP14==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 174 ms.
FORMULA DiscoveryGPU-PT-11a-LTLCardinality-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, ([](X((LTLAP15==true))))U(((LTLAP16==true))U((LTLAP17==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 391 ms.
FORMULA DiscoveryGPU-PT-11a-LTLCardinality-15 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](<>(X((LTLAP7==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Reverse transition relation is NOT exact ! Due to transitions t133, t134, t135, t136, t137, t138, t139, t140, t141, t142, t143, t144, t145, t146, t147, t148, t149, t150, t151, t152, t153, t154, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/133/22/155
Computing Next relation with stutter on 1 deadlock states
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
41069 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,410.758,3320260,1,0,178,1.39377e+07,327,126,3245,2.65371e+07,316
no accepting run found
Formula 0 is TRUE no accepting run found.
FORMULA DiscoveryGPU-PT-11a-LTLCardinality-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !((true))
Formula 1 simplified : 0
Computing Next relation with stutter on 1 deadlock states
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,410.758,3320260,1,0,178,1.39377e+07,327,126,3245,2.65371e+07,316
no accepting run found
Formula 1 is TRUE no accepting run found.
FORMULA DiscoveryGPU-PT-11a-LTLCardinality-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((true))
Formula 2 simplified : 0
Computing Next relation with stutter on 1 deadlock states
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,410.758,3320260,1,0,178,1.39377e+07,327,126,3245,2.65371e+07,316
no accepting run found
Formula 2 is TRUE no accepting run found.
FORMULA DiscoveryGPU-PT-11a-LTLCardinality-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !((G(("(p99>=1)")U(G("((p11==0)||(p5==1))")))))
Formula 3 simplified : !G("(p99>=1)" U G"((p11==0)||(p5==1))")
Computing Next relation with stutter on 1 deadlock states
Detected timeout of ITS tools.
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 1 LTL properties
Checking formula 0 : !((G(F(X("((u7.p70==0)||(u13.p112==1))")))))
Formula 0 simplified : !GFX"((u7.p70==0)||(u13.p112==1))"
built 23 ordering constraints for composite.
Reverse transition relation is NOT exact ! Due to transitions u1.t143, u1.t144, u2.t145, u2.t146, u3.t141, u3.t142, u4.t147, u4.t148, u5.t139, u5.t140, u6.t149, u6.t150, u7.t137, u7.t138, u8.t151, u8.t152, u9.t135, u9.t136, u10.t153, u10.t154, u11.t133, u11.t134, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :0/56/22/78
Computing Next relation with stutter on 1 deadlock states
5 unique states visited
0 strongly connected components in search stack
6 transitions explored
4 items max in DFS search stack
8 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,0.106086,19032,1,0,3823,860,694,3478,250,5095,5179
no accepting run found
Formula 0 is TRUE no accepting run found.
FORMULA DiscoveryGPU-PT-11a-LTLCardinality-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1553618793509

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 26, 2019 4:26:29 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt]
Mar 26, 2019 4:26:29 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 26, 2019 4:26:29 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 111 ms
Mar 26, 2019 4:26:29 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 113 places.
Mar 26, 2019 4:26:30 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 155 transitions.
Mar 26, 2019 4:26:30 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Mar 26, 2019 4:26:30 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 32 ms
Mar 26, 2019 4:26:30 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 133 ms
Mar 26, 2019 4:26:30 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 51 ms
Mar 26, 2019 4:26:30 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 155 transitions.
Mar 26, 2019 4:26:30 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 113 places.
Mar 26, 2019 4:26:30 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 155 transitions.
Mar 26, 2019 4:26:30 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 155 transitions.
Mar 26, 2019 4:26:30 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 6 ms
Mar 26, 2019 4:26:30 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 1 ms
Mar 26, 2019 4:26:31 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 2 place invariants in 28 ms
Mar 26, 2019 4:26:31 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 113 variables to be positive in 408 ms
Mar 26, 2019 4:26:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 155 transitions.
Mar 26, 2019 4:26:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/155 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 4:26:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 49 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 4:26:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 155 transitions.
Mar 26, 2019 4:26:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 2 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 4:26:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 155 transitions.
Mar 26, 2019 4:26:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(35/155) took 856 ms. Total solver calls (SAT/UNSAT): 261(228/33)
Mar 26, 2019 4:26:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(65/155) took 3858 ms. Total solver calls (SAT/UNSAT): 2706(2673/33)
Mar 26, 2019 4:26:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 6795 ms. Total solver calls (SAT/UNSAT): 4928(4895/33)
Mar 26, 2019 4:26:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 155 transitions.
Mar 26, 2019 4:26:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 4150 ms. Total solver calls (SAT/UNSAT): 242(0/242)
Mar 26, 2019 4:26:44 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 14223ms conformant to PINS in folder :/home/mcc/execution
Mar 26, 2019 4:46:31 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Mar 26, 2019 4:46:31 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 90 ms
Mar 26, 2019 4:46:31 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 115 ms
Mar 26, 2019 4:46:31 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Mar 26, 2019 4:46:31 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 65 events :t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,t67,
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 32 events :t34,t34,t34,t34,t34,t34,t34,t34,t34,t34,t34,t34,t34,t34,t34,t34,t34,t34,t34,t34,t34,t34,t34,t34,t34,t34,t34,t34,t34,t34,t34,t34,
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 97 redundant transitions.
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 585 ms
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu3_flat :[u3.t60, u3.t42, u3.t43]
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu5_flat :[u5.t59, u5.t40, u5.t41]
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu10_flat :[u10.t109, u10.t131, u10.t132, u10.t110, u10.t87, u10.t88]
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu2_flat :[u2.t80, u2.t123, u2.t101, u2.t124, u2.t102, u2.t79]
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu6_flat :[u6.t105, u6.t127, u6.t83, u6.t84, u6.t106, u6.t128]
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.t104, u4.t126, u4.t81, u4.t82, u4.t103, u4.t125]
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu10_flat :[u10.t54, u10.t66, u10.t55]
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu9_flat :[u9.t114, u9.t113, u9.t91, u9.t70, u9.t92, u9.t69]
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu2_flat :[u2.t62, u2.t47, u2.t46]
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu7_flat :[u7.t38, u7.t39, u7.t58]
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu9_flat :[u9.t57, u9.t36, u9.t37]
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu6_flat :[u6.t64, u6.t50, u6.t51]
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu4_flat :[u4.t49, u4.t48, u4.t63]
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu11_flat :[u11.t111, u11.t112, u11.t68, u11.t67, u11.t89, u11.t90]
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu7_flat :[u7.t71, u7.t93, u7.t72, u7.t94, u7.t115, u7.t116]
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu8_flat :[u8.t130, u8.t85, u8.t86, u8.t108, u8.t107, u8.t129]
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.t99, u1.t77, u1.t78, u1.t121, u1.t122, u1.t100]
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu11_flat :[u11.t35, u11.t34, u11.t56]
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu5_flat :[u5.t118, u5.t117, u5.t73, u5.t95, u5.t74, u5.t96]
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu1_flat :[u1.t44, u1.t45, u1.t61]
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu3_flat :[u3.t120, u3.t119, u3.t75, u3.t97, u3.t76, u3.t98]
Mar 26, 2019 4:46:32 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in Tu8_flat :[u8.t52, u8.t53, u8.t65]
Mar 26, 2019 4:46:32 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 13 ms
Mar 26, 2019 4:46:32 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 0 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DiscoveryGPU-PT-11a"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstoolsm"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstoolsm"
echo " Input is DiscoveryGPU-PT-11a, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r193-ebro-155234659400357"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DiscoveryGPU-PT-11a.tgz
mv DiscoveryGPU-PT-11a execution
cd execution
if [ "LTLCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;