fond
Model Checking Contest 2019
9th edition, Prague, Czech Republic, April 7, 2019 (TOOLympics)
Execution of r192-oct2-155234410400727
Last Updated
Apr 15, 2019

About the Execution of ITS-Tools.M for DNAwalker-PT-15ringRRLarge

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1989.810 132179.00 368940.00 283.50 FFFFFFFFFFFFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2019-input.r192-oct2-155234410400727.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2019-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstoolsm
Input is DNAwalker-PT-15ringRRLarge, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r192-oct2-155234410400727
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 300K
-rw-r--r-- 1 mcc users 3.3K Feb 10 20:07 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K Feb 10 20:07 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Feb 6 15:45 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 6 15:45 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.6K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 113 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 351 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.4K Feb 4 23:26 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Feb 4 23:26 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Feb 4 22:34 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.6K Feb 4 22:34 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.6K Feb 3 06:30 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K Feb 3 06:30 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Jan 30 22:51 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K Jan 30 22:51 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 4 22:19 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 4 22:19 UpperBounds.xml

-rw-r--r-- 1 mcc users 6 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 14 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 135K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DNAwalker-PT-15ringRRLarge-LTLFireability-00
FORMULA_NAME DNAwalker-PT-15ringRRLarge-LTLFireability-01
FORMULA_NAME DNAwalker-PT-15ringRRLarge-LTLFireability-02
FORMULA_NAME DNAwalker-PT-15ringRRLarge-LTLFireability-03
FORMULA_NAME DNAwalker-PT-15ringRRLarge-LTLFireability-04
FORMULA_NAME DNAwalker-PT-15ringRRLarge-LTLFireability-05
FORMULA_NAME DNAwalker-PT-15ringRRLarge-LTLFireability-06
FORMULA_NAME DNAwalker-PT-15ringRRLarge-LTLFireability-07
FORMULA_NAME DNAwalker-PT-15ringRRLarge-LTLFireability-08
FORMULA_NAME DNAwalker-PT-15ringRRLarge-LTLFireability-09
FORMULA_NAME DNAwalker-PT-15ringRRLarge-LTLFireability-10
FORMULA_NAME DNAwalker-PT-15ringRRLarge-LTLFireability-11
FORMULA_NAME DNAwalker-PT-15ringRRLarge-LTLFireability-12
FORMULA_NAME DNAwalker-PT-15ringRRLarge-LTLFireability-13
FORMULA_NAME DNAwalker-PT-15ringRRLarge-LTLFireability-14
FORMULA_NAME DNAwalker-PT-15ringRRLarge-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1553607284402

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock, --load-order, /home/mcc/execution/model.ord], workingDir=/home/mcc/execution]
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 311
// Phase 1: matrix 311 rows 33 cols

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock --load-order /home/mcc/execution/model.ord
Read 16 LTL properties
Successfully loaded order from file /home/mcc/execution/model.ord
Checking formula 0 : !((G(X(G(G(F("((A12>=2)&&(A15>=1))")))))))
Formula 0 simplified : !GXGF"((A12>=2)&&(A15>=1))"
Reverse transition relation is NOT exact ! Due to transitions t0, t1, t2, t3, t4, t5, t6, t7, t8, t9, t10, t11, t12, t13, t14, t15, t16, t17, t18, t19, t20, t21, t22, t23, t24, t25, t26, t27, t28, t29, t30, t31, t32, t33, t34, t35, t37, t38, t39, t40, t41, t42, t43, t44, t45, t46, t47, t48, t49, t50, t51, t52, t53, t54, t56, t57, t58, t59, t60, t61, t62, t63, t64, t65, t66, t67, t68, t70, t71, t72, t73, t74, t75, t76, t77, t78, t79, t80, t82, t83, t84, t85, t86, t87, t88, t89, t90, t92, t93, t94, t95, t96, t97, t98, t99, t100, t102, t103, t104, t105, t106, t107, t108, t109, t111, t112, t113, t114, t115, t116, t117, t118, t119, t120, t121, t123, t124, t125, t126, t127, t128, t129, t130, t131, t132, t133, t134, t135, t136, t137, t138, t139, t140, t142, t143, t144, t145, t146, t147, t148, t149, t150, t152, t153, t154, t155, t156, t157, t158, t159, t160, t162, t163, t164, t165, t166, t167, t168, t169, t170, t171, t172, t174, t175, t176, t177, t178, t179, t180, t181, t182, t183, t184, t185, t186, t188, t189, t190, t191, t192, t193, t194, t195, t196, t197, t198, t199, t200, t201, t202, t203, t204, t205, t207, t208, t209, t210, t211, t212, t213, t214, t215, t216, t217, t219, t220, t221, t222, t223, t224, t225, t226, t227, t229, t230, t231, t232, t233, t234, t235, t236, t237, t239, t240, t241, t242, t243, t244, t245, t246, t248, t249, t250, t251, t252, t253, t254, t255, t256, t257, t258, t260, t261, t262, t263, t264, t265, t266, t267, t268, t269, t270, t271, t272, t273, t274, t275, t276, t277, t279, t280, t281, t282, t283, t284, t285, t286, t287, t289, t290, t291, t292, t293, t294, t295, t296, t297, t299, t300, t301, t302, t303, t304, t305, t306, t307, t308, t309, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :22/2/288/312
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 2889 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 213 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X([]([](<>((LTLAP0==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1402 ms.
FORMULA DNAwalker-PT-15ringRRLarge-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>([]((LTLAP1==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1734 ms.
FORMULA DNAwalker-PT-15ringRRLarge-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(X(<>(<>(<>((LTLAP2==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 7026 ms.
FORMULA DNAwalker-PT-15ringRRLarge-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(<>(X(((LTLAP3==true))U((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 794 ms.
FORMULA DNAwalker-PT-15ringRRLarge-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []((LTLAP1==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 867 ms.
FORMULA DNAwalker-PT-15ringRRLarge-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X((LTLAP5==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 379 ms.
FORMULA DNAwalker-PT-15ringRRLarge-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []((LTLAP6==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1123 ms.
FORMULA DNAwalker-PT-15ringRRLarge-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>([]([]([](<>((LTLAP7==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1087 ms.
FORMULA DNAwalker-PT-15ringRRLarge-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(<>(X((LTLAP8==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2431 ms.
FORMULA DNAwalker-PT-15ringRRLarge-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (([]((LTLAP9==true)))U((LTLAP10==true)))U((LTLAP11==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1003 ms.
FORMULA DNAwalker-PT-15ringRRLarge-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (X((LTLAP3==true)))U(X((LTLAP4==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 593 ms.
FORMULA DNAwalker-PT-15ringRRLarge-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (([]((LTLAP12==true)))U(<>((LTLAP13==true))))U(<>(X(<>((LTLAP14==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 521 ms.
FORMULA DNAwalker-PT-15ringRRLarge-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>([]([]([]([]((LTLAP15==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 983 ms.
FORMULA DNAwalker-PT-15ringRRLarge-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, ([]([]([]((LTLAP16==true)))))U(X(<>((LTLAP17==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 838 ms.
FORMULA DNAwalker-PT-15ringRRLarge-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>(<>(<>(((LTLAP18==true))U((LTLAP19==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1055 ms.
FORMULA DNAwalker-PT-15ringRRLarge-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((<>(<>((LTLAP20==true))))U(((LTLAP21==true))U((LTLAP22==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 287 ms.
FORMULA DNAwalker-PT-15ringRRLarge-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1553607416581

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 26, 2019 1:34:47 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt]
Mar 26, 2019 1:34:47 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 26, 2019 1:34:47 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 77 ms
Mar 26, 2019 1:34:47 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 33 places.
Mar 26, 2019 1:34:47 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 312 transitions.
Mar 26, 2019 1:34:47 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 14 ms
Mar 26, 2019 1:34:47 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 135 ms
Mar 26, 2019 1:34:47 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 67 ms
Mar 26, 2019 1:34:48 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 312 transitions.
Mar 26, 2019 1:34:48 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 33 places.
Mar 26, 2019 1:34:48 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 312 transitions.
Mar 26, 2019 1:34:48 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 312 transitions.
Mar 26, 2019 1:34:48 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 1 ms
Mar 26, 2019 1:34:48 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Mar 26, 2019 1:34:48 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 0 place invariants in 8 ms
Mar 26, 2019 1:34:48 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 33 variables to be positive in 150 ms
Mar 26, 2019 1:34:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 312 transitions.
Mar 26, 2019 1:34:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/312 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 1:34:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 17 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 1:34:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 312 transitions.
Mar 26, 2019 1:34:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 15 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 1:34:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 312 transitions.
Mar 26, 2019 1:34:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/312) took 27 ms. Total solver calls (SAT/UNSAT): 1(1/0)
Mar 26, 2019 1:34:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/312) took 3069 ms. Total solver calls (SAT/UNSAT): 1450(1450/0)
Mar 26, 2019 1:35:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(67/312) took 6143 ms. Total solver calls (SAT/UNSAT): 2571(2571/0)
Mar 26, 2019 1:35:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(77/312) took 9317 ms. Total solver calls (SAT/UNSAT): 2880(2880/0)
Mar 26, 2019 1:35:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(110/312) took 12381 ms. Total solver calls (SAT/UNSAT): 3549(3549/0)
Mar 26, 2019 1:35:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(120/312) took 15393 ms. Total solver calls (SAT/UNSAT): 3722(3722/0)
Mar 26, 2019 1:35:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(128/312) took 18448 ms. Total solver calls (SAT/UNSAT): 3899(3899/0)
Mar 26, 2019 1:35:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(136/312) took 21935 ms. Total solver calls (SAT/UNSAT): 4085(4085/0)
Mar 26, 2019 1:35:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(140/312) took 25068 ms. Total solver calls (SAT/UNSAT): 4194(4194/0)
Mar 26, 2019 1:35:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(147/312) took 28426 ms. Total solver calls (SAT/UNSAT): 4329(4329/0)
Mar 26, 2019 1:35:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(151/312) took 31742 ms. Total solver calls (SAT/UNSAT): 4440(4440/0)
Mar 26, 2019 1:35:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(157/312) took 34957 ms. Total solver calls (SAT/UNSAT): 4553(4553/0)
Mar 26, 2019 1:35:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(161/312) took 38241 ms. Total solver calls (SAT/UNSAT): 4658(4658/0)
Mar 26, 2019 1:35:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(174/312) took 41269 ms. Total solver calls (SAT/UNSAT): 4938(4938/0)
Mar 26, 2019 1:35:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(217/312) took 44524 ms. Total solver calls (SAT/UNSAT): 5815(5815/0)
Mar 26, 2019 1:35:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(264/312) took 47810 ms. Total solver calls (SAT/UNSAT): 6437(6437/0)
Mar 26, 2019 1:35:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(275/312) took 50841 ms. Total solver calls (SAT/UNSAT): 6590(6590/0)
Mar 26, 2019 1:35:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(294/312) took 53928 ms. Total solver calls (SAT/UNSAT): 6780(6780/0)
Mar 26, 2019 1:35:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 55310 ms. Total solver calls (SAT/UNSAT): 6866(6866/0)
Mar 26, 2019 1:35:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 312 transitions.
Mar 26, 2019 1:36:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 38572 ms. Total solver calls (SAT/UNSAT): 1822(0/1822)
Mar 26, 2019 1:36:29 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 100701ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DNAwalker-PT-15ringRRLarge"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstoolsm"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstoolsm"
echo " Input is DNAwalker-PT-15ringRRLarge, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r192-oct2-155234410400727"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DNAwalker-PT-15ringRRLarge.tgz
mv DNAwalker-PT-15ringRRLarge execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;