Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2019-input.r192-oct2-155234409800368.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2019-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstoolsm
Input is DLCround-PT-06a, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r192-oct2-155234409800368
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 488K
-rw-r--r-- 1 mcc users 3.3K Feb 10 06:10 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K Feb 10 06:10 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 6 04:39 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 6 04:39 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 102 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 340 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.4K Feb 4 23:21 LTLCardinality.txt
-rw-r--r-- 1 mcc users 12K Feb 4 23:21 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K Feb 4 22:33 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.5K Feb 4 22:33 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Feb 2 22:08 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 19K Feb 2 22:08 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Jan 30 12:18 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K Jan 30 12:18 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 4 22:19 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 4 22:19 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 4 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 325K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-00
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-01
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-02
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-03
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-04
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-05
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-06
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-07
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-08
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-09
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-10
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-11
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-12
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-13
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-14
FORMULA_NAME DLCround-PT-06a-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1553580977915

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness, --load-order, /home/mcc/execution/model.ord], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness --load-order /home/mcc/execution/model.ord
Successfully loaded order from file /home/mcc/execution/model.ord
Loading property file ReachabilityCardinality.prop.
Read [invariant] property : DLCround-PT-06a-ReachabilityCardinality-00 with value :(!(((p150>=2)||((p82==0)||(p31==1)))&&(((p79==0)||(p184==1))&&(p152>=2))))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Read [reachable] property : DLCround-PT-06a-ReachabilityCardinality-01 with value :(((!((p101==0)||(p28==1)))||((p83>=3)&&(p195>=2)))&&(p149>=2))
Read [reachable] property : DLCround-PT-06a-ReachabilityCardinality-02 with value :(((!((p8==0)||(p47==1)))&&(((p12==0)||(p133==1))||(p159>=3)))&&((p28>=3)&&((p85==0)||(p48==1))))
Read [invariant] property : DLCround-PT-06a-ReachabilityCardinality-03 with value :((((p58>=2)||((p70==0)||(p121==1)))||(!(p61>=3)))||(((p173>=2)||(p66>=1))||(!(p106>=3))))
Read [invariant] property : DLCround-PT-06a-ReachabilityCardinality-04 with value :(((p101==0)||(p177==1))||((p121==0)||(p89==1)))
Read [invariant] property : DLCround-PT-06a-ReachabilityCardinality-05 with value :((p17==0)||(p130==1))
Read [reachable] property : DLCround-PT-06a-ReachabilityCardinality-06 with value :((p180>=3)&&((((p183==0)||(p161==1))||(p79>=2))&&(!(p34>=1))))
Read [invariant] property : DLCround-PT-06a-ReachabilityCardinality-07 with value :(!(((p23>=2)&&((p186==0)||(p66==1)))||(p61>=2)))
Read [reachable] property : DLCround-PT-06a-ReachabilityCardinality-08 with value :((!((p117>=2)||(p12>=3)))&&(p109>=2))
Read [invariant] property : DLCround-PT-06a-ReachabilityCardinality-09 with value :((p134==0)||(p169==1))
Read [invariant] property : DLCround-PT-06a-ReachabilityCardinality-10 with value :(!(p17>=2))
Read [reachable] property : DLCround-PT-06a-ReachabilityCardinality-11 with value :(p3>=3)
Read [invariant] property : DLCround-PT-06a-ReachabilityCardinality-12 with value :((!(p29>=3))||((((p9==0)||(p55==1))||((p40==0)||(p181==1)))&&((p20>=1)||((p195==0)||(p180==1)))))
Read [invariant] property : DLCround-PT-06a-ReachabilityCardinality-13 with value :(((((p169==0)||(p144==1))&&((p77==0)||(p15==1)))||(((p89==0)||(p44==1))||(p55>=3)))||(((p0==0)||(p21==1))||(((p2==0)||(p119==1))||(p97>=1))))
Read [invariant] property : DLCround-PT-06a-ReachabilityCardinality-14 with value :(!((!((p22==0)||(p103==1)))&&(!(p147>=1))))
Read [reachable] property : DLCround-PT-06a-ReachabilityCardinality-15 with value :(p72>=1)
Normalized transition count is 154
// Phase 1: matrix 154 rows 197 cols
invariant :p160 + -1'p196 = 0
invariant :p186 + -1'p196 = 0
invariant :p173 + -1'p196 = 0
invariant :p49 + p50 + p51 + p52 + p53 + p54 + p55 + p56 + p57 + p58 + -1'p196 = 0
invariant :p152 + -1'p196 = 0
invariant :p103 + -1'p196 = 0
invariant :p162 + -1'p196 = 0
invariant :p176 + -1'p196 = 0
invariant :p191 + -1'p196 = 0
invariant :p142 + -1'p196 = 0
invariant :p117 + -1'p196 = 0
invariant :p129 + -1'p196 = 0
invariant :p167 + -1'p196 = 0
invariant :p99 + -1'p196 = 0
invariant :p131 + -1'p196 = 0
invariant :p124 + -1'p196 = 0
invariant :p110 + -1'p196 = 0
invariant :p188 + -1'p196 = 0
invariant :p111 + -1'p196 = 0
invariant :p189 + -1'p196 = 0
invariant :p194 + -1'p196 = 0
invariant :p163 + -1'p196 = 0
invariant :p0 + p196 = 1
invariant :p150 + -1'p196 = 0
invariant :p172 + -1'p196 = 0
invariant :p104 + -1'p196 = 0
invariant :p149 + -1'p196 = 0
invariant :p119 + -1'p196 = 0
invariant :p161 + -1'p196 = 0
invariant :p22 + p23 + p24 + p25 + p26 + p27 + p28 + -1'p196 = 0
invariant :p15 + p16 + p17 + p18 + p19 + p20 + p21 + -1'p196 = 0
invariant :p79 + p80 + p81 + p82 + p83 + p84 + p85 + p86 + p87 + p88 + -1'p196 = 0
invariant :p123 + -1'p196 = 0
invariant :p120 + -1'p196 = 0
invariant :p146 + -1'p196 = 0
invariant :p105 + -1'p196 = 0
invariant :p155 + -1'p196 = 0
invariant :p102 + -1'p196 = 0
invariant :p130 + -1'p196 = 0
invariant :p183 + -1'p196 = 0
invariant :p127 + -1'p196 = 0
invariant :p116 + -1'p196 = 0
invariant :p138 + -1'p196 = 0
invariant :p121 + -1'p196 = 0
invariant :p181 + -1'p196 = 0
invariant :p174 + -1'p196 = 0
invariant :p89 + p90 + p91 + p92 + p93 + p94 + p95 + p96 + p97 + p98 + -1'p196 = 0
invariant :p39 + p40 + p41 + p42 + p43 + p44 + p45 + p46 + p47 + p48 + -1'p196 = 0
invariant :p122 + -1'p196 = 0
invariant :p112 + -1'p196 = 0
invariant :p126 + -1'p196 = 0
invariant :p187 + -1'p196 = 0
invariant :p178 + -1'p196 = 0
invariant :p118 + -1'p196 = 0
invariant :p190 + -1'p196 = 0
invariant :p101 + -1'p196 = 0
invariant :p137 + -1'p196 = 0
invariant :p135 + -1'p196 = 0
invariant :p156 + -1'p196 = 0
invariant :p193 + -1'p196 = 0
invariant :p113 + -1'p196 = 0
invariant :p182 + -1'p196 = 0
invariant :p140 + -1'p196 = 0
invariant :p115 + -1'p196 = 0
invariant :p170 + -1'p196 = 0
invariant :p1 + p2 + p3 + p4 + p5 + p6 + p7 + -1'p196 = 0
invariant :p192 + -1'p196 = 0
invariant :p147 + -1'p196 = 0
invariant :p148 + -1'p196 = 0
invariant :p153 + -1'p196 = 0
invariant :p133 + -1'p196 = 0
invariant :p158 + -1'p196 = 0
invariant :p132 + -1'p196 = 0
invariant :p114 + -1'p196 = 0
invariant :p144 + -1'p196 = 0
invariant :p145 + -1'p196 = 0
invariant :p109 + -1'p196 = 0
invariant :p143 + -1'p196 = 0
invariant :p29 + p30 + p31 + p32 + p33 + p34 + p35 + p36 + p37 + p38 + -1'p196 = 0
invariant :p100 + -1'p196 = 0
invariant :p179 + -1'p196 = 0
invariant :p169 + -1'p196 = 0
invariant :p180 + -1'p196 = 0
invariant :p125 + -1'p196 = 0
invariant :p166 + -1'p196 = 0
invariant :p175 + -1'p196 = 0
invariant :p195 + -1'p196 = 0
invariant :p141 + -1'p196 = 0
invariant :p164 + -1'p196 = 0
invariant :p151 + -1'p196 = 0
invariant :p185 + -1'p196 = 0
invariant :p107 + -1'p196 = 0
invariant :p128 + -1'p196 = 0
invariant :p59 + p60 + p61 + p62 + p63 + p64 + p65 + p66 + p67 + p68 + -1'p196 = 0
invariant :p168 + -1'p196 = 0
invariant :p134 + -1'p196 = 0
invariant :p139 + -1'p196 = 0
invariant :p165 + -1'p196 = 0
invariant :p108 + -1'p196 = 0
invariant :p177 + -1'p196 = 0
invariant :p184 + -1'p196 = 0
invariant :p154 + -1'p196 = 0
invariant :p157 + -1'p196 = 0
invariant :p171 + -1'p196 = 0
invariant :p69 + p70 + p71 + p72 + p73 + p74 + p75 + p76 + p77 + p78 + -1'p196 = 0
invariant :p136 + -1'p196 = 0
invariant :p159 + -1'p196 = 0
invariant :p8 + p9 + p10 + p11 + p12 + p13 + p14 + -1'p196 = 0
invariant :p106 + -1'p196 = 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 154
// Phase 1: matrix 154 rows 197 cols
invariant :p160 + -1'p196 = 0
invariant :p186 + -1'p196 = 0
invariant :p173 + -1'p196 = 0
invariant :p49 + p50 + p51 + p52 + p53 + p54 + p55 + p56 + p57 + p58 + -1'p196 = 0
invariant :p152 + -1'p196 = 0
invariant :p103 + -1'p196 = 0
invariant :p162 + -1'p196 = 0
invariant :p176 + -1'p196 = 0
invariant :p191 + -1'p196 = 0
invariant :p142 + -1'p196 = 0
invariant :p117 + -1'p196 = 0
invariant :p129 + -1'p196 = 0
invariant :p167 + -1'p196 = 0
invariant :p99 + -1'p196 = 0
invariant :p131 + -1'p196 = 0
invariant :p124 + -1'p196 = 0
invariant :p110 + -1'p196 = 0
invariant :p188 + -1'p196 = 0
invariant :p111 + -1'p196 = 0
invariant :p189 + -1'p196 = 0
invariant :p194 + -1'p196 = 0
invariant :p163 + -1'p196 = 0
invariant :p0 + p196 = 1
invariant :p150 + -1'p196 = 0
invariant :p172 + -1'p196 = 0
invariant :p104 + -1'p196 = 0
invariant :p149 + -1'p196 = 0
invariant :p119 + -1'p196 = 0
invariant :p161 + -1'p196 = 0
invariant :p22 + p23 + p24 + p25 + p26 + p27 + p28 + -1'p196 = 0
invariant :p15 + p16 + p17 + p18 + p19 + p20 + p21 + -1'p196 = 0
invariant :p79 + p80 + p81 + p82 + p83 + p84 + p85 + p86 + p87 + p88 + -1'p196 = 0
invariant :p123 + -1'p196 = 0
invariant :p120 + -1'p196 = 0
invariant :p146 + -1'p196 = 0
invariant :p105 + -1'p196 = 0
invariant :p155 + -1'p196 = 0
invariant :p102 + -1'p196 = 0
invariant :p130 + -1'p196 = 0
invariant :p183 + -1'p196 = 0
invariant :p127 + -1'p196 = 0
invariant :p116 + -1'p196 = 0
invariant :p138 + -1'p196 = 0
invariant :p121 + -1'p196 = 0
invariant :p181 + -1'p196 = 0
invariant :p174 + -1'p196 = 0
invariant :p89 + p90 + p91 + p92 + p93 + p94 + p95 + p96 + p97 + p98 + -1'p196 = 0
invariant :p39 + p40 + p41 + p42 + p43 + p44 + p45 + p46 + p47 + p48 + -1'p196 = 0
invariant :p122 + -1'p196 = 0
invariant :p112 + -1'p196 = 0
invariant :p126 + -1'p196 = 0
invariant :p187 + -1'p196 = 0
invariant :p178 + -1'p196 = 0
invariant :p118 + -1'p196 = 0
invariant :p190 + -1'p196 = 0
invariant :p101 + -1'p196 = 0
invariant :p137 + -1'p196 = 0
invariant :p135 + -1'p196 = 0
invariant :p156 + -1'p196 = 0
invariant :p193 + -1'p196 = 0
invariant :p113 + -1'p196 = 0
invariant :p182 + -1'p196 = 0
invariant :p140 + -1'p196 = 0
invariant :p115 + -1'p196 = 0
invariant :p170 + -1'p196 = 0
invariant :p1 + p2 + p3 + p4 + p5 + p6 + p7 + -1'p196 = 0
invariant :p192 + -1'p196 = 0
invariant :p147 + -1'p196 = 0
invariant :p148 + -1'p196 = 0
invariant :p153 + -1'p196 = 0
invariant :p133 + -1'p196 = 0
invariant :p158 + -1'p196 = 0
invariant :p132 + -1'p196 = 0
invariant :p114 + -1'p196 = 0
invariant :p144 + -1'p196 = 0
invariant :p145 + -1'p196 = 0
invariant :p109 + -1'p196 = 0
invariant :p143 + -1'p196 = 0
invariant :p29 + p30 + p31 + p32 + p33 + p34 + p35 + p36 + p37 + p38 + -1'p196 = 0
invariant :p100 + -1'p196 = 0
invariant :p179 + -1'p196 = 0
invariant :p169 + -1'p196 = 0
invariant :p180 + -1'p196 = 0
invariant :p125 + -1'p196 = 0
invariant :p166 + -1'p196 = 0
invariant :p175 + -1'p196 = 0
invariant :p195 + -1'p196 = 0
invariant :p141 + -1'p196 = 0
invariant :p164 + -1'p196 = 0
invariant :p151 + -1'p196 = 0
invariant :p185 + -1'p196 = 0
invariant :p107 + -1'p196 = 0
invariant :p128 + -1'p196 = 0
invariant :p59 + p60 + p61 + p62 + p63 + p64 + p65 + p66 + p67 + p68 + -1'p196 = 0
invariant :p168 + -1'p196 = 0
invariant :p134 + -1'p196 = 0
invariant :p139 + -1'p196 = 0
invariant :p165 + -1'p196 = 0
invariant :p108 + -1'p196 = 0
invariant :p177 + -1'p196 = 0
invariant :p184 + -1'p196 = 0
invariant :p154 + -1'p196 = 0
invariant :p157 + -1'p196 = 0
invariant :p171 + -1'p196 = 0
invariant :p69 + p70 + p71 + p72 + p73 + p74 + p75 + p76 + p77 + p78 + -1'p196 = 0
invariant :p136 + -1'p196 = 0
invariant :p159 + -1'p196 = 0
invariant :p8 + p9 + p10 + p11 + p12 + p13 + p14 + -1'p196 = 0
invariant :p106 + -1'p196 = 0
FORMULA DLCround-PT-06a-ReachabilityCardinality-00 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA DLCround-PT-06a-ReachabilityCardinality-01 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA DLCround-PT-06a-ReachabilityCardinality-02 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA DLCround-PT-06a-ReachabilityCardinality-03 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA DLCround-PT-06a-ReachabilityCardinality-04 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA DLCround-PT-06a-ReachabilityCardinality-05 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA DLCround-PT-06a-ReachabilityCardinality-06 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA DLCround-PT-06a-ReachabilityCardinality-07 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA DLCround-PT-06a-ReachabilityCardinality-08 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA DLCround-PT-06a-ReachabilityCardinality-09 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA DLCround-PT-06a-ReachabilityCardinality-10 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA DLCround-PT-06a-ReachabilityCardinality-11 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA DLCround-PT-06a-ReachabilityCardinality-12 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA DLCround-PT-06a-ReachabilityCardinality-13 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA DLCround-PT-06a-ReachabilityCardinality-14 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
petri,2.401e+10,15.1701,244704,2,34799,5,638014,6,0,1733,425989,0
Total reachable state count : 24010000001

Verifying 16 reachability properties.
Invariant property DLCround-PT-06a-ReachabilityCardinality-00 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-06a-ReachabilityCardinality-00,0,15.1724,244940,1,0,5,638014,7,0,1744,425989,0
Reachability property DLCround-PT-06a-ReachabilityCardinality-01 does not hold.
No reachable states exhibit your property : DLCround-PT-06a-ReachabilityCardinality-01

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-06a-ReachabilityCardinality-01,0,15.2099,245004,1,0,5,638014,8,0,1755,425989,0
Reachability property DLCround-PT-06a-ReachabilityCardinality-02 does not hold.
No reachable states exhibit your property : DLCround-PT-06a-ReachabilityCardinality-02

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-06a-ReachabilityCardinality-02,0,15.2135,245004,1,0,5,638014,9,0,1771,425989,0
Invariant property DLCround-PT-06a-ReachabilityCardinality-03 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-06a-ReachabilityCardinality-03,0,15.2361,245004,1,0,5,638014,10,0,1781,425989,0
Invariant property DLCround-PT-06a-ReachabilityCardinality-04 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-06a-ReachabilityCardinality-04,0,15.2369,245004,1,0,5,638014,11,0,1786,425989,0
Invariant property DLCround-PT-06a-ReachabilityCardinality-05 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-06a-ReachabilityCardinality-05,0,15.2374,245004,1,0,5,638014,12,0,1790,425989,0
Reachability property DLCround-PT-06a-ReachabilityCardinality-06 does not hold.
No reachable states exhibit your property : DLCround-PT-06a-ReachabilityCardinality-06

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-06a-ReachabilityCardinality-06,0,15.2378,245004,1,0,5,638014,13,0,1798,425989,0
Invariant property DLCround-PT-06a-ReachabilityCardinality-07 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-06a-ReachabilityCardinality-07,0,15.2652,245004,1,0,5,638014,14,0,1807,425989,0
Reachability property DLCround-PT-06a-ReachabilityCardinality-08 does not hold.
No reachable states exhibit your property : DLCround-PT-06a-ReachabilityCardinality-08

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-06a-ReachabilityCardinality-08,0,15.2874,245004,1,0,5,638014,15,0,1811,425989,0
Invariant property DLCround-PT-06a-ReachabilityCardinality-09 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-06a-ReachabilityCardinality-09,0,15.2889,245004,1,0,5,638014,16,0,1815,425989,0
Invariant property DLCround-PT-06a-ReachabilityCardinality-10 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-06a-ReachabilityCardinality-10,0,15.2907,245004,1,0,5,638014,17,0,1816,425989,0
Reachability property DLCround-PT-06a-ReachabilityCardinality-11 does not hold.
No reachable states exhibit your property : DLCround-PT-06a-ReachabilityCardinality-11

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-06a-ReachabilityCardinality-11,0,15.3131,245004,1,0,5,638014,18,0,1817,425989,0
Invariant property DLCround-PT-06a-ReachabilityCardinality-12 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-06a-ReachabilityCardinality-12,0,15.3181,245004,1,0,5,638014,19,0,1829,425989,0
Invariant property DLCround-PT-06a-ReachabilityCardinality-13 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-06a-ReachabilityCardinality-13,0,15.3674,245004,1,0,5,638014,20,0,1846,425989,0
Invariant property DLCround-PT-06a-ReachabilityCardinality-14 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-06a-ReachabilityCardinality-14,0,15.3937,245004,1,0,5,638014,21,0,1851,425989,0
Reachability property DLCround-PT-06a-ReachabilityCardinality-15 is true.
FORMULA DLCround-PT-06a-ReachabilityCardinality-15 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
DLCround-PT-06a-ReachabilityCardinality-15,1.372e+07,15.3946,245004,2,2327,6,638014,22,0,1852,425989,0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1553580999082

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 26, 2019 6:16:19 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt]
Mar 26, 2019 6:16:19 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 26, 2019 6:16:19 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 118 ms
Mar 26, 2019 6:16:19 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 197 places.
Mar 26, 2019 6:16:20 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 1313 transitions.
Mar 26, 2019 6:16:20 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Mar 26, 2019 6:16:20 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 32 ms
Mar 26, 2019 6:16:20 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 266 ms
Mar 26, 2019 6:16:20 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 255 ms
Mar 26, 2019 6:16:20 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 331 ms
Mar 26, 2019 6:16:21 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1313 transitions.
Mar 26, 2019 6:16:21 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1313 transitions.
Mar 26, 2019 6:16:21 AM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 197 places.
Mar 26, 2019 6:16:21 AM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 1313 transitions.
Mar 26, 2019 6:16:21 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1313 transitions.
Mar 26, 2019 6:16:21 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 7 ms
Mar 26, 2019 6:16:21 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
Mar 26, 2019 6:16:21 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 109 place invariants in 60 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 1621 ms.
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-00(UNSAT) depth K=0 took 9 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-01(UNSAT) depth K=0 took 20 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-02(UNSAT) depth K=0 took 23 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-03(UNSAT) depth K=0 took 26 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 1313 transitions.
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-04(UNSAT) depth K=0 took 52 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-05(UNSAT) depth K=0 took 26 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-06(UNSAT) depth K=0 took 26 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-07(UNSAT) depth K=0 took 52 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-08(UNSAT) depth K=0 took 50 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-09(UNSAT) depth K=0 took 10 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-10(UNSAT) depth K=0 took 15 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-11(UNSAT) depth K=0 took 28 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-12(UNSAT) depth K=0 took 4 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-13(UNSAT) depth K=0 took 38 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-14(UNSAT) depth K=0 took 7 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-15(UNSAT) depth K=0 took 15 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-00(UNSAT) depth K=1 took 13 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-01(UNSAT) depth K=1 took 18 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-02(UNSAT) depth K=1 took 24 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-03(UNSAT) depth K=1 took 19 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-04(UNSAT) depth K=1 took 12 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-05(UNSAT) depth K=1 took 16 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-06(UNSAT) depth K=1 took 23 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-07(UNSAT) depth K=1 took 7 ms
Mar 26, 2019 6:16:22 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-08(UNSAT) depth K=1 took 21 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-09(UNSAT) depth K=1 took 23 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-10(UNSAT) depth K=1 took 4 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-11(UNSAT) depth K=1 took 3 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-12(UNSAT) depth K=1 took 18 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-13(UNSAT) depth K=1 took 11 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-14(UNSAT) depth K=1 took 15 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-15(UNSAT) depth K=1 took 2 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 109 place invariants in 26 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-00(UNSAT) depth K=2 took 233 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-01(UNSAT) depth K=2 took 18 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-02(UNSAT) depth K=2 took 5 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-03(UNSAT) depth K=2 took 5 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-04(UNSAT) depth K=2 took 19 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-05(UNSAT) depth K=2 took 25 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-06(UNSAT) depth K=2 took 7 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-07(UNSAT) depth K=2 took 22 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-08(UNSAT) depth K=2 took 5 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-09(UNSAT) depth K=2 took 7 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-10(UNSAT) depth K=2 took 5 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-11(UNSAT) depth K=2 took 7 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-12(UNSAT) depth K=2 took 3 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-13(UNSAT) depth K=2 took 18 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-14(UNSAT) depth K=2 took 7 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-15(UNSAT) depth K=2 took 16 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 197 variables to be positive in 1940 ms
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 1313 transitions.
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/1313 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 129 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 1313 transitions.
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 82 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 6:16:23 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-00(UNSAT) depth K=3 took 478 ms
Mar 26, 2019 6:16:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-01(UNSAT) depth K=3 took 380 ms
Mar 26, 2019 6:16:24 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-02(UNSAT) depth K=3 took 346 ms
Mar 26, 2019 6:16:25 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-03(UNSAT) depth K=3 took 560 ms
Mar 26, 2019 6:16:25 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-04(UNSAT) depth K=3 took 426 ms
Mar 26, 2019 6:16:25 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 197 variables to be positive in 2896 ms
Mar 26, 2019 6:16:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant DLCround-PT-06a-ReachabilityCardinality-00
Mar 26, 2019 6:16:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for DLCround-PT-06a-ReachabilityCardinality-00
Mar 26, 2019 6:16:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property DLCround-PT-06a-ReachabilityCardinality-00(TRUE) depth K=0 took 154 ms
Mar 26, 2019 6:16:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate DLCround-PT-06a-ReachabilityCardinality-01
Mar 26, 2019 6:16:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for DLCround-PT-06a-ReachabilityCardinality-01
Mar 26, 2019 6:16:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property DLCround-PT-06a-ReachabilityCardinality-01(FALSE) depth K=0 took 163 ms
Mar 26, 2019 6:16:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate DLCround-PT-06a-ReachabilityCardinality-02
Mar 26, 2019 6:16:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for DLCround-PT-06a-ReachabilityCardinality-02
Mar 26, 2019 6:16:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property DLCround-PT-06a-ReachabilityCardinality-02(FALSE) depth K=0 took 199 ms
Mar 26, 2019 6:16:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant DLCround-PT-06a-ReachabilityCardinality-03
Mar 26, 2019 6:16:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for DLCround-PT-06a-ReachabilityCardinality-03
Mar 26, 2019 6:16:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property DLCround-PT-06a-ReachabilityCardinality-03(TRUE) depth K=0 took 124 ms
Mar 26, 2019 6:16:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant DLCround-PT-06a-ReachabilityCardinality-04
Mar 26, 2019 6:16:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for DLCround-PT-06a-ReachabilityCardinality-04
Mar 26, 2019 6:16:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property DLCround-PT-06a-ReachabilityCardinality-04(TRUE) depth K=0 took 60 ms
Mar 26, 2019 6:16:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant DLCround-PT-06a-ReachabilityCardinality-05
Mar 26, 2019 6:16:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for DLCround-PT-06a-ReachabilityCardinality-05
Mar 26, 2019 6:16:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property DLCround-PT-06a-ReachabilityCardinality-05(TRUE) depth K=0 took 123 ms
Mar 26, 2019 6:16:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate DLCround-PT-06a-ReachabilityCardinality-06
Mar 26, 2019 6:16:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for DLCround-PT-06a-ReachabilityCardinality-06
Mar 26, 2019 6:16:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property DLCround-PT-06a-ReachabilityCardinality-06(FALSE) depth K=0 took 87 ms
Mar 26, 2019 6:16:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant DLCround-PT-06a-ReachabilityCardinality-07
Mar 26, 2019 6:16:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for DLCround-PT-06a-ReachabilityCardinality-07
Mar 26, 2019 6:16:26 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property DLCround-PT-06a-ReachabilityCardinality-07(TRUE) depth K=0 took 78 ms
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate DLCround-PT-06a-ReachabilityCardinality-08
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for DLCround-PT-06a-ReachabilityCardinality-08
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property DLCround-PT-06a-ReachabilityCardinality-08(FALSE) depth K=0 took 66 ms
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant DLCround-PT-06a-ReachabilityCardinality-09
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for DLCround-PT-06a-ReachabilityCardinality-09
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property DLCround-PT-06a-ReachabilityCardinality-09(TRUE) depth K=0 took 63 ms
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-05(UNSAT) depth K=3 took 1437 ms
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant DLCround-PT-06a-ReachabilityCardinality-10
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for DLCround-PT-06a-ReachabilityCardinality-10
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property DLCround-PT-06a-ReachabilityCardinality-10(TRUE) depth K=0 took 66 ms
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate DLCround-PT-06a-ReachabilityCardinality-11
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for DLCround-PT-06a-ReachabilityCardinality-11
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property DLCround-PT-06a-ReachabilityCardinality-11(FALSE) depth K=0 took 60 ms
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant DLCround-PT-06a-ReachabilityCardinality-12
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for DLCround-PT-06a-ReachabilityCardinality-12
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property DLCround-PT-06a-ReachabilityCardinality-12(TRUE) depth K=0 took 53 ms
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant DLCround-PT-06a-ReachabilityCardinality-13
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for DLCround-PT-06a-ReachabilityCardinality-13
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property DLCround-PT-06a-ReachabilityCardinality-13(TRUE) depth K=0 took 50 ms
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-06(UNSAT) depth K=3 took 221 ms
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant DLCround-PT-06a-ReachabilityCardinality-14
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for DLCround-PT-06a-ReachabilityCardinality-14
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property DLCround-PT-06a-ReachabilityCardinality-14(TRUE) depth K=0 took 48 ms
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesDLCround-PT-06a-ReachabilityCardinality-15
Mar 26, 2019 6:16:27 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property DLCround-PT-06a-ReachabilityCardinality-15(SAT) depth K=0 took 182 ms
Mar 26, 2019 6:16:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesDLCround-PT-06a-ReachabilityCardinality-15
Mar 26, 2019 6:16:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property DLCround-PT-06a-ReachabilityCardinality-15(SAT) depth K=1 took 791 ms
Mar 26, 2019 6:16:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-07(UNSAT) depth K=3 took 1053 ms
Mar 26, 2019 6:16:28 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-08(UNSAT) depth K=3 took 441 ms
Mar 26, 2019 6:16:29 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-09(UNSAT) depth K=3 took 445 ms
Mar 26, 2019 6:16:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-10(UNSAT) depth K=3 took 2006 ms
Mar 26, 2019 6:16:31 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-11(UNSAT) depth K=3 took 437 ms
Mar 26, 2019 6:16:32 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-12(UNSAT) depth K=3 took 314 ms
Mar 26, 2019 6:16:32 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-13(UNSAT) depth K=3 took 784 ms
Mar 26, 2019 6:16:33 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-14(UNSAT) depth K=3 took 1004 ms
Mar 26, 2019 6:16:34 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property DLCround-PT-06a-ReachabilityCardinality-15(UNSAT) depth K=3 took 820 ms
Mar 26, 2019 6:16:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
Mar 26, 2019 6:16:38 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Mar 26, 2019 6:16:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying DLCround-PT-06a-ReachabilityCardinality-15 SMT depth 4
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
Mar 26, 2019 6:16:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 4
Mar 26, 2019 6:16:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 4
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Mar 26, 2019 6:16:38 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
WARNING: Unexpected error occurred while running SMT. Was verifying DLCround-PT-06a-ReachabilityCardinality-15 K-induction depth 2
Exception in thread "Thread-8" java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:336)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
... 3 more
Mar 26, 2019 6:16:38 AM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 15/ 16 properties. Interrupting other analysis methods.
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeAblingForPredicate(NecessaryEnablingsolver.java:755)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:512)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Mar 26, 2019 6:16:38 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 18270ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="DLCround-PT-06a"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstoolsm"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstoolsm"
echo " Input is DLCround-PT-06a, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r192-oct2-155234409800368"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/DLCround-PT-06a.tgz
mv DLCround-PT-06a execution
cd execution
if [ "ReachabilityCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;