Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/local/x2003239/mcc2019-input.r189-csrt-155225080800681.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2019-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.............................................................................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstoolsm
Input is BusinessProcesses-PT-01, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r189-csrt-155225080800681
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 220K
-rw-r--r-- 1 mcc users 3.3K Feb 9 08:18 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K Feb 9 08:18 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Feb 5 06:44 CTLFireability.txt
-rw-r--r-- 1 mcc users 23K Feb 5 06:44 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 110 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 348 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.7K Feb 4 23:01 LTLCardinality.txt
-rw-r--r-- 1 mcc users 13K Feb 4 23:01 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K Feb 4 22:32 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.0K Feb 4 22:32 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.4K Feb 2 01:36 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K Feb 2 01:36 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Jan 29 14:55 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K Jan 29 14:55 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 4 22:18 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 4 22:18 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 3 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 47K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BusinessProcesses-PT-01-LTLCardinality-00
FORMULA_NAME BusinessProcesses-PT-01-LTLCardinality-01
FORMULA_NAME BusinessProcesses-PT-01-LTLCardinality-02
FORMULA_NAME BusinessProcesses-PT-01-LTLCardinality-03
FORMULA_NAME BusinessProcesses-PT-01-LTLCardinality-04
FORMULA_NAME BusinessProcesses-PT-01-LTLCardinality-05
FORMULA_NAME BusinessProcesses-PT-01-LTLCardinality-06
FORMULA_NAME BusinessProcesses-PT-01-LTLCardinality-07
FORMULA_NAME BusinessProcesses-PT-01-LTLCardinality-08
FORMULA_NAME BusinessProcesses-PT-01-LTLCardinality-09
FORMULA_NAME BusinessProcesses-PT-01-LTLCardinality-10
FORMULA_NAME BusinessProcesses-PT-01-LTLCardinality-11
FORMULA_NAME BusinessProcesses-PT-01-LTLCardinality-12
FORMULA_NAME BusinessProcesses-PT-01-LTLCardinality-13
FORMULA_NAME BusinessProcesses-PT-01-LTLCardinality-14
FORMULA_NAME BusinessProcesses-PT-01-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1553639766053

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock, --load-order, /home/mcc/execution/model.ord], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock --load-order /home/mcc/execution/model.ord
Read 16 LTL properties
Successfully loaded order from file /home/mcc/execution/model.ord
Checking formula 0 : !((("(p139>=1)")U(G("((p118==0)||(p142==1))"))))
Formula 0 simplified : !("(p139>=1)" U G"((p118==0)||(p142==1))")
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 178 rows 200 cols
invariant :-1'p90 + -1'p96 + -1'p97 + -1'p98 + -1'p99 + -1'p100 + p101 + p102 + p103 + p104 + p105 = 0
invariant :-1'p89 + -1'p90 + -1'p96 + -1'p97 + -1'p98 + -1'p99 + -1'p100 + p106 + p107 + p108 + p109 + p110 = 0
invariant :-1'p8 + -1'p9 + -1'p17 + -1'p18 + -1'p19 + p39 + p40 + p41 + -1'p163 + -1'p164 + p171 + p172 = 0
invariant :p194 + p195 + p196 + -1'p197 + -1'p198 + -1'p199 = 0
invariant :p0 + p1 + p82 + p83 + p84 + p85 + p86 + p87 + p88 + p89 + p90 + p96 + p97 + p98 + p99 + p100 = 1
invariant :-1'p84 + -1'p85 + -1'p86 + -1'p87 + -1'p88 + -1'p89 + -1'p90 + -1'p96 + -1'p97 + -1'p98 + -1'p99 + -1'p100 + p131 + p132 + p133 + p134 + p135 = 0
invariant :-1'p86 + -1'p87 + -1'p88 + -1'p89 + -1'p90 + -1'p96 + -1'p97 + -1'p98 + -1'p99 + -1'p100 + p121 + p122 + p123 + p124 + p125 = 0
invariant :p15 + p16 + -1'p159 + -1'p160 = 0
invariant :-1'p87 + -1'p88 + -1'p89 + -1'p90 + -1'p96 + -1'p97 + -1'p98 + -1'p99 + -1'p100 + p116 + p117 + p118 + p119 + p120 = 0
invariant :p66 + p67 + -1'p189 + -1'p190 = 0
invariant :-1'p9 + -1'p17 + -1'p18 + -1'p19 + p23 + p24 + p25 + p26 + p27 + p28 + p29 + p30 + p31 + p32 + p33 + p34 + p35 + p36 + p37 + p38 + -1'p163 + -1'p164 = 0
invariant :-1'p4 + -1'p5 + -1'p51 + -1'p52 + -1'p53 + p74 + p75 + p76 + p77 + -1'p179 + -1'p180 = 0
invariant :p59 + p62 + p68 + -1'p182 + -1'p185 + p195 + p196 + -1'p197 + -1'p198 + -1'p199 = 0
invariant :p48 + p49 + p50 + -1'p175 + -1'p176 = 0
invariant :p91 + p92 + p93 + p94 + p95 + -1'p96 + -1'p97 + -1'p98 + -1'p99 + -1'p100 = 0
invariant :-1'p1 + -1'p82 + -1'p83 + -1'p84 + -1'p85 + -1'p86 + -1'p87 + -1'p88 + -1'p89 + -1'p90 + -1'p96 + -1'p97 + -1'p98 + -1'p99 + -1'p100 + p141 + p142 + p143 + p144 + p145 + p146 + p147 + p148 + p149 + p150 + p151 + p152 + p153 + p154 + p155 + p156 + p157 + p158 + p159 + p160 + p161 + p162 + p163 + p164 + p165 + p166 + p167 + p168 + p169 + p170 + p171 + p172 + p173 + p174 + p175 + p176 + p177 + p178 + p179 + p180 + p181 + p182 + p183 + p184 + p185 + p186 + p187 + p188 + p189 + p190 + p191 + p192 + p193 + p197 + p198 + p199 = 0
invariant :p3 + p4 + p5 + p51 + p52 + p53 + -1'p78 + -1'p79 + -1'p80 + -1'p81 + p179 + p180 = 0
invariant :-1'p68 + -1'p69 + -1'p70 + p71 + p72 + p73 = 0
invariant :-1'p5 + -1'p51 + -1'p52 + -1'p53 + p57 + p58 + -1'p59 + p60 + p61 + p63 + p64 + -1'p68 + p72 + p73 + -1'p179 + -1'p180 + 2'p182 + p185 + p188 + p189 + p190 + -1'p195 + -1'p196 + 2'p197 + p198 + p199 = 0
invariant :p59 + p65 + p68 + p69 + p70 + -1'p72 + -1'p73 + -1'p182 + -1'p188 + -1'p197 = 0
invariant :p6 + p7 + p8 + p9 + p17 + p18 + p19 + -1'p51 + -1'p52 + -1'p53 + p163 + p164 + -1'p179 + -1'p180 = 0
invariant :p2 + p78 + p79 + p80 + p81 + -1'p82 + -1'p83 + -1'p84 + -1'p85 + -1'p86 + -1'p87 + -1'p88 + -1'p89 + -1'p90 + -1'p96 + -1'p97 + -1'p98 + -1'p99 + -1'p100 = 0
invariant :-1'p83 + -1'p84 + -1'p85 + -1'p86 + -1'p87 + -1'p88 + -1'p89 + -1'p90 + -1'p96 + -1'p97 + -1'p98 + -1'p99 + -1'p100 + p136 + p137 + p138 + p139 + p140 = 0
invariant :p54 + p55 + p56 + -1'p179 + -1'p180 = 0
invariant :p42 + p43 + p44 + -1'p171 + -1'p172 = 0
invariant :-1'p7 + -1'p8 + -1'p9 + -1'p17 + -1'p18 + -1'p19 + p45 + p46 + p47 + -1'p163 + -1'p164 + p175 + p176 = 0
invariant :p10 + p11 + p12 + p13 + p14 + -1'p17 + -1'p18 + -1'p19 + p159 + p160 + -1'p163 + -1'p164 = 0
invariant :-1'p88 + -1'p89 + -1'p90 + -1'p96 + -1'p97 + -1'p98 + -1'p99 + -1'p100 + p111 + p112 + p113 + p114 + p115 = 0
invariant :-1'p85 + -1'p86 + -1'p87 + -1'p88 + -1'p89 + -1'p90 + -1'p96 + -1'p97 + -1'p98 + -1'p99 + -1'p100 + p126 + p127 + p128 + p129 + p130 = 0
invariant :p20 + p21 + p22 + -1'p163 + -1'p164 = 0
Reverse transition relation is NOT exact ! Due to transitions t3, t5, t8, t10, t14, t17, t20, t23, t25, t27, t30, t33, t35, t37, t42, t54, t55, t58, t59, t62, t63, t66, t67, t70, t71, t74, t75, t78, t79, t82, t83, t86, t87, t95, t99, t101, t105, t106, t109, t110, t113, t114, t117, t120, t122, t125, t127, t129, t133, t134, t137, t140, t142, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :5/120/53/178
Computing Next relation with stutter on 105 deadlock states
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 4596 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 374 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, ((LTLAP0==true))U([]((LTLAP1==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 892 ms.
FORMULA BusinessProcesses-PT-01-LTLCardinality-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (((LTLAP2==true))U((LTLAP3==true)))U((LTLAP4==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 402 ms.
FORMULA BusinessProcesses-PT-01-LTLCardinality-01 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(((LTLAP5==true))U(<>((LTLAP6==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 755 ms.
FORMULA BusinessProcesses-PT-01-LTLCardinality-02 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(X(((LTLAP7==true))U((LTLAP8==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3362 ms.
FORMULA BusinessProcesses-PT-01-LTLCardinality-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>(<>(<>([]((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 524 ms.
FORMULA BusinessProcesses-PT-01-LTLCardinality-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(X((LTLAP10==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 13403 ms.
FORMULA BusinessProcesses-PT-01-LTLCardinality-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((<>((LTLAP11==true)))U([]((LTLAP12==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
4 unique states visited
4 strongly connected components in search stack
4 transitions explored
4 items max in DFS search stack
13398 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,134.124,2165296,1,0,823,9.72213e+06,395,615,5651,9.16117e+06,1195
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA BusinessProcesses-PT-01-LTLCardinality-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 1 : !(((("(p55>=1)")U("((p173==0)||(p68==1))"))U("((p191==0)||(p118==1))")))
Formula 1 simplified : !(("(p55>=1)" U "((p173==0)||(p68==1))") U "((p191==0)||(p118==1))")
Computing Next relation with stutter on 105 deadlock states
1 unique states visited
0 strongly connected components in search stack
0 transitions explored
1 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,134.137,2165816,1,0,823,9.72213e+06,417,615,5682,9.16117e+06,1201
no accepting run found
Formula 1 is TRUE no accepting run found.
FORMULA BusinessProcesses-PT-01-LTLCardinality-01 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 2 : !((X(("(p198>=3)")U(F("((p93==0)||(p182==1))")))))
Formula 2 simplified : !X("(p198>=3)" U F"((p93==0)||(p182==1))")
Computing Next relation with stutter on 105 deadlock states
2 unique states visited
0 strongly connected components in search stack
1 transitions explored
2 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,134.138,2165816,1,0,823,9.72213e+06,426,615,5688,9.16117e+06,1205
no accepting run found
Formula 2 is TRUE no accepting run found.
FORMULA BusinessProcesses-PT-01-LTLCardinality-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 3 : !((X(X(("(p12>=1)")U("(p199>=2)")))))
Formula 3 simplified : !XX("(p12>=1)" U "(p199>=2)")
Computing Next relation with stutter on 105 deadlock states
5 unique states visited
5 strongly connected components in search stack
5 transitions explored
5 items max in DFS search stack
8490 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,219.031,2233880,1,0,825,9.92963e+06,19,618,3028,9.38272e+06,146
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA BusinessProcesses-PT-01-LTLCardinality-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL USE_NUPN
Checking formula 4 : !((F(F(F(G("(p155>=2)"))))))
Formula 4 simplified : !FG"(p155>=2)"
WARNING : LTSmin timed out (>225 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((<>((LTLAP11==true)))U([]((LTLAP12==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, []((X((LTLAP13==true)))U(X((LTLAP14==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Computing Next relation with stutter on 105 deadlock states
LTSmin run took 119600 ms.
FORMULA BusinessProcesses-PT-01-LTLCardinality-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((<>((LTLAP15==true)))U([]((LTLAP16==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1556 ms.
FORMULA BusinessProcesses-PT-01-LTLCardinality-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((LTLAP17==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 72605 ms.
FORMULA BusinessProcesses-PT-01-LTLCardinality-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, [](((LTLAP18==true))U(<>((LTLAP19==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 569 ms.
FORMULA BusinessProcesses-PT-01-LTLCardinality-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(X(((LTLAP20==true))U((LTLAP21==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1214 ms.
FORMULA BusinessProcesses-PT-01-LTLCardinality-11 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>(([]((LTLAP22==true)))U(<>((LTLAP23==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 500 ms.
FORMULA BusinessProcesses-PT-01-LTLCardinality-12 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (<>(<>((LTLAP24==true))))U(((LTLAP25==true))U((LTLAP26==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 629 ms.
FORMULA BusinessProcesses-PT-01-LTLCardinality-13 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 561 ms.
FORMULA BusinessProcesses-PT-01-LTLCardinality-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((LTLAP27==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 406 ms.
FORMULA BusinessProcesses-PT-01-LTLCardinality-15 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Retrying LTSmin with larger timeout 1800 s
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((<>((LTLAP11==true)))U([]((LTLAP12==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Detected timeout of ITS tools.
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 1 LTL properties
Checking formula 0 : !((X((F("((i0.i1.i0.i0.i0.i0.i0.i0.i0.i0.u31.p96==0)||(i1.u54.p161==1))"))U(G("((i1.u54.p156==0)||(i1.u54.p157==1))")))))
Formula 0 simplified : !X(F"((i0.i1.i0.i0.i0.i0.i0.i0.i0.i0.u31.p96==0)||(i1.u54.p161==1))" U G"((i1.u54.p156==0)||(i1.u54.p157==1))")
built 2 ordering constraints for composite.
built 44 ordering constraints for composite.
built 25 ordering constraints for composite.
built 24 ordering constraints for composite.
built 23 ordering constraints for composite.
built 17 ordering constraints for composite.
built 15 ordering constraints for composite.
built 13 ordering constraints for composite.
built 11 ordering constraints for composite.
built 7 ordering constraints for composite.
built 10 ordering constraints for composite.
built 21 ordering constraints for composite.
built 19 ordering constraints for composite.
built 17 ordering constraints for composite.
built 15 ordering constraints for composite.
built 13 ordering constraints for composite.
built 11 ordering constraints for composite.
built 9 ordering constraints for composite.
built 7 ordering constraints for composite.
built 5 ordering constraints for composite.
built 27 ordering constraints for composite.
Reverse transition relation is NOT exact ! Due to transitions i0.i0.i0.u19.t95, i0.i0.i0.i0.i0.t106, i0.i0.i0.i0.i0.u15.t109, i0.i0.i0.i0.i0.i0.t110, i0.i0.i0.i0.i0.i0.u14.t113, i0.i0.i0.i0.i0.i0.i0.t114, i0.i0.i0.i0.i0.i0.i0.u13.t117, i0.i0.i0.i0.i0.i0.i0.i0.u12.t120, i0.i0.i0.i0.i0.i0.i0.i0.u12.t122, i0.i0.i0.i0.i0.i0.i0.i0.u12.t125, i0.i0.i0.i0.i0.i0.i0.i0.u12.t127, i0.i0.i0.i0.i0.i0.i0.i0.u12.t129, i0.i0.i0.i0.i0.i0.i0.i0.u12.t133, i0.i0.i0.i0.i0.i0.i0.i0.i0.t134, i0.i0.i0.i0.i0.i0.i0.i0.i0.u10.t140, i0.i0.i0.i0.i0.i0.i0.i0.i0.u10.t142, i0.i0.i0.i0.i0.i0.i0.i0.i0.u11.t137, i0.i0.i0.i0.i1.u44.t99, i0.i0.i0.i0.i1.u44.t101, i0.i0.i0.i0.i1.u44.t105, i0.i1.u39.t54, i0.i1.u39.t55, i0.i1.i0.u38.t58, i0.i1.i0.u38.t59, i0.i1.i0.i0.u37.t62, i0.i1.i0.i0.u37.t63, i0.i1.i0.i0.i0.u36.t66, i0.i1.i0.i0.i0.u36.t67, i0.i1.i0.i0.i0.i0.u35.t70, i0.i1.i0.i0.i0.i0.u35.t71, i0.i1.i0.i0.i0.i0.i0.u34.t74, i0.i1.i0.i0.i0.i0.i0.u34.t75, i0.i1.i0.i0.i0.i0.i0.i0.u33.t78, i0.i1.i0.i0.i0.i0.i0.i0.u33.t79, i0.i1.i0.i0.i0.i0.i0.i0.i0.u32.t82, i0.i1.i0.i0.i0.i0.i0.i0.i0.u32.t83, i0.i1.i0.i0.i0.i0.i0.i0.i0.i0.u31.t86, i0.i1.i0.i0.i0.i0.i0.i0.i0.i0.u31.t87, i1.u54.t3, i1.u54.t5, i1.u54.t8, i1.u54.t10, i1.u54.t14, i1.u54.t17, i1.u54.t20, i1.u54.t23, i1.u54.t25, i1.u54.t27, i1.u54.t30, i1.u54.t33, i1.u54.t35, i1.u54.t37, i1.u54.t42, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :1/118/53/172
Computing Next relation with stutter on 105 deadlock states
WARNING : LTSmin timed out (>1800 s) on command CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((<>((LTLAP11==true)))U([]((LTLAP12==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
Detected timeout of ITS tools.
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 1 LTL properties
Checking formula 0 : !((X((F("((i0.i1.i0.i0.i0.i0.i0.i0.i0.i0.u31.p96==0)||(i1.u54.p161==1))"))U(G("((i1.u54.p156==0)||(i1.u54.p157==1))")))))
Formula 0 simplified : !X(F"((i0.i1.i0.i0.i0.i0.i0.i0.i0.i0.u31.p96==0)||(i1.u54.p161==1))" U G"((i1.u54.p156==0)||(i1.u54.p157==1))")
built 2 ordering constraints for composite.
built 44 ordering constraints for composite.
built 25 ordering constraints for composite.
built 24 ordering constraints for composite.
built 23 ordering constraints for composite.
built 17 ordering constraints for composite.
built 15 ordering constraints for composite.
built 13 ordering constraints for composite.
built 11 ordering constraints for composite.
built 7 ordering constraints for composite.
built 10 ordering constraints for composite.
built 21 ordering constraints for composite.
built 19 ordering constraints for composite.
built 17 ordering constraints for composite.
built 15 ordering constraints for composite.
built 13 ordering constraints for composite.
built 11 ordering constraints for composite.
built 9 ordering constraints for composite.
built 7 ordering constraints for composite.
built 5 ordering constraints for composite.
built 27 ordering constraints for composite.
Reverse transition relation is NOT exact ! Due to transitions i0.i0.i0.u19.t95, i0.i0.i0.i0.i0.t106, i0.i0.i0.i0.i0.u15.t109, i0.i0.i0.i0.i0.i0.t110, i0.i0.i0.i0.i0.i0.u14.t113, i0.i0.i0.i0.i0.i0.i0.t114, i0.i0.i0.i0.i0.i0.i0.u13.t117, i0.i0.i0.i0.i0.i0.i0.i0.u12.t120, i0.i0.i0.i0.i0.i0.i0.i0.u12.t122, i0.i0.i0.i0.i0.i0.i0.i0.u12.t125, i0.i0.i0.i0.i0.i0.i0.i0.u12.t127, i0.i0.i0.i0.i0.i0.i0.i0.u12.t129, i0.i0.i0.i0.i0.i0.i0.i0.u12.t133, i0.i0.i0.i0.i0.i0.i0.i0.i0.t134, i0.i0.i0.i0.i0.i0.i0.i0.i0.u10.t140, i0.i0.i0.i0.i0.i0.i0.i0.i0.u10.t142, i0.i0.i0.i0.i0.i0.i0.i0.i0.u11.t137, i0.i0.i0.i0.i1.u44.t99, i0.i0.i0.i0.i1.u44.t101, i0.i0.i0.i0.i1.u44.t105, i0.i1.u39.t54, i0.i1.u39.t55, i0.i1.i0.u38.t58, i0.i1.i0.u38.t59, i0.i1.i0.i0.u37.t62, i0.i1.i0.i0.u37.t63, i0.i1.i0.i0.i0.u36.t66, i0.i1.i0.i0.i0.u36.t67, i0.i1.i0.i0.i0.i0.u35.t70, i0.i1.i0.i0.i0.i0.u35.t71, i0.i1.i0.i0.i0.i0.i0.u34.t74, i0.i1.i0.i0.i0.i0.i0.u34.t75, i0.i1.i0.i0.i0.i0.i0.i0.u33.t78, i0.i1.i0.i0.i0.i0.i0.i0.u33.t79, i0.i1.i0.i0.i0.i0.i0.i0.i0.u32.t82, i0.i1.i0.i0.i0.i0.i0.i0.i0.u32.t83, i0.i1.i0.i0.i0.i0.i0.i0.i0.i0.u31.t86, i0.i1.i0.i0.i0.i0.i0.i0.i0.i0.u31.t87, i1.u54.t3, i1.u54.t5, i1.u54.t8, i1.u54.t10, i1.u54.t14, i1.u54.t17, i1.u54.t20, i1.u54.t23, i1.u54.t25, i1.u54.t27, i1.u54.t30, i1.u54.t33, i1.u54.t35, i1.u54.t37, i1.u54.t42, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :1/118/53/172
Computing Next relation with stutter on 105 deadlock states

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 26, 2019 10:36:09 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt]
Mar 26, 2019 10:36:09 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 26, 2019 10:36:09 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 65 ms
Mar 26, 2019 10:36:09 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 200 places.
Mar 26, 2019 10:36:09 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 178 transitions.
Mar 26, 2019 10:36:09 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Mar 26, 2019 10:36:09 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 48 ms
Mar 26, 2019 10:36:09 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 128 ms
Mar 26, 2019 10:36:09 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 24 ms
Mar 26, 2019 10:36:10 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 178 transitions.
Mar 26, 2019 10:36:10 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 200 places.
Mar 26, 2019 10:36:10 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 178 transitions.
Mar 26, 2019 10:36:10 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 178 transitions.
Mar 26, 2019 10:36:10 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 9 ms
Mar 26, 2019 10:36:10 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 1 ms
Mar 26, 2019 10:36:11 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 30 place invariants in 66 ms
Mar 26, 2019 10:36:11 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 200 variables to be positive in 791 ms
Mar 26, 2019 10:36:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 178 transitions.
Mar 26, 2019 10:36:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/178 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 10:36:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 26 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 10:36:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 178 transitions.
Mar 26, 2019 10:36:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 2 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 10:36:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 178 transitions.
Mar 26, 2019 10:36:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/178) took 930 ms. Total solver calls (SAT/UNSAT): 30(30/0)
Mar 26, 2019 10:36:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/178) took 4470 ms. Total solver calls (SAT/UNSAT): 231(216/15)
Mar 26, 2019 10:36:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(6/178) took 9104 ms. Total solver calls (SAT/UNSAT): 496(481/15)
Mar 26, 2019 10:36:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(9/178) took 14429 ms. Total solver calls (SAT/UNSAT): 739(724/15)
Mar 26, 2019 10:36:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(12/178) took 18165 ms. Total solver calls (SAT/UNSAT): 1000(985/15)
Mar 26, 2019 10:36:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(15/178) took 23486 ms. Total solver calls (SAT/UNSAT): 1202(1187/15)
Mar 26, 2019 10:36:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(17/178) took 27443 ms. Total solver calls (SAT/UNSAT): 1349(1334/15)
Mar 26, 2019 10:36:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(19/178) took 30517 ms. Total solver calls (SAT/UNSAT): 1501(1486/15)
Mar 26, 2019 10:36:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(21/178) took 33842 ms. Total solver calls (SAT/UNSAT): 1648(1633/15)
Mar 26, 2019 10:36:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(24/178) took 37599 ms. Total solver calls (SAT/UNSAT): 1849(1834/15)
Mar 26, 2019 10:36:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(27/178) took 41033 ms. Total solver calls (SAT/UNSAT): 2041(2026/15)
Mar 26, 2019 10:37:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(29/178) took 44450 ms. Total solver calls (SAT/UNSAT): 2197(2182/15)
Mar 26, 2019 10:37:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(34/178) took 48241 ms. Total solver calls (SAT/UNSAT): 2494(2479/15)
Mar 26, 2019 10:37:09 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(37/178) took 51316 ms. Total solver calls (SAT/UNSAT): 2656(2641/15)
Mar 26, 2019 10:37:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(40/178) took 54998 ms. Total solver calls (SAT/UNSAT): 2809(2794/15)
Mar 26, 2019 10:37:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(47/178) took 58461 ms. Total solver calls (SAT/UNSAT): 3131(3116/15)
Mar 26, 2019 10:37:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(51/178) took 62078 ms. Total solver calls (SAT/UNSAT): 3293(3264/29)
Mar 26, 2019 10:37:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(56/178) took 65152 ms. Total solver calls (SAT/UNSAT): 3422(3368/54)
Mar 26, 2019 10:37:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(63/178) took 68401 ms. Total solver calls (SAT/UNSAT): 3557(3492/65)
Mar 26, 2019 10:37:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(77/178) took 71574 ms. Total solver calls (SAT/UNSAT): 3837(3738/99)
Mar 26, 2019 10:37:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(84/178) took 75338 ms. Total solver calls (SAT/UNSAT): 3954(3844/110)
Mar 26, 2019 10:37:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(87/178) took 78690 ms. Total solver calls (SAT/UNSAT): 4062(3943/119)
Mar 26, 2019 10:37:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(100/178) took 82070 ms. Total solver calls (SAT/UNSAT): 4190(4071/119)
Mar 26, 2019 10:37:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(118/178) took 85189 ms. Total solver calls (SAT/UNSAT): 4411(4292/119)
Mar 26, 2019 10:37:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(148/178) took 88233 ms. Total solver calls (SAT/UNSAT): 4746(4627/119)
Mar 26, 2019 10:37:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(156/178) took 91440 ms. Total solver calls (SAT/UNSAT): 4935(4816/119)
Mar 26, 2019 10:37:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(166/178) took 94737 ms. Total solver calls (SAT/UNSAT): 5065(4946/119)
Mar 26, 2019 10:37:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 95859 ms. Total solver calls (SAT/UNSAT): 5120(4993/127)
Mar 26, 2019 10:37:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 178 transitions.
Mar 26, 2019 10:37:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 2315 ms. Total solver calls (SAT/UNSAT): 647(0/647)
Mar 26, 2019 10:37:56 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 105722ms conformant to PINS in folder :/home/mcc/execution
Mar 26, 2019 10:56:11 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Mar 26, 2019 10:56:12 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 496 ms
Mar 26, 2019 10:56:12 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 195 ms
Mar 26, 2019 10:56:12 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Mar 26, 2019 10:56:12 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Mar 26, 2019 10:56:15 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t158,
Mar 26, 2019 10:56:15 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t152,t152,t152,
Mar 26, 2019 10:56:15 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t155,t152,
Mar 26, 2019 10:56:15 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t153,
Mar 26, 2019 10:56:15 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t156,
Mar 26, 2019 10:56:15 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t155,t155,t155,
Mar 26, 2019 10:56:15 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t160,
Mar 26, 2019 10:56:15 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t155,t152,
Mar 26, 2019 10:56:15 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 14 redundant transitions.
Mar 26, 2019 10:56:15 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 2438 ms
Mar 26, 2019 10:56:15 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in BusinessProcesses_PT_01_flat_flat_flat_mod_flat_sub0 :[i0.u44.t155, i0.u17.t156]
Mar 26, 2019 10:56:15 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in BusinessProcesses_PT_01_flat_flat_flat_mod_flat_sub1 :[i1.u42.t158, i1.u54.t152]
Mar 26, 2019 10:56:15 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in BusinessProcesses_PT_01_flat_flat_flat_mod_flat_sub1 :[i1.u54.t155, i1.u41.t160]
Mar 26, 2019 10:56:15 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in BusinessProcesses_PT_01_flat_flat_flat_mod_flat_sub0 :[i0.u18.t153, i0.u44.t152]
Mar 26, 2019 10:56:15 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in BusinessProcesses_PT_01_flat_flat_flat_mod_flat_sub0_sub0 :[i0.u18.t153, i0.u44.t152]
Mar 26, 2019 10:56:15 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in BusinessProcesses_PT_01_flat_flat_flat_mod_flat_sub0_sub0 :[i0.u44.t155, i0.u17.t156]
Mar 26, 2019 10:56:15 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in BusinessProcesses_PT_01_flat_flat_flat_mod_flat_sub0_sub0_sub0 :[i0.u18.t153, i0.u44.t152]
Mar 26, 2019 10:56:15 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in BusinessProcesses_PT_01_flat_flat_flat_mod_flat_sub0_sub0_sub0 :[i0.u44.t155, i0.u17.t156]
Mar 26, 2019 10:56:15 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in BusinessProcesses_PT_01_flat_flat_flat_mod_flat_sub0_sub0_sub0_sub0 :[i0.u18.t153, i0.u44.t152]
Mar 26, 2019 10:56:15 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in BusinessProcesses_PT_01_flat_flat_flat_mod_flat_sub0_sub0_sub0_sub0 :[i0.u44.t155, i0.u17.t156]
Mar 26, 2019 10:56:15 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in BusinessProcesses_PT_01_flat_flat_flat_mod_flat_sub0_sub0_sub0_sub0_sub1 :[i1.u44.t152, i1.u18.t153]
Mar 26, 2019 10:56:15 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in BusinessProcesses_PT_01_flat_flat_flat_mod_flat_sub0_sub0_sub0_sub0_sub1 :[i1.u44.t155, i1.u17.t156]
Mar 26, 2019 10:56:15 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 167 ms
Mar 26, 2019 10:56:15 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 2 ms
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 32 ms
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 27 ms
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t153,
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t158,
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t152,t152,t152,
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t155,t152,
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t155,t152,
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t160,
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t156,
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t155,t155,t155,
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 14 redundant transitions.
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 46 ms
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in BusinessProcesses_PT_01_flat_flat_flat_mod_flat_sub0 :[i0.u44.t155, i0.u17.t156]
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in BusinessProcesses_PT_01_flat_flat_flat_mod_flat_sub1 :[i1.u42.t158, i1.u54.t152]
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in BusinessProcesses_PT_01_flat_flat_flat_mod_flat_sub1 :[i1.u54.t155, i1.u41.t160]
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in BusinessProcesses_PT_01_flat_flat_flat_mod_flat_sub0 :[i0.u18.t153, i0.u44.t152]
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in BusinessProcesses_PT_01_flat_flat_flat_mod_flat_sub0_sub0 :[i0.u18.t153, i0.u44.t152]
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in BusinessProcesses_PT_01_flat_flat_flat_mod_flat_sub0_sub0 :[i0.u44.t155, i0.u17.t156]
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in BusinessProcesses_PT_01_flat_flat_flat_mod_flat_sub0_sub0_sub0 :[i0.u18.t153, i0.u44.t152]
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in BusinessProcesses_PT_01_flat_flat_flat_mod_flat_sub0_sub0_sub0 :[i0.u44.t155, i0.u17.t156]
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in BusinessProcesses_PT_01_flat_flat_flat_mod_flat_sub0_sub0_sub0_sub0 :[i0.u18.t153, i0.u44.t152]
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in BusinessProcesses_PT_01_flat_flat_flat_mod_flat_sub0_sub0_sub0_sub0 :[i0.u44.t155, i0.u17.t156]
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in BusinessProcesses_PT_01_flat_flat_flat_mod_flat_sub0_sub0_sub0_sub0_sub1 :[i1.u44.t152, i1.u18.t153]
Mar 26, 2019 11:16:16 PM fr.lip6.move.gal.instantiate.CompositeBuilder fuseSimilarLabels
INFO: Found fuseable labels in BusinessProcesses_PT_01_flat_flat_flat_mod_flat_sub0_sub0_sub0_sub0_sub1 :[i1.u44.t155, i1.u17.t156]
Mar 26, 2019 11:16:16 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 20 ms
Mar 26, 2019 11:16:16 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 0 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BusinessProcesses-PT-01"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstoolsm"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstoolsm"
echo " Input is BusinessProcesses-PT-01, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r189-csrt-155225080800681"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BusinessProcesses-PT-01.tgz
mv BusinessProcesses-PT-01 execution
cd execution
if [ "LTLCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;