Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2019-input.r188-smll-155225013900009.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2019-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.....................
=====================================================================
Generated by BenchKit 2-3817
Executing tool itstoolsm
Input is ARMCacheCoherence-PT-none, examination is ReachabilityFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r188-smll-155225013900009
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 14M
-rw-r--r-- 1 mcc users 3.7K Feb 9 05:48 CTLCardinality.txt
-rw-r--r-- 1 mcc users 21K Feb 9 05:48 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 5 01:59 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 5 01:59 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 112 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 350 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.3K Feb 4 22:50 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.3K Feb 4 22:50 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Feb 4 22:31 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.4K Feb 4 22:31 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Feb 1 23:27 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K Feb 1 23:27 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Jan 29 09:52 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K Jan 29 09:52 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 4 22:17 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 4 22:17 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 14M Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityFireability-00
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityFireability-01
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityFireability-02
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityFireability-03
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityFireability-04
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityFireability-05
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityFireability-06
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityFireability-07
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityFireability-08
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityFireability-09
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityFireability-10
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityFireability-11
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityFireability-12
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityFireability-13
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityFireability-14
FORMULA_NAME ARMCacheCoherence-PT-none-ReachabilityFireability-15

=== Now, execution of the tool begins

BK_START 1553550241046

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/pinvar, /home/mcc/execution/gspn], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Running greatSPN : CommandLine [args=[/home/mcc/BenchKit//greatspn//bin/RGMEDD2, /home/mcc/execution/gspn, -META, -varord-only], workingDir=/home/mcc/execution]
Run of greatSPN captured in /home/mcc/execution/outPut.txt
Using order generated by GreatSPN with heuristic : META
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityFireability.pnml.gal, -t, CGAL, -reachable-file, ReachabilityFireability.prop, --nowitness, --load-order, /home/mcc/execution/model.ord], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903251645/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityFireability.pnml.gal -t CGAL -reachable-file ReachabilityFireability.prop --nowitness --load-order /home/mcc/execution/model.ord
Successfully loaded order from file /home/mcc/execution/model.ord
Loading property file ReachabilityFireability.prop.
Read [reachable] property : ARMCacheCoherence-PT-none-ReachabilityFireability-00 with value :((((p3>=1)&&(p52>=1))&&(p67>=1))&&(p80>=1))
Read [invariant] property : ARMCacheCoherence-PT-none-ReachabilityFireability-01 with value :((((((((p4>=1)&&(p24>=1))&&(p39>=1))&&(p84>=1))||((((p3>=1)&&(p54>=1))&&(p67>=1))&&(p84>=1)))&&(!((((p1>=1)&&(p24>=1))&&(p37>=1))&&(p84>=1))))||(!(((p3>=1)&&(p67>=1))&&(p84>=1))))&&(!(((((p4>=1)&&(p24>=1))&&(p39>=1))&&(p80>=1))&&((((p5>=1)&&(p24>=1))&&(p37>=1))&&(p84>=1)))))
Read [reachable] property : ARMCacheCoherence-PT-none-ReachabilityFireability-02 with value :(((!(((p5>=1)&&(p22>=1))&&(p84>=1)))&&((((((p1>=1)&&(p52>=1))&&(p69>=1))&&(p84>=1))&&(((p3>=1)&&(p22>=1))&&(p84>=1)))||(((p3>=1)&&(p67>=1))&&(p84>=1))))&&(((((p2>=1)&&(p52>=1))&&(p69>=1))&&(p80>=1))&&((!((((p2>=1)&&(p54>=1))&&(p69>=1))&&(p84>=1)))&&(!((((p5>=1)&&(p24>=1))&&(p39>=1))&&(p84>=1))))))
Read [reachable] property : ARMCacheCoherence-PT-none-ReachabilityFireability-03 with value :((((((p5>=1)&&(p54>=1))&&(p69>=1))&&(p80>=1))&&((((p3>=1)&&(p24>=1))&&(p39>=1))&&(p80>=1)))&&((((((p3>=1)&&(p22>=1))&&(p37>=1))&&(p84>=1))&&((((p2>=1)&&(p52>=1))&&(p69>=1))&&(p80>=1)))||(!((((p4>=1)&&(p24>=1))&&(p37>=1))&&(p80>=1)))))
Read [reachable] property : ARMCacheCoherence-PT-none-ReachabilityFireability-04 with value :((!((!(((p3>=1)&&(p52>=1))&&(p80>=1)))||(!((((p5>=1)&&(p22>=1))&&(p37>=1))&&(p80>=1)))))||(((((((p4>=1)&&(p52>=1))&&(p67>=1))&&(p80>=1))&&((((p4>=1)&&(p54>=1))&&(p67>=1))&&(p84>=1)))&&((((p1>=1)&&(p54>=1))&&(p69>=1))&&(p84>=1)))||((((((p4>=1)&&(p24>=1))&&(p37>=1))&&(p84>=1))&&((((p4>=1)&&(p54>=1))&&(p67>=1))&&(p84>=1)))&&(((((p5>=1)&&(p52>=1))&&(p69>=1))&&(p84>=1))&&((((p4>=1)&&(p22>=1))&&(p39>=1))&&(p84>=1))))))
Read [reachable] property : ARMCacheCoherence-PT-none-ReachabilityFireability-05 with value :(((((p5>=1)&&(p22>=1))&&(p37>=1))&&(p80>=1))&&(((p5>=1)&&(p52>=1))&&(p79>=1)))
Read [reachable] property : ARMCacheCoherence-PT-none-ReachabilityFireability-06 with value :((((p3>=1)&&(p22>=1))&&(p39>=1))&&(p80>=1))
Read [reachable] property : ARMCacheCoherence-PT-none-ReachabilityFireability-07 with value :((((p3>=1)&&(p54>=1))&&(p67>=1))&&(p80>=1))
Read [reachable] property : ARMCacheCoherence-PT-none-ReachabilityFireability-08 with value :((((((((p4>=1)&&(p24>=1))&&(p39>=1))&&(p84>=1))&&((((p2>=1)&&(p24>=1))&&(p39>=1))&&(p84>=1)))&&((((p4>=1)&&(p54>=1))&&(p67>=1))&&(p80>=1)))||(((p3>=1)&&(p22>=1))&&(p79>=1)))&&(!(((((p4>=1)&&(p22>=1))&&(p76>=1))&&(((p3>=1)&&(p22>=1))&&(p80>=1)))||((((p4>=1)&&(p54>=1))&&(p69>=1))&&(p80>=1)))))
Read [reachable] property : ARMCacheCoherence-PT-none-ReachabilityFireability-09 with value :((((((p1>=1)&&(p52>=1))&&(p69>=1))&&(p84>=1))||((((p3>=1)&&(p54>=1))&&(p69>=1))&&(p84>=1)))&&(((((p4>=1)&&(p54>=1))&&(p69>=1))&&(p84>=1))&&((((p5>=1)&&(p24>=1))&&(p37>=1))&&(p84>=1))))
Read [invariant] property : ARMCacheCoherence-PT-none-ReachabilityFireability-10 with value :(((!((((p5>=1)&&(p54>=1))&&(p67>=1))&&(p84>=1)))||((!(((p3>=1)&&(p37>=1))&&(p79>=1)))&&(!((((p4>=1)&&(p24>=1))&&(p39>=1))&&(p80>=1)))))||(((((((p3>=1)&&(p54>=1))&&(p67>=1))&&(p80>=1))&&((((p4>=1)&&(p54>=1))&&(p67>=1))&&(p80>=1)))||(!(((p3>=1)&&(p67>=1))&&(p80>=1))))||((!((((p3>=1)&&(p22>=1))&&(p37>=1))&&(p84>=1)))&&(!((((p4>=1)&&(p22>=1))&&(p37>=1))&&(p80>=1))))))
Read [reachable] property : ARMCacheCoherence-PT-none-ReachabilityFireability-11 with value :(((p3>=1)&&(p37>=1))&&(p80>=1))
Read [reachable] property : ARMCacheCoherence-PT-none-ReachabilityFireability-12 with value :(((((((p5>=1)&&(p67>=1))&&(p84>=1))&&((((p5>=1)&&(p24>=1))&&(p39>=1))&&(p84>=1)))&&(((((p5>=1)&&(p24>=1))&&(p37>=1))&&(p84>=1))&&((((p2>=1)&&(p22>=1))&&(p39>=1))&&(p84>=1))))&&(!((((p2>=1)&&(p52>=1))&&(p83>=1))||((((p5>=1)&&(p24>=1))&&(p37>=1))&&(p84>=1)))))&&(((((p4>=1)&&(p24>=1))&&(p37>=1))&&(p84>=1))&&(((p3>=1)&&(p52>=1))&&(p84>=1))))
Read [reachable] property : ARMCacheCoherence-PT-none-ReachabilityFireability-13 with value :(((((p5>=1)&&(p24>=1))&&(p37>=1))&&(p84>=1))&&(((((p3>=1)&&(p52>=1))&&(p75>=1))&&((((p3>=1)&&(p67>=1))&&(p80>=1))&&((((p5>=1)&&(p54>=1))&&(p69>=1))&&(p84>=1))))&&(!(((((p5>=1)&&(p54>=1))&&(p69>=1))&&(p84>=1))&&((((p4>=1)&&(p54>=1))&&(p67>=1))&&(p84>=1))))))
Read [invariant] property : ARMCacheCoherence-PT-none-ReachabilityFireability-14 with value :(((((p5>=1)&&(p54>=1))&&(p67>=1))&&(p80>=1))||(!(((((p5>=1)&&(p37>=1))&&(p75>=1))&&(((p3>=1)&&(p22>=1))&&(p84>=1)))&&((((p2>=1)&&(p54>=1))&&(p69>=1))&&(p80>=1)))))
Read [reachable] property : ARMCacheCoherence-PT-none-ReachabilityFireability-15 with value :((((p3>=1)&&(p52>=1))&&(p79>=1))||(((p2>=1)&&(p22>=1))&&(p80>=1)))
FORMULA ARMCacheCoherence-PT-none-ReachabilityFireability-12 FALSE TECHNIQUES SAT_SMT TAUTOLOGY
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 500
// Phase 1: matrix 500 rows 87 cols
invariant :p0 + p83 + p84 + p85 + p86 = 1
invariant :p0 + p1 + p2 + p3 + p4 + p5 = 1
invariant :p0 + p75 + p76 + p77 + p78 = 1
invariant :p0 + p10 + p11 + p12 + p13 + p14 + p15 + p16 + p17 + p18 + p19 + p20 + p21 + p22 + p23 + p24 = 1
invariant :p0 + p8 + p9 = 1
invariant :p0 + p25 + p26 + p27 + p28 + p29 + p30 + p31 + p32 + p33 + p34 + p35 + p36 + p37 + p38 + p39 = 1
invariant :p0 + p55 + p56 + p57 + p58 + p59 + p60 + p61 + p62 + p63 + p64 + p65 + p66 + p67 + p68 + p69 = 1
invariant :p0 + p79 + p80 + p81 + p82 = 1
invariant :p0 + p6 + p7 = 1
invariant :p0 + p40 + p41 + p42 + p43 + p44 + p45 + p46 + p47 + p48 + p49 + p50 + p51 + p52 + p53 + p54 = 1
invariant :p0 + p70 + p71 = 1
invariant :p0 + p72 + p73 + p74 = 1
FORMULA ARMCacheCoherence-PT-none-ReachabilityFireability-02 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA ARMCacheCoherence-PT-none-ReachabilityFireability-03 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA ARMCacheCoherence-PT-none-ReachabilityFireability-04 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA ARMCacheCoherence-PT-none-ReachabilityFireability-05 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA ARMCacheCoherence-PT-none-ReachabilityFireability-09 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA ARMCacheCoherence-PT-none-ReachabilityFireability-10 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA ARMCacheCoherence-PT-none-ReachabilityFireability-13 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA ARMCacheCoherence-PT-none-ReachabilityFireability-14 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
petri,3.20568e+08,170.445,2277572,2,10712,5,7.0695e+06,6,0,1590,8.11146e+06,0
Total reachable state count : 320567601

Verifying 16 reachability properties.
Reachability property ARMCacheCoherence-PT-none-ReachabilityFireability-00 is true.
FORMULA ARMCacheCoherence-PT-none-ReachabilityFireability-00 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ARMCacheCoherence-PT-none-ReachabilityFireability-00,67200,170.45,2277604,2,1349,6,7.0695e+06,7,0,1598,8.11146e+06,0
Invariant property ARMCacheCoherence-PT-none-ReachabilityFireability-01 does not hold.
FORMULA ARMCacheCoherence-PT-none-ReachabilityFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ARMCacheCoherence-PT-none-ReachabilityFireability-01,940800,170.457,2277668,2,2414,7,7.0695e+06,8,0,1636,8.11146e+06,0
Reachability property ARMCacheCoherence-PT-none-ReachabilityFireability-02 does not hold.
No reachable states exhibit your property : ARMCacheCoherence-PT-none-ReachabilityFireability-02

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ARMCacheCoherence-PT-none-ReachabilityFireability-02,0,170.462,2277668,1,0,7,7.0695e+06,9,0,1663,8.11146e+06,0
Reachability property ARMCacheCoherence-PT-none-ReachabilityFireability-03 does not hold.
No reachable states exhibit your property : ARMCacheCoherence-PT-none-ReachabilityFireability-03

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ARMCacheCoherence-PT-none-ReachabilityFireability-03,0,170.466,2277668,1,0,7,7.0695e+06,10,0,1683,8.11146e+06,0
Reachability property ARMCacheCoherence-PT-none-ReachabilityFireability-04 does not hold.
No reachable states exhibit your property : ARMCacheCoherence-PT-none-ReachabilityFireability-04

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ARMCacheCoherence-PT-none-ReachabilityFireability-04,0,170.471,2277668,1,0,7,7.0695e+06,11,0,1703,8.11146e+06,0
Reachability property ARMCacheCoherence-PT-none-ReachabilityFireability-05 does not hold.
No reachable states exhibit your property : ARMCacheCoherence-PT-none-ReachabilityFireability-05

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ARMCacheCoherence-PT-none-ReachabilityFireability-05,0,170.473,2277668,1,0,7,7.0695e+06,12,0,1709,8.11146e+06,0
Reachability property ARMCacheCoherence-PT-none-ReachabilityFireability-06 is true.
FORMULA ARMCacheCoherence-PT-none-ReachabilityFireability-06 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ARMCacheCoherence-PT-none-ReachabilityFireability-06,72000,170.474,2277668,2,1415,8,7.0695e+06,13,0,1712,8.11146e+06,0
Reachability property ARMCacheCoherence-PT-none-ReachabilityFireability-07 is true.
FORMULA ARMCacheCoherence-PT-none-ReachabilityFireability-07 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ARMCacheCoherence-PT-none-ReachabilityFireability-07,67200,170.477,2277668,2,1349,9,7.0695e+06,14,0,1715,8.11146e+06,0
Reachability property ARMCacheCoherence-PT-none-ReachabilityFireability-08 is true.
FORMULA ARMCacheCoherence-PT-none-ReachabilityFireability-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ARMCacheCoherence-PT-none-ReachabilityFireability-08,1.08e+06,170.484,2277668,2,2657,10,7.0695e+06,15,0,1736,8.11146e+06,0
Reachability property ARMCacheCoherence-PT-none-ReachabilityFireability-09 does not hold.
No reachable states exhibit your property : ARMCacheCoherence-PT-none-ReachabilityFireability-09

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ARMCacheCoherence-PT-none-ReachabilityFireability-09,0,170.486,2277668,1,0,10,7.0695e+06,16,0,1746,8.11146e+06,0
Invariant property ARMCacheCoherence-PT-none-ReachabilityFireability-10 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ARMCacheCoherence-PT-none-ReachabilityFireability-10,0,170.49,2277668,1,0,10,7.0695e+06,17,0,1765,8.11146e+06,0
Reachability property ARMCacheCoherence-PT-none-ReachabilityFireability-11 is true.
FORMULA ARMCacheCoherence-PT-none-ReachabilityFireability-11 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ARMCacheCoherence-PT-none-ReachabilityFireability-11,1.008e+06,170.492,2277668,2,2467,11,7.0695e+06,18,0,1767,8.11146e+06,0
Reachability property ARMCacheCoherence-PT-none-ReachabilityFireability-12 does not hold.
No reachable states exhibit your property : ARMCacheCoherence-PT-none-ReachabilityFireability-12

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ARMCacheCoherence-PT-none-ReachabilityFireability-12,0,170.496,2277668,1,0,11,7.0695e+06,19,0,1782,8.11146e+06,0
Reachability property ARMCacheCoherence-PT-none-ReachabilityFireability-13 does not hold.
No reachable states exhibit your property : ARMCacheCoherence-PT-none-ReachabilityFireability-13

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ARMCacheCoherence-PT-none-ReachabilityFireability-13,0,170.498,2277668,1,0,11,7.0695e+06,20,0,1791,8.11146e+06,0
Invariant property ARMCacheCoherence-PT-none-ReachabilityFireability-14 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ARMCacheCoherence-PT-none-ReachabilityFireability-14,0,170.5,2277668,1,0,11,7.0695e+06,21,0,1800,8.11146e+06,0
Reachability property ARMCacheCoherence-PT-none-ReachabilityFireability-15 is true.
FORMULA ARMCacheCoherence-PT-none-ReachabilityFireability-15 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING USE_NUPN

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ARMCacheCoherence-PT-none-ReachabilityFireability-15,1.008e+06,170.503,2277668,2,2535,12,7.0695e+06,22,0,1803,8.11146e+06,0
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1553550454572

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -greatspnpath /home/mcc/BenchKit//greatspn/ -order META -manyOrder -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 25, 2019 9:44:04 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -greatspnpath, /home/mcc/BenchKit//greatspn/, -order, META, -manyOrder, -smt]
Mar 25, 2019 9:44:04 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 25, 2019 9:44:05 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 1461 ms
Mar 25, 2019 9:44:05 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 87 places.
Mar 25, 2019 9:44:07 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 33676 transitions.
Mar 25, 2019 9:44:07 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Mar 25, 2019 9:44:16 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 8673 ms
Mar 25, 2019 9:44:26 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 33676 transitions.
Mar 25, 2019 9:44:26 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Too many transitions (33676) to apply POR reductions. Disabling POR matrices.
Mar 25, 2019 9:44:29 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 11456 ms
Mar 25, 2019 9:44:31 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 10652ms conformant to PINS in folder :/home/mcc/execution
Mar 25, 2019 9:44:31 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 8225 ms
Mar 25, 2019 9:44:33 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 33676 transitions.
Mar 25, 2019 9:44:36 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 33676 transitions.
Mar 25, 2019 9:44:37 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 87 places.
Mar 25, 2019 9:44:37 PM fr.lip6.move.gal.application.StructuralToGreatSPN handlePage
INFO: Transformed 33676 transitions.
Mar 25, 2019 9:44:41 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityFireability.pnml.gal : 306 ms
Mar 25, 2019 9:44:41 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityFireability.prop : 7 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Result for false tautology is UNSAT, reachability predicate is unrealizable ARMCacheCoherence-PT-none-ReachabilityFireability-12
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 1 / 16 in 23870 ms.
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-00(UNSAT) depth K=0 took 41 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-01(UNSAT) depth K=0 took 21 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-02(UNSAT) depth K=0 took 8 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-03(UNSAT) depth K=0 took 13 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-04(UNSAT) depth K=0 took 16 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-05(UNSAT) depth K=0 took 7 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-06(UNSAT) depth K=0 took 12 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-07(UNSAT) depth K=0 took 8 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-08(UNSAT) depth K=0 took 11 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-09(UNSAT) depth K=0 took 8 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-10(UNSAT) depth K=0 took 15 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-11(UNSAT) depth K=0 took 7 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-13(UNSAT) depth K=0 took 16 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-14(UNSAT) depth K=0 took 8 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-15(UNSAT) depth K=0 took 11 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-00(UNSAT) depth K=1 took 7 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-01(UNSAT) depth K=1 took 11 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-02(UNSAT) depth K=1 took 8 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-03(UNSAT) depth K=1 took 14 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-04(UNSAT) depth K=1 took 9 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-05(UNSAT) depth K=1 took 14 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-06(UNSAT) depth K=1 took 6 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-07(UNSAT) depth K=1 took 8 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-08(UNSAT) depth K=1 took 8 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-09(UNSAT) depth K=1 took 11 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-10(UNSAT) depth K=1 took 7 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-11(UNSAT) depth K=1 took 8 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-13(UNSAT) depth K=1 took 10 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-14(UNSAT) depth K=1 took 13 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-15(UNSAT) depth K=1 took 7 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-00(UNSAT) depth K=2 took 43 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-01(UNSAT) depth K=2 took 26 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-02(UNSAT) depth K=2 took 9 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-03(UNSAT) depth K=2 took 13 ms
Mar 25, 2019 9:44:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-04(UNSAT) depth K=2 took 17 ms
Mar 25, 2019 9:44:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-05(UNSAT) depth K=2 took 231 ms
Mar 25, 2019 9:44:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-06(UNSAT) depth K=2 took 6 ms
Mar 25, 2019 9:44:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-07(UNSAT) depth K=2 took 5 ms
Mar 25, 2019 9:44:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-08(UNSAT) depth K=2 took 13 ms
Mar 25, 2019 9:44:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-09(UNSAT) depth K=2 took 12 ms
Mar 25, 2019 9:44:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-10(UNSAT) depth K=2 took 18 ms
Mar 25, 2019 9:44:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-11(UNSAT) depth K=2 took 6 ms
Mar 25, 2019 9:44:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-13(UNSAT) depth K=2 took 9 ms
Mar 25, 2019 9:44:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-14(UNSAT) depth K=2 took 10 ms
Mar 25, 2019 9:44:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-15(UNSAT) depth K=2 took 10 ms
Mar 25, 2019 9:44:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-00(UNSAT) depth K=3 took 928 ms
Mar 25, 2019 9:44:56 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-01(UNSAT) depth K=3 took 849 ms
Mar 25, 2019 9:44:56 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 33676 transitions.
Mar 25, 2019 9:44:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-02(UNSAT) depth K=3 took 1419 ms
Mar 25, 2019 9:44:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-03(UNSAT) depth K=3 took 1376 ms
Mar 25, 2019 9:45:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-04(UNSAT) depth K=3 took 2110 ms
Mar 25, 2019 9:45:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-05(UNSAT) depth K=3 took 837 ms
Mar 25, 2019 9:45:02 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-06(UNSAT) depth K=3 took 993 ms
Mar 25, 2019 9:45:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-07(UNSAT) depth K=3 took 782 ms
Mar 25, 2019 9:45:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-08(UNSAT) depth K=3 took 889 ms
Mar 25, 2019 9:45:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-09(UNSAT) depth K=3 took 751 ms
Mar 25, 2019 9:45:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-10(UNSAT) depth K=3 took 1042 ms
Mar 25, 2019 9:45:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-11(UNSAT) depth K=3 took 722 ms
Mar 25, 2019 9:45:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-13(UNSAT) depth K=3 took 1179 ms
Mar 25, 2019 9:45:09 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 12 place invariants in 335 ms
Mar 25, 2019 9:45:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-14(UNSAT) depth K=3 took 2281 ms
Mar 25, 2019 9:45:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-15(UNSAT) depth K=3 took 1516 ms
Mar 25, 2019 9:45:14 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 87 variables to be positive in 5764 ms
Mar 25, 2019 9:45:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesARMCacheCoherence-PT-none-ReachabilityFireability-00
Mar 25, 2019 9:45:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-00(SAT) depth K=0 took 418 ms
Mar 25, 2019 9:45:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesARMCacheCoherence-PT-none-ReachabilityFireability-01
Mar 25, 2019 9:45:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-01(SAT) depth K=0 took 803 ms
Mar 25, 2019 9:45:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate ARMCacheCoherence-PT-none-ReachabilityFireability-02
Mar 25, 2019 9:45:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for ARMCacheCoherence-PT-none-ReachabilityFireability-02
Mar 25, 2019 9:45:16 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-02(FALSE) depth K=0 took 988 ms
Mar 25, 2019 9:45:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate ARMCacheCoherence-PT-none-ReachabilityFireability-03
Mar 25, 2019 9:45:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for ARMCacheCoherence-PT-none-ReachabilityFireability-03
Mar 25, 2019 9:45:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-03(FALSE) depth K=0 took 855 ms
Mar 25, 2019 9:45:19 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate ARMCacheCoherence-PT-none-ReachabilityFireability-04
Mar 25, 2019 9:45:19 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for ARMCacheCoherence-PT-none-ReachabilityFireability-04
Mar 25, 2019 9:45:19 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-04(FALSE) depth K=0 took 2146 ms
Mar 25, 2019 9:45:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-00(UNSAT) depth K=4 took 8297 ms
Mar 25, 2019 9:45:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate ARMCacheCoherence-PT-none-ReachabilityFireability-05
Mar 25, 2019 9:45:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for ARMCacheCoherence-PT-none-ReachabilityFireability-05
Mar 25, 2019 9:45:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-05(FALSE) depth K=0 took 1017 ms
Mar 25, 2019 9:45:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesARMCacheCoherence-PT-none-ReachabilityFireability-06
Mar 25, 2019 9:45:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-06(SAT) depth K=0 took 257 ms
Mar 25, 2019 9:45:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesARMCacheCoherence-PT-none-ReachabilityFireability-07
Mar 25, 2019 9:45:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-07(SAT) depth K=0 took 248 ms
Mar 25, 2019 9:45:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesARMCacheCoherence-PT-none-ReachabilityFireability-08
Mar 25, 2019 9:45:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-08(SAT) depth K=0 took 239 ms
Mar 25, 2019 9:45:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate ARMCacheCoherence-PT-none-ReachabilityFireability-09
Mar 25, 2019 9:45:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for ARMCacheCoherence-PT-none-ReachabilityFireability-09
Mar 25, 2019 9:45:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-09(FALSE) depth K=0 took 942 ms
Mar 25, 2019 9:45:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant ARMCacheCoherence-PT-none-ReachabilityFireability-10
Mar 25, 2019 9:45:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for ARMCacheCoherence-PT-none-ReachabilityFireability-10
Mar 25, 2019 9:45:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-10(TRUE) depth K=0 took 1140 ms
Mar 25, 2019 9:45:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesARMCacheCoherence-PT-none-ReachabilityFireability-11
Mar 25, 2019 9:45:24 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-11(SAT) depth K=0 took 356 ms
Mar 25, 2019 9:45:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate ARMCacheCoherence-PT-none-ReachabilityFireability-13
Mar 25, 2019 9:45:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for ARMCacheCoherence-PT-none-ReachabilityFireability-13
Mar 25, 2019 9:45:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-13(FALSE) depth K=0 took 893 ms
Mar 25, 2019 9:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant ARMCacheCoherence-PT-none-ReachabilityFireability-14
Mar 25, 2019 9:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for ARMCacheCoherence-PT-none-ReachabilityFireability-14
Mar 25, 2019 9:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-14(TRUE) depth K=0 took 1105 ms
Mar 25, 2019 9:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesARMCacheCoherence-PT-none-ReachabilityFireability-15
Mar 25, 2019 9:45:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-15(SAT) depth K=0 took 302 ms
Mar 25, 2019 9:45:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-01(UNSAT) depth K=4 took 11855 ms
Mar 25, 2019 9:45:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesARMCacheCoherence-PT-none-ReachabilityFireability-00
Mar 25, 2019 9:45:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-00(SAT) depth K=1 took 8202 ms
Mar 25, 2019 9:45:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesARMCacheCoherence-PT-none-ReachabilityFireability-01
Mar 25, 2019 9:45:37 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-01(SAT) depth K=1 took 2461 ms
Mar 25, 2019 9:45:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesARMCacheCoherence-PT-none-ReachabilityFireability-06
Mar 25, 2019 9:45:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-06(SAT) depth K=1 took 904 ms
Mar 25, 2019 9:45:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-02(UNSAT) depth K=4 took 7735 ms
Mar 25, 2019 9:45:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesARMCacheCoherence-PT-none-ReachabilityFireability-07
Mar 25, 2019 9:45:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-07(SAT) depth K=1 took 5492 ms
Mar 25, 2019 9:45:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesARMCacheCoherence-PT-none-ReachabilityFireability-08
Mar 25, 2019 9:45:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-08(SAT) depth K=1 took 3169 ms
Mar 25, 2019 9:45:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-03(UNSAT) depth K=4 took 12128 ms
Mar 25, 2019 9:45:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesARMCacheCoherence-PT-none-ReachabilityFireability-11
Mar 25, 2019 9:45:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-11(SAT) depth K=1 took 5599 ms
Mar 25, 2019 9:45:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesARMCacheCoherence-PT-none-ReachabilityFireability-15
Mar 25, 2019 9:45:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-15(SAT) depth K=1 took 1071 ms
Mar 25, 2019 9:46:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesARMCacheCoherence-PT-none-ReachabilityFireability-00
Mar 25, 2019 9:46:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-00(SAT) depth K=2 took 7330 ms
Mar 25, 2019 9:46:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-04(UNSAT) depth K=4 took 15697 ms
Mar 25, 2019 9:46:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-05(UNSAT) depth K=4 took 10162 ms
Mar 25, 2019 9:46:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesARMCacheCoherence-PT-none-ReachabilityFireability-01
Mar 25, 2019 9:46:22 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-01(SAT) depth K=2 took 21821 ms
Mar 25, 2019 9:46:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-06(UNSAT) depth K=4 took 9172 ms
Mar 25, 2019 9:46:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-07(UNSAT) depth K=4 took 6310 ms
Mar 25, 2019 9:46:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesARMCacheCoherence-PT-none-ReachabilityFireability-06
Mar 25, 2019 9:46:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-06(SAT) depth K=2 took 11271 ms
Mar 25, 2019 9:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesARMCacheCoherence-PT-none-ReachabilityFireability-07
Mar 25, 2019 9:46:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-07(SAT) depth K=2 took 10477 ms
Mar 25, 2019 9:46:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesARMCacheCoherence-PT-none-ReachabilityFireability-08
Mar 25, 2019 9:46:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-08(SAT) depth K=2 took 1784 ms
Mar 25, 2019 9:46:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-08(UNSAT) depth K=4 took 15198 ms
Mar 25, 2019 9:46:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesARMCacheCoherence-PT-none-ReachabilityFireability-11
Mar 25, 2019 9:46:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-11(SAT) depth K=2 took 2552 ms
Mar 25, 2019 9:46:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesARMCacheCoherence-PT-none-ReachabilityFireability-15
Mar 25, 2019 9:46:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-15(SAT) depth K=2 took 2787 ms
Mar 25, 2019 9:46:58 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-09(UNSAT) depth K=4 took 9673 ms
Mar 25, 2019 9:47:05 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-10(UNSAT) depth K=4 took 7545 ms
Mar 25, 2019 9:47:12 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-11(UNSAT) depth K=4 took 7117 ms
Mar 25, 2019 9:47:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ARMCacheCoherence-PT-none-ReachabilityFireability-13(UNSAT) depth K=4 took 10796 ms
Mar 25, 2019 9:47:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
Mar 25, 2019 9:47:33 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Mar 25, 2019 9:47:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying ARMCacheCoherence-PT-none-ReachabilityFireability-14 SMT depth 4
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
Mar 25, 2019 9:47:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 4
Mar 25, 2019 9:47:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 4
Mar 25, 2019 9:47:33 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Mar 25, 2019 9:47:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
WARNING: Unexpected error occurred while running SMT. Was verifying ARMCacheCoherence-PT-none-ReachabilityFireability-00 K-induction depth 3
Exception in thread "Thread-8" java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:336)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
... 3 more
Mar 25, 2019 9:47:33 PM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 9/ 16 properties. Interrupting other analysis methods.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ARMCacheCoherence-PT-none"
export BK_EXAMINATION="ReachabilityFireability"
export BK_TOOL="itstoolsm"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3817"
echo " Executing tool itstoolsm"
echo " Input is ARMCacheCoherence-PT-none, examination is ReachabilityFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r188-smll-155225013900009"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ARMCacheCoherence-PT-none.tgz
mv ARMCacheCoherence-PT-none execution
cd execution
if [ "ReachabilityFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "ReachabilityFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;