fond
Model Checking Contest 2019
9th edition, Prague, Czech Republic, April 7, 2019 (TOOLympics)
Execution of r186-csrt-155344542800098
Last Updated
Apr 15, 2019

About the Execution of 2018-Gold for FamilyReunion-COL-L12000M1200C600P600G300

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1265.800 3590316.00 3635760.00 210.00 ?????F?????????? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/local/x2003239/mcc2019-input.r186-csrt-155344542800098.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2019-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................
=====================================================================
Generated by BenchKit 2-3954
Executing tool win2018
Input is FamilyReunion-COL-L12000M1200C600P600G300, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r186-csrt-155344542800098
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.1M
-rw-r--r-- 1 mcc users 4.5K Mar 24 07:03 CTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Mar 24 07:03 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.4K Mar 24 06:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K Mar 24 06:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 2.6K Mar 24 06:50 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Mar 24 06:50 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Mar 24 06:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.9K Mar 24 06:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 24 00:18 NewModel
-rw-r--r-- 1 mcc users 4.5K Mar 24 06:38 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 23K Mar 24 06:38 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 132 Mar 24 06:27 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 370 Mar 24 06:27 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 3.3K Mar 24 06:29 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K Mar 24 06:29 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.0K Mar 24 06:46 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.0K Mar 24 06:46 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 24 00:18 equiv_pt

-rw-r--r-- 1 mcc users 24 Mar 24 00:18 instance
-rw-r--r-- 1 mcc users 5 Mar 24 00:18 iscolored
-rw-r--r-- 1 mcc users 930K Mar 24 00:18 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-00
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-01
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-02
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-03
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-04
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-05
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-06
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-07
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-08
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-09
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-10
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-11
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-12
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-13
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-14
FORMULA_NAME FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1553678355743

win2018
---> win2018 --- TAPAAL
Total timeout: 3590
Time left: 3590

*************************************
* TAPAAL verifying CTLFireability *
*************************************
/home/mcc/tmp
/home/mcc/tmp/tmp.i87IF8Pvoj
/home/mcc/tmp/tmp.3zmmVAn5Yg
Time left: 3590
---------------------------------------------------
Step -1: Stripping Colors
---------------------------------------------------
Verifying stripped models (16 in total)
Solution found by stripping colors (step -1) for query index 5



FORMULA FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING STRUCTURAL_REDUCTION QUERY_REDUCTION SAT_SMT LP_APPROX CPN_APPROX
Query index 0 was solved

Query is NOT satisfied.

Solved using CPN Approximation



Unable to decide if FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-14 is satisfied.

Query is MAYBE satisfied.
Time left: 3590
---------------------------------------------------
Step 0: Parallel Simplification
---------------------------------------------------
Doing parallel simplification (15 in total)
Total simplification timout is 718 -- reduction timeout is 299
/home/mcc/BenchKit/bin/verifypn -n -q 718 -l 29 -d 299 -z 4 -s OverApprox --write-simplified /home/mcc/tmp/tmp.i87IF8Pvoj --write-reduced /home/mcc/tmp/tmp.3zmmVAn5Yg -x 1,2,3,4,5,7,8,9,10,11,12,13,14,15,16 ./model.pnml ./CTLFireability.xml

Time left: -1
Out of time, terminating!

BK_STOP 1553681946059

--------------------
content from stderr:

Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-15
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-13
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-12
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-11
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-10
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-09
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-08
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-07
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-06
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-04
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-03
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-02
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-01
Warning: CPN OverApproximation is only available for Reachability queries without deadlock, negated fireability and UpperBounds, skipping FamilyReunion-COL-L12000M1200C600P600G300-CTLFireability-00

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="FamilyReunion-COL-L12000M1200C600P600G300"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="win2018"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool win2018"
echo " Input is FamilyReunion-COL-L12000M1200C600P600G300, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r186-csrt-155344542800098"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/FamilyReunion-COL-L12000M1200C600P600G300.tgz
mv FamilyReunion-COL-L12000M1200C600P600G300 execution
cd execution
if [ "CTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "CTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;