Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/local/x2003239/mcc2019-input.r184-csrt-155344537900259.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2019-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.....................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is NoC3x3-PT-2A, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r184-csrt-155344537900259
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 300K
-rw-r--r-- 1 mcc users 3.1K Mar 23 12:31 CTLCardinality.txt
-rw-r--r-- 1 mcc users 18K Mar 23 12:31 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Mar 23 12:17 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K Mar 23 12:17 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 23 10:10 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.7K Mar 23 10:10 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.5K Mar 23 12:13 LTLCardinality.txt
-rw-r--r-- 1 mcc users 13K Mar 23 12:13 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.7K Mar 23 12:13 LTLFireability.txt
-rw-r--r-- 1 mcc users 7.6K Mar 23 12:13 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 23 10:10 NewModel
-rw-r--r-- 1 mcc users 3.8K Mar 23 12:07 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 21K Mar 23 12:07 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 103 Mar 23 11:58 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 341 Mar 23 11:58 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 2.5K Mar 23 11:59 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 16K Mar 23 11:59 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Mar 23 12:13 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Mar 23 12:13 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 23 10:10 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 23 10:10 instance
-rw-r--r-- 1 mcc users 6 Mar 23 10:10 iscolored
-rw-r--r-- 1 mcc users 0 Mar 23 10:10 model-fix.log
-rw-r--r-- 1 mcc users 127K Mar 23 10:10 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME NoC3x3-PT-2A-LTLFireability-00
FORMULA_NAME NoC3x3-PT-2A-LTLFireability-01
FORMULA_NAME NoC3x3-PT-2A-LTLFireability-02
FORMULA_NAME NoC3x3-PT-2A-LTLFireability-03
FORMULA_NAME NoC3x3-PT-2A-LTLFireability-04
FORMULA_NAME NoC3x3-PT-2A-LTLFireability-05
FORMULA_NAME NoC3x3-PT-2A-LTLFireability-06
FORMULA_NAME NoC3x3-PT-2A-LTLFireability-07
FORMULA_NAME NoC3x3-PT-2A-LTLFireability-08
FORMULA_NAME NoC3x3-PT-2A-LTLFireability-09
FORMULA_NAME NoC3x3-PT-2A-LTLFireability-10
FORMULA_NAME NoC3x3-PT-2A-LTLFireability-11
FORMULA_NAME NoC3x3-PT-2A-LTLFireability-12
FORMULA_NAME NoC3x3-PT-2A-LTLFireability-13
FORMULA_NAME NoC3x3-PT-2A-LTLFireability-14
FORMULA_NAME NoC3x3-PT-2A-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1553563758399

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903171603/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903171603/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((false))
Formula 0 simplified : 1
built 119 ordering constraints for composite.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 377
// Phase 1: matrix 377 rows 361 cols
invariant :u53:p292 + -1'u60:p334 + -1'u60:p336 = 0
invariant :u31:p150 + -1'u34:p165 + -1'u34:p166 + -1'u34:p167 = 0
invariant :u48:p274 + -1'u50:p277 = 0
invariant :u40:p221 + -1'u43:p235 = 0
invariant :u50:p276 + u50:p277 + u50:p278 + u67:p0 = 1
invariant :u28:p123 + u28:p124 + u28:p125 + u28:p126 + u28:p127 + u67:p0 = 1
invariant :u8:p30 + -1'u13:p57 = 0
invariant :u19:p79 + u19:p80 + u19:p81 + u19:p82 + u67:p0 = 1
invariant :u22:p97 + -1'u25:p108 = 0
invariant :u62:p348 + -1'u66:p359 = 0
invariant :u27:p119 + u27:p120 + u27:p121 + u27:p122 + u67:p0 = 1
invariant :u32:p155 + u32:p156 + u32:p157 + u32:p158 + u32:p160 + u32:p162 + u34:p168 + u34:p170 + u34:p171 + u35:p174 + u35:p175 + -1'u38:p204 + -1'u38:p205 + -1'u38:p206 + -1'u38:p208 + -1'u38:p209 + -1'u38:p210 + -1'u38:p211 = 0
invariant :u46:p256 + u46:p257 + u46:p258 + u46:p259 + u46:p260 + u46:p261 + u46:p262 + u67:p0 = 1
invariant :u30:p137 + u30:p138 + u30:p140 + u30:p142 + u30:p144 + u34:p169 + u36:p185 + u36:p189 + u37:p192 + u37:p194 + u37:p197 + u37:p198 + u37:p199 + u38:p204 + u38:p205 + u67:p0 = 1
invariant :u35:p174 + u35:p175 + u35:p176 + u35:p177 + u35:p178 + u35:p179 + u35:p180 + u67:p0 = 1
invariant :u38:p203 + u38:p204 + u38:p205 + u38:p206 + u38:p207 + u38:p208 + u38:p209 + u38:p210 + u38:p211 + u67:p0 = 1
invariant :u47:p269 + u50:p277 + u50:p278 + u67:p0 = 1
invariant :u36:p181 + u36:p182 + u36:p183 + u36:p184 + u36:p185 + u36:p186 + u36:p187 + u36:p188 + u36:p189 + u36:p190 + u36:p191 + u67:p0 = 1
invariant :u3:p11 + u67:p0 = 1
invariant :u54:p293 + u54:p294 + u54:p296 + u54:p298 + u57:p312 + u57:p313 + u59:p326 + u59:p329 + -1'u60:p334 + -1'u60:p335 + -1'u60:p336 + -1'u60:p337 + -1'u60:p338 = 0
invariant :u63:p349 + u67:p0 = 1
invariant :u59:p321 + u59:p322 + u59:p323 + u59:p324 + u59:p325 + u59:p326 + u59:p327 + u59:p328 + u59:p329 + u59:p330 + u59:p331 + u67:p0 = 1
invariant :u12:p48 + u12:p49 + u12:p50 + u12:p51 + u12:p52 + u12:p53 + u12:p54 + u67:p0 = 1
invariant :u32:p163 + u38:p204 + u38:p205 + u38:p206 + u38:p208 + u38:p209 + u38:p210 + u38:p211 + u67:p0 = 1
invariant :u40:p223 + -1'u45:p248 + -1'u45:p249 + -1'u45:p250 + -1'u45:p251 + -1'u45:p252 = 0
invariant :u9:p39 + -1'u11:p45 = 0
invariant :u25:p108 + u25:p109 + u25:p110 + u25:p111 + u67:p0 = 1
invariant :u43:p234 + u43:p235 + u43:p236 + u43:p237 + u43:p238 + u43:p239 + u67:p0 = 1
invariant :u33:p164 + u67:p0 = 1
invariant :u29:p134 + -1'u37:p195 + -1'u37:p196 + -1'u37:p200 = 0
invariant :u54:p299 + u60:p334 + u60:p335 + u60:p336 + u60:p337 + u60:p338 + u67:p0 = 1
invariant :u2:p10 + -1'u6:p19 = 0
invariant :u22:p93 + u22:p94 + u22:p95 + u22:p96 + u22:p98 + u25:p108 + u28:p124 + u28:p126 + u67:p0 = 1
invariant :u47:p267 + -1'u51:p279 = 0
invariant :u29:p132 + -1'u36:p181 + -1'u36:p184 + -1'u36:p186 + -1'u36:p187 + -1'u36:p188 = 0
invariant :u10:p42 + u67:p0 = 1
invariant :u15:p69 + -1'u20:p84 = 0
invariant :u32:p161 + -1'u35:p174 + -1'u35:p175 = 0
invariant :u21:p86 + u21:p87 + u21:p89 + u21:p91 + u26:p112 + u26:p115 + u26:p116 + u27:p120 + u28:p125 + u67:p0 = 1
invariant :u32:p159 + -1'u34:p168 + -1'u34:p170 + -1'u34:p171 = 0
invariant :u64:p350 + u64:p351 + u64:p352 + u64:p353 + u67:p0 = 1
invariant :u23:p100 + u23:p101 + u23:p103 + u23:p105 + u25:p109 + u26:p113 + u26:p114 + -1'u28:p124 + -1'u28:p125 + -1'u28:p126 + -1'u28:p127 = 0
invariant :u31:p152 + -1'u35:p177 + -1'u35:p178 = 0
invariant :u11:p43 + u11:p44 + u11:p45 + u11:p46 + u11:p47 + u67:p0 = 1
invariant :u66:p358 + u66:p359 + u66:p360 + u67:p0 = 1
invariant :u9:p35 + u9:p36 + u9:p37 + u9:p38 + u9:p40 + u11:p45 + u14:p63 + u67:p0 = 1
invariant :u41:p232 + u46:p257 + u46:p258 + u46:p259 + u46:p261 + u46:p262 + u67:p0 = 1
invariant :u45:p246 + u45:p247 + u45:p248 + u45:p249 + u45:p250 + u45:p251 + u45:p252 + u45:p253 + u45:p254 + u45:p255 + u67:p0 = 1
invariant :u55:p308 + -1'u60:p335 + -1'u60:p337 = 0
invariant :u54:p295 + -1'u57:p312 + -1'u57:p313 = 0
invariant :u31:p146 + u31:p147 + u31:p148 + u31:p149 + u31:p151 + u31:p153 + u34:p165 + u34:p166 + u34:p167 + u35:p177 + u35:p178 + u38:p208 + u38:p210 + u67:p0 = 1
invariant :u61:p341 + -1'u65:p354 + -1'u65:p355 = 0
invariant :u23:p106 + u28:p124 + u28:p125 + u28:p126 + u28:p127 + u67:p0 = 1
invariant :u39:p216 + -1'u45:p246 + -1'u45:p247 + -1'u45:p253 = 0
invariant :u23:p102 + -1'u25:p109 = 0
invariant :u21:p90 + -1'u27:p120 = 0
invariant :u57:p310 + u57:p311 + u57:p312 + u57:p313 + u57:p314 + u57:p315 + u67:p0 = 1
invariant :u15:p67 + -1'u18:p76 = 0
invariant :u41:p230 + -1'u44:p240 + -1'u44:p241 = 0
invariant :u60:p332 + u60:p333 + u60:p334 + u60:p335 + u60:p336 + u60:p337 + u60:p338 + u67:p0 = 1
invariant :u20:p83 + u20:p84 + u20:p85 + u67:p0 = 1
invariant :u21:p92 + -1'u28:p125 = 0
invariant :u40:p225 + -1'u46:p257 + -1'u46:p258 = 0
invariant :u54:p297 + -1'u59:p326 + -1'u59:p329 = 0
invariant :u61:p343 + u66:p359 + u66:p360 + u67:p0 = 1
invariant :u29:p130 + -1'u35:p176 = 0
invariant :u47:p263 + u47:p264 + u47:p266 + u47:p268 + -1'u50:p277 + -1'u50:p278 + u51:p279 + u52:p282 = 0
invariant :u53:p286 + u53:p287 + u53:p289 + u53:p291 + u58:p316 + u59:p322 + u59:p323 + u59:p324 + u59:p325 + u59:p327 + u59:p328 + u60:p334 + u60:p336 + u67:p0 = 1
invariant :u17:p75 + u67:p0 = 1
invariant :u55:p304 + -1'u57:p310 + -1'u57:p311 = 0
invariant :u47:p265 + -1'u52:p282 = 0
invariant :u1:p5 + u6:p19 + u6:p20 + u67:p0 = 1
invariant :u30:p139 + -1'u34:p169 = 0
invariant :u39:p218 + -1'u46:p259 + -1'u46:p261 = 0
invariant :u52:p282 + u52:p283 + u52:p284 + u52:p285 + u67:p0 = 1
invariant :u53:p288 + -1'u58:p316 = 0
invariant :u53:p290 + -1'u59:p322 + -1'u59:p323 + -1'u59:p324 + -1'u59:p325 + -1'u59:p327 + -1'u59:p328 = 0
invariant :u41:p228 + -1'u43:p234 + -1'u43:p236 + -1'u43:p237 = 0
invariant :u30:p143 + -1'u37:p192 + -1'u37:p194 + -1'u37:p197 + -1'u37:p198 + -1'u37:p199 = 0
invariant :u41:p226 + u41:p227 + u41:p229 + u41:p231 + u43:p234 + u43:p236 + u43:p237 + u44:p240 + u44:p241 + -1'u46:p257 + -1'u46:p258 + -1'u46:p259 + -1'u46:p261 + -1'u46:p262 = 0
invariant :u48:p270 + u48:p271 + u48:p272 + u48:p273 + u50:p277 + u67:p0 = 1
invariant :u15:p65 + u15:p66 + u15:p68 + u18:p76 + u20:p84 + u67:p0 = 1
invariant :u16:p72 + -1'u19:p79 + -1'u19:p80 = 0
invariant :u1:p1 + u1:p2 + u1:p3 + u1:p4 + -1'u6:p19 + -1'u6:p20 = 0
invariant :u22:p99 + -1'u28:p124 + -1'u28:p126 = 0
invariant :u30:p145 + -1'u38:p204 + -1'u38:p205 = 0
invariant :u8:p28 + u8:p29 + u8:p31 + u8:p33 + u12:p49 + u12:p50 + u12:p51 + u12:p52 + u13:p57 + u14:p61 + u67:p0 = 1
invariant :u8:p32 + -1'u12:p49 + -1'u12:p50 + -1'u12:p51 + -1'u12:p52 = 0
invariant :u55:p306 + -1'u58:p317 + -1'u58:p318 = 0
invariant :u2:p6 + u2:p7 + u2:p8 + u2:p9 + u6:p19 + u67:p0 = 1
invariant :u4:p12 + u4:p13 + u4:p14 + u67:p0 = 1
invariant :u39:p214 + -1'u44:p242 + -1'u44:p243 = 0
invariant :u51:p279 + u51:p280 + u51:p281 + u67:p0 = 1
invariant :u14:p60 + u14:p61 + u14:p62 + u14:p63 + u14:p64 + u67:p0 = 1
invariant :u24:p107 + u67:p0 = 1
invariant :u23:p104 + -1'u26:p113 + -1'u26:p114 = 0
invariant :u61:p339 + u61:p340 + u61:p342 + u65:p354 + u65:p355 + -1'u66:p359 + -1'u66:p360 = 0
invariant :u40:p219 + u40:p220 + u40:p222 + u40:p224 + u43:p235 + u45:p248 + u45:p249 + u45:p250 + u45:p251 + u45:p252 + u46:p257 + u46:p258 + u67:p0 = 1
invariant :u55:p300 + u55:p301 + u55:p302 + u55:p303 + u55:p305 + u55:p307 + u57:p310 + u57:p311 + u58:p317 + u58:p318 + u60:p335 + u60:p337 + u67:p0 = 1
invariant :u26:p112 + u26:p113 + u26:p114 + u26:p115 + u26:p116 + u26:p117 + u26:p118 + u67:p0 = 1
invariant :u37:p192 + u37:p193 + u37:p194 + u37:p195 + u37:p196 + u37:p197 + u37:p198 + u37:p199 + u37:p200 + u37:p201 + u37:p202 + u67:p0 = 1
invariant :u9:p41 + -1'u14:p63 = 0
invariant :u7:p21 + u7:p22 + u7:p23 + u7:p24 + u7:p26 + u11:p43 + u11:p44 + -1'u14:p61 + -1'u14:p63 + -1'u14:p64 = 0
invariant :u16:p74 + u20:p84 + u20:p85 + u67:p0 = 1
invariant :u31:p154 + -1'u38:p208 + -1'u38:p210 = 0
invariant :u16:p70 + u16:p71 + u16:p73 + u19:p79 + u19:p80 + -1'u20:p84 + -1'u20:p85 = 0
invariant :u58:p316 + u58:p317 + u58:p318 + u58:p319 + u58:p320 + u67:p0 = 1
invariant :u5:p15 + u5:p16 + u5:p17 + u67:p0 = 1
invariant :u8:p34 + -1'u14:p61 = 0
invariant :u30:p141 + -1'u36:p185 + -1'u36:p189 = 0
invariant :u29:p128 + u29:p129 + u29:p131 + u29:p133 + u29:p135 + u35:p176 + u36:p181 + u36:p184 + u36:p186 + u36:p187 + u36:p188 + u37:p195 + u37:p196 + u37:p200 + u38:p206 + u38:p209 + u67:p0 = 1
invariant :u62:p346 + -1'u64:p350 + -1'u64:p351 = 0
invariant :u62:p344 + u62:p345 + u62:p347 + u64:p350 + u64:p351 + u66:p359 + u67:p0 = 1
invariant :u7:p27 + u14:p61 + u14:p63 + u14:p64 + u67:p0 = 1
invariant :u29:p136 + -1'u38:p206 + -1'u38:p209 = 0
invariant :u56:p309 + u67:p0 = 1
invariant :u6:p18 + u6:p19 + u6:p20 + u67:p0 = 1
invariant :u42:p233 + u67:p0 = 1
invariant :u13:p55 + u13:p56 + u13:p57 + u13:p58 + u13:p59 + u67:p0 = 1
invariant :u39:p212 + u39:p213 + u39:p215 + u39:p217 + u44:p242 + u44:p243 + u45:p246 + u45:p247 + u45:p253 + u46:p259 + u46:p261 + u67:p0 = 1
invariant :u7:p25 + -1'u11:p43 + -1'u11:p44 = 0
invariant :u49:p275 + u67:p0 = 1
invariant :u18:p76 + u18:p77 + u18:p78 + u67:p0 = 1
invariant :u65:p354 + u65:p355 + u65:p356 + u65:p357 + u67:p0 = 1
invariant :u44:p240 + u44:p241 + u44:p242 + u44:p243 + u44:p244 + u44:p245 + u67:p0 = 1
invariant :u21:p88 + -1'u26:p112 + -1'u26:p115 + -1'u26:p116 = 0
invariant :u34:p165 + u34:p166 + u34:p167 + u34:p168 + u34:p169 + u34:p170 + u34:p171 + u34:p172 + u34:p173 + u67:p0 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 7727 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 183 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 5048 ms.
FORMULA NoC3x3-PT-2A-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4388 ms.
FORMULA NoC3x3-PT-2A-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4018 ms.
FORMULA NoC3x3-PT-2A-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, []((((LTLAP0==true))U((LTLAP1==true)))U(X(<>((LTLAP2==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 1364 ms.
FORMULA NoC3x3-PT-2A-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3771 ms.
FORMULA NoC3x3-PT-2A-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, []([](X((LTLAP3==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4532 ms.
FORMULA NoC3x3-PT-2A-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>((LTLAP4==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4030 ms.
FORMULA NoC3x3-PT-2A-LTLFireability-06 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (<>(X([]((LTLAP5==true)))))U(<>((LTLAP6==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 903 ms.
FORMULA NoC3x3-PT-2A-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](<>([](X(<>((LTLAP7==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2955 ms.
FORMULA NoC3x3-PT-2A-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, [](((LTLAP8==true))U(<>([]((LTLAP9==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4418 ms.
FORMULA NoC3x3-PT-2A-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(<>((LTLAP10==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 987 ms.
FORMULA NoC3x3-PT-2A-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []((LTLAP11==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4484 ms.
FORMULA NoC3x3-PT-2A-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, false, --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 4241 ms.
FORMULA NoC3x3-PT-2A-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>(((LTLAP12==true))U(((LTLAP13==true))U((LTLAP14==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 3867 ms.
FORMULA NoC3x3-PT-2A-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X([](X(<>(<>((LTLAP15==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 2021 ms.
FORMULA NoC3x3-PT-2A-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(((LTLAP16==true))U(X([]((LTLAP17==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 898 ms.
FORMULA NoC3x3-PT-2A-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1553563933211

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 26, 2019 1:29:21 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 26, 2019 1:29:21 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 26, 2019 1:29:21 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 108 ms
Mar 26, 2019 1:29:21 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 361 places.
Mar 26, 2019 1:29:22 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 428 transitions.
Mar 26, 2019 1:29:22 AM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Found NUPN structural information;
Mar 26, 2019 1:29:22 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 44 ms
Mar 26, 2019 1:29:22 AM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Mar 26, 2019 1:29:22 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 230 ms
Mar 26, 2019 1:29:22 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 107 ms
Mar 26, 2019 1:29:22 AM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Mar 26, 2019 1:29:22 AM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t303,t303,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t43,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t204,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 4 events :t187,t188,t188,t187,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t246,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 4 events :t243,t243,t234,t234,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t35,t34,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 6 events :t392,t391,t61,t60,t52,t51,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 10 events :t360,t359,t360,t359,t360,t359,t359,t360,t87,t86,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t174,t174,t174,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t398,t399,t399,t398,t398,t399,t399,t398,t398,t399,t50,t49,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t420,t420,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 8 events :t358,t357,t358,t357,t101,t100,t91,t90,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 6 events :t299,t299,t299,t221,t221,t221,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t253,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t345,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t197,t197,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 8 events :t308,t307,t157,t156,t157,t156,t123,t122,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 12 events :t322,t323,t322,t323,t323,t322,t322,t323,t145,t146,t115,t114,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t67,t67,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 4 events :t281,t281,t249,t249,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t418,t412,t412,t412,t412,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 9 events :t270,t269,t268,t267,t266,t259,t258,t211,t210,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t190,t189,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 6 events :t379,t379,t334,t334,t334,t334,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t105,t105,t105,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 5 events :t373,t373,t294,t294,t294,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t181,t180,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t278,t277,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t233,t233,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t38,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t382,t382,t382,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t205,t205,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 7 events :t271,t271,t271,t266,t266,t266,t208,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 6 events :t225,t226,t226,t225,t226,t225,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t76,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t342,t342,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t39,t39,t39,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 10 events :t138,t138,t138,t138,t132,t132,t132,t132,t109,t109,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t155,t155,t155,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 4 events :t77,t77,t73,t73,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 8 events :t349,t348,t349,t348,t96,t97,t85,t84,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 14 events :t314,t313,t163,t162,t163,t162,t136,t135,t134,t133,t132,t131,t113,t112,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t64,t64,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t284,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 1 events :t65,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t104,t104,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t425,t424,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 2 events :t171,t171,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 6 events :t397,t396,t388,t387,t46,t45,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 14 events :t320,t321,t321,t320,t129,t130,t130,t129,t130,t129,t130,t129,t119,t118,
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 222 redundant transitions.
Mar 26, 2019 1:29:23 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 285 ms
Mar 26, 2019 1:29:23 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 81 ms
Mar 26, 2019 1:29:23 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Mar 26, 2019 1:29:24 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 428 transitions.
Mar 26, 2019 1:29:26 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 127 place invariants in 379 ms
Mar 26, 2019 1:29:30 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 361 variables to be positive in 4702 ms
Mar 26, 2019 1:29:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 428 transitions.
Mar 26, 2019 1:29:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/428 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 1:29:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 110 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 1:29:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 428 transitions.
Mar 26, 2019 1:29:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 26 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 26, 2019 1:29:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 428 transitions.
Mar 26, 2019 1:29:42 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/428) took 2291 ms. Total solver calls (SAT/UNSAT): 427(0/427)
Mar 26, 2019 1:29:45 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(15/428) took 5455 ms. Total solver calls (SAT/UNSAT): 630(30/600)
Mar 26, 2019 1:29:48 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(37/428) took 8610 ms. Total solver calls (SAT/UNSAT): 1085(208/877)
Mar 26, 2019 1:29:52 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(48/428) took 11970 ms. Total solver calls (SAT/UNSAT): 1219(286/933)
Mar 26, 2019 1:29:55 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(62/428) took 15114 ms. Total solver calls (SAT/UNSAT): 1521(439/1082)
Mar 26, 2019 1:29:58 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(71/428) took 18155 ms. Total solver calls (SAT/UNSAT): 1700(526/1174)
Mar 26, 2019 1:30:01 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(78/428) took 21279 ms. Total solver calls (SAT/UNSAT): 1828(538/1290)
Mar 26, 2019 1:30:04 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(87/428) took 24815 ms. Total solver calls (SAT/UNSAT): 2248(686/1562)
Mar 26, 2019 1:30:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(94/428) took 28407 ms. Total solver calls (SAT/UNSAT): 2551(861/1690)
Mar 26, 2019 1:30:12 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(97/428) took 32243 ms. Total solver calls (SAT/UNSAT): 2689(946/1743)
Mar 26, 2019 1:30:15 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(103/428) took 35317 ms. Total solver calls (SAT/UNSAT): 2932(1077/1855)
Mar 26, 2019 1:30:18 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(107/428) took 38431 ms. Total solver calls (SAT/UNSAT): 3078(1177/1901)
Mar 26, 2019 1:30:21 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(115/428) took 41560 ms. Total solver calls (SAT/UNSAT): 3318(1298/2020)
Mar 26, 2019 1:30:24 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(125/428) took 44700 ms. Total solver calls (SAT/UNSAT): 3516(1345/2171)
Mar 26, 2019 1:30:27 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(141/428) took 47735 ms. Total solver calls (SAT/UNSAT): 3844(1485/2359)
Mar 26, 2019 1:30:30 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(158/428) took 50809 ms. Total solver calls (SAT/UNSAT): 4154(1581/2573)
Mar 26, 2019 1:30:34 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(175/428) took 53997 ms. Total solver calls (SAT/UNSAT): 4293(1624/2669)
Mar 26, 2019 1:30:37 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(196/428) took 57150 ms. Total solver calls (SAT/UNSAT): 4690(1757/2933)
Mar 26, 2019 1:30:40 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(206/428) took 60168 ms. Total solver calls (SAT/UNSAT): 4790(1780/3010)
Mar 26, 2019 1:30:43 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(231/428) took 63269 ms. Total solver calls (SAT/UNSAT): 5026(1907/3119)
Mar 26, 2019 1:30:46 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(251/428) took 66306 ms. Total solver calls (SAT/UNSAT): 5149(1949/3200)
Mar 26, 2019 1:30:49 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(272/428) took 69536 ms. Total solver calls (SAT/UNSAT): 5393(1983/3410)
Mar 26, 2019 1:30:53 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(286/428) took 72998 ms. Total solver calls (SAT/UNSAT): 5627(2067/3560)
Mar 26, 2019 1:30:56 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(299/428) took 76009 ms. Total solver calls (SAT/UNSAT): 5809(2111/3698)
Mar 26, 2019 1:30:59 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(312/428) took 79203 ms. Total solver calls (SAT/UNSAT): 5924(2142/3782)
Mar 26, 2019 1:31:02 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(325/428) took 82519 ms. Total solver calls (SAT/UNSAT): 6079(2193/3886)
Mar 26, 2019 1:31:05 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(346/428) took 85548 ms. Total solver calls (SAT/UNSAT): 6233(2228/4005)
Mar 26, 2019 1:31:08 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(380/428) took 88654 ms. Total solver calls (SAT/UNSAT): 6687(2377/4310)
Mar 26, 2019 1:31:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 90021 ms. Total solver calls (SAT/UNSAT): 6740(2393/4347)
Mar 26, 2019 1:31:10 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 428 transitions.
Mar 26, 2019 1:31:11 AM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 1769 ms. Total solver calls (SAT/UNSAT): 167(0/167)
Mar 26, 2019 1:31:12 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 108022ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="NoC3x3-PT-2A"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is NoC3x3-PT-2A, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r184-csrt-155344537900259"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/NoC3x3-PT-2A.tgz
mv NoC3x3-PT-2A execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;