fond
Model Checking Contest 2019
9th edition, Prague, Czech Republic, April 7, 2019 (TOOLympics)
Execution of r184-csrt-155344537500007
Last Updated
Apr 15, 2019

About the Execution of ITS-Tools for BART-PT-002

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
394.530 8032.00 19249.00 194.10 FFFFFFFFFFFFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/local/x2003239/mcc2019-input.r184-csrt-155344537500007.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2019-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is BART-PT-002, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r184-csrt-155344537500007
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 688K
-rw-r--r-- 1 mcc users 4.2K Mar 10 19:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K Mar 10 19:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.5K Mar 10 19:08 CTLFireability.txt
-rw-r--r-- 1 mcc users 18K Mar 10 19:08 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:46 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K Mar 10 17:46 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2.7K Mar 10 19:07 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Mar 10 19:07 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Mar 10 19:07 LTLFireability.txt
-rw-r--r-- 1 mcc users 11K Mar 10 19:07 LTLFireability.xml
-rw-r--r-- 1 mcc users 1 Mar 10 17:46 NewModel
-rw-r--r-- 1 mcc users 3.9K Mar 10 19:03 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K Mar 10 19:03 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 102 Mar 10 18:58 ReachabilityDeadlock.txt
-rw-r--r-- 1 mcc users 340 Mar 10 18:58 ReachabilityDeadlock.xml
-rw-r--r-- 1 mcc users 4.4K Mar 10 18:59 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 20K Mar 10 18:59 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Mar 10 19:07 UpperBounds.txt

-rw-r--r-- 1 mcc users 3.8K Mar 10 19:07 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 10 17:46 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 10 17:46 instance
-rw-r--r-- 1 mcc users 6 Mar 10 17:46 iscolored
-rw-r--r-- 1 mcc users 506K Mar 10 17:46 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME BART-PT-002-LTLFireability-00
FORMULA_NAME BART-PT-002-LTLFireability-01
FORMULA_NAME BART-PT-002-LTLFireability-02
FORMULA_NAME BART-PT-002-LTLFireability-03
FORMULA_NAME BART-PT-002-LTLFireability-04
FORMULA_NAME BART-PT-002-LTLFireability-05
FORMULA_NAME BART-PT-002-LTLFireability-06
FORMULA_NAME BART-PT-002-LTLFireability-07
FORMULA_NAME BART-PT-002-LTLFireability-08
FORMULA_NAME BART-PT-002-LTLFireability-09
FORMULA_NAME BART-PT-002-LTLFireability-10
FORMULA_NAME BART-PT-002-LTLFireability-11
FORMULA_NAME BART-PT-002-LTLFireability-12
FORMULA_NAME BART-PT-002-LTLFireability-13
FORMULA_NAME BART-PT-002-LTLFireability-14
FORMULA_NAME BART-PT-002-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1553544721279

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903171603/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903171603/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(((X(F(X("(TrainState_1_2_19>=1)"))))U(X(F(F("(TrainState_2_1_38>=1)"))))))
Formula 0 simplified : !(XFX"(TrainState_1_2_19>=1)" U XF"(TrainState_2_1_38>=1)")
Reverse transition relation is exact ! Faster fixpoint algorithm enabled.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 404 rows 264 cols
invariant :TrainState_2_0_0 + TrainState_2_1_1 + TrainState_2_1_2 + TrainState_2_1_3 + TrainState_2_1_4 + TrainState_2_2_4 + TrainState_2_1_5 + TrainState_2_2_5 + TrainState_2_1_6 + TrainState_2_2_6 + TrainState_2_1_7 + TrainState_2_2_7 + TrainState_2_3_7 + TrainState_2_1_8 + TrainState_2_2_8 + TrainState_2_3_8 + TrainState_2_1_9 + TrainState_2_2_9 + TrainState_2_3_9 + TrainState_2_1_10 + TrainState_2_2_10 + TrainState_2_3_10 + TrainState_2_1_11 + TrainState_2_2_11 + TrainState_2_3_11 + TrainState_2_4_11 + TrainState_2_1_12 + TrainState_2_2_12 + TrainState_2_3_12 + TrainState_2_4_12 + TrainState_2_1_13 + TrainState_2_2_13 + TrainState_2_3_13 + TrainState_2_4_13 + TrainState_2_1_14 + TrainState_2_2_14 + TrainState_2_3_14 + TrainState_2_4_14 + TrainState_2_1_15 + TrainState_2_2_15 + TrainState_2_3_15 + TrainState_2_4_15 + TrainState_2_1_16 + TrainState_2_2_16 + TrainState_2_3_16 + TrainState_2_4_16 + TrainState_2_1_17 + TrainState_2_2_17 + TrainState_2_3_17 + TrainState_2_4_17 + TrainState_2_1_18 + TrainState_2_2_18 + TrainState_2_3_18 + TrainState_2_4_18 + TrainState_2_1_19 + TrainState_2_2_19 + TrainState_2_3_19 + TrainState_2_4_19 + TrainState_2_1_20 + TrainState_2_2_20 + TrainState_2_3_20 + TrainState_2_4_20 + TrainState_2_1_21 + TrainState_2_2_21 + TrainState_2_3_21 + TrainState_2_4_21 + TrainState_2_1_22 + TrainState_2_2_22 + TrainState_2_3_22 + TrainState_2_4_22 + TrainState_2_1_23 + TrainState_2_2_23 + TrainState_2_3_23 + TrainState_2_4_23 + TrainState_2_1_24 + TrainState_2_2_24 + TrainState_2_3_24 + TrainState_2_4_24 + TrainState_2_1_25 + TrainState_2_2_25 + TrainState_2_3_25 + TrainState_2_4_25 + TrainState_2_1_26 + TrainState_2_2_26 + TrainState_2_3_26 + TrainState_2_4_26 + TrainState_2_1_27 + TrainState_2_2_27 + TrainState_2_3_27 + TrainState_2_4_27 + TrainState_2_1_28 + TrainState_2_2_28 + TrainState_2_3_28 + TrainState_2_4_28 + TrainState_2_1_29 + TrainState_2_2_29 + TrainState_2_3_29 + TrainState_2_4_29 + TrainState_2_1_30 + TrainState_2_2_30 + TrainState_2_3_30 + TrainState_2_4_30 + TrainState_2_1_31 + TrainState_2_2_31 + TrainState_2_3_31 + TrainState_2_4_31 + TrainState_2_1_32 + TrainState_2_2_32 + TrainState_2_3_32 + TrainState_2_4_32 + TrainState_2_1_33 + TrainState_2_2_33 + TrainState_2_3_33 + TrainState_2_4_33 + TrainState_2_1_34 + TrainState_2_2_34 + TrainState_2_3_34 + TrainState_2_4_34 + TrainState_2_1_35 + TrainState_2_2_35 + TrainState_2_3_35 + TrainState_2_1_36 + TrainState_2_2_36 + TrainState_2_3_36 + TrainState_2_1_37 + TrainState_2_2_37 + TrainState_2_3_37 + TrainState_2_1_38 + TrainState_2_2_38 + TrainState_2_1_39 + TrainState_2_2_39 + TrainState_2_1_40 = 1
invariant :TrainState_1_0_0 + TrainState_1_1_1 + TrainState_1_1_2 + TrainState_1_1_3 + TrainState_1_1_4 + TrainState_1_2_4 + TrainState_1_1_5 + TrainState_1_2_5 + TrainState_1_1_6 + TrainState_1_2_6 + TrainState_1_1_7 + TrainState_1_2_7 + TrainState_1_3_7 + TrainState_1_1_8 + TrainState_1_2_8 + TrainState_1_3_8 + TrainState_1_1_9 + TrainState_1_2_9 + TrainState_1_3_9 + TrainState_1_1_10 + TrainState_1_2_10 + TrainState_1_3_10 + TrainState_1_1_11 + TrainState_1_2_11 + TrainState_1_3_11 + TrainState_1_4_11 + TrainState_1_1_12 + TrainState_1_2_12 + TrainState_1_3_12 + TrainState_1_4_12 + TrainState_1_1_13 + TrainState_1_2_13 + TrainState_1_3_13 + TrainState_1_4_13 + TrainState_1_1_14 + TrainState_1_2_14 + TrainState_1_3_14 + TrainState_1_4_14 + TrainState_1_1_15 + TrainState_1_2_15 + TrainState_1_3_15 + TrainState_1_4_15 + TrainState_1_1_16 + TrainState_1_2_16 + TrainState_1_3_16 + TrainState_1_4_16 + TrainState_1_1_17 + TrainState_1_2_17 + TrainState_1_3_17 + TrainState_1_4_17 + TrainState_1_1_18 + TrainState_1_2_18 + TrainState_1_3_18 + TrainState_1_4_18 + TrainState_1_1_19 + TrainState_1_2_19 + TrainState_1_3_19 + TrainState_1_4_19 + TrainState_1_1_20 + TrainState_1_2_20 + TrainState_1_3_20 + TrainState_1_4_20 + TrainState_1_1_21 + TrainState_1_2_21 + TrainState_1_3_21 + TrainState_1_4_21 + TrainState_1_1_22 + TrainState_1_2_22 + TrainState_1_3_22 + TrainState_1_4_22 + TrainState_1_1_23 + TrainState_1_2_23 + TrainState_1_3_23 + TrainState_1_4_23 + TrainState_1_1_24 + TrainState_1_2_24 + TrainState_1_3_24 + TrainState_1_4_24 + TrainState_1_1_25 + TrainState_1_2_25 + TrainState_1_3_25 + TrainState_1_4_25 + TrainState_1_1_26 + TrainState_1_2_26 + TrainState_1_3_26 + TrainState_1_4_26 + TrainState_1_1_27 + TrainState_1_2_27 + TrainState_1_3_27 + TrainState_1_4_27 + TrainState_1_1_28 + TrainState_1_2_28 + TrainState_1_3_28 + TrainState_1_4_28 + TrainState_1_1_29 + TrainState_1_2_29 + TrainState_1_3_29 + TrainState_1_4_29 + TrainState_1_1_30 + TrainState_1_2_30 + TrainState_1_3_30 + TrainState_1_4_30 + TrainState_1_1_31 + TrainState_1_2_31 + TrainState_1_3_31 + TrainState_1_4_31 + TrainState_1_1_32 + TrainState_1_2_32 + TrainState_1_3_32 + TrainState_1_4_32 + TrainState_1_1_33 + TrainState_1_2_33 + TrainState_1_3_33 + TrainState_1_4_33 + TrainState_1_1_34 + TrainState_1_2_34 + TrainState_1_3_34 + TrainState_1_4_34 + TrainState_1_1_35 + TrainState_1_2_35 + TrainState_1_3_35 + TrainState_1_1_36 + TrainState_1_2_36 + TrainState_1_3_36 + TrainState_1_1_37 + TrainState_1_2_37 + TrainState_1_3_37 + TrainState_1_1_38 + TrainState_1_2_38 + TrainState_1_1_39 + TrainState_1_2_39 + TrainState_1_1_40 = 1
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
88 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.0741,43232,1,0,30,151795,20,9,5779,69104,60
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA BART-PT-002-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 1 : !((false))
Formula 1 simplified : 1
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
9 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.16067,45504,1,0,30,158490,26,9,6298,80685,70
an accepting run exists (use option '-e' to print it)
Formula 1 is FALSE accepting run found.
FORMULA BART-PT-002-LTLFireability-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 2 : !((G(X(F(("(TrainState_1_4_33>=1)")U("(TrainState_1_2_23>=1)"))))))
Formula 2 simplified : !GXF("(TrainState_1_4_33>=1)" U "(TrainState_1_2_23>=1)")
3 unique states visited
3 strongly connected components in search stack
4 transitions explored
3 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.17537,46092,1,0,31,160408,35,9,6299,82485,79
an accepting run exists (use option '-e' to print it)
Formula 2 is FALSE accepting run found.
FORMULA BART-PT-002-LTLFireability-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 3 : !((((X("(TrainState_1_4_34>=1)"))U("(TrainState_1_3_33>=1)"))U(X(G(X("(TrainState_1_0_0>=1)"))))))
Formula 3 simplified : !((X"(TrainState_1_4_34>=1)" U "(TrainState_1_3_33>=1)") U XGX"(TrainState_1_0_0>=1)")
6 unique states visited
6 strongly connected components in search stack
7 transitions explored
6 items max in DFS search stack
10 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.27233,50456,1,0,53,172768,50,15,6304,101032,136
an accepting run exists (use option '-e' to print it)
Formula 3 is FALSE accepting run found.
FORMULA BART-PT-002-LTLFireability-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 4 : !((F(G("(TrainState_1_0_0>=1)"))))
Formula 4 simplified : !FG"(TrainState_1_0_0>=1)"
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
14 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.40909,53880,1,0,72,187481,57,29,6304,126592,195
an accepting run exists (use option '-e' to print it)
Formula 4 is FALSE accepting run found.
FORMULA BART-PT-002-LTLFireability-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 5 : !((G(G(G(("(TrainState_1_2_30>=1)")U("(TrainState_1_0_0>=1)"))))))
Formula 5 simplified : !G("(TrainState_1_2_30>=1)" U "(TrainState_1_0_0>=1)")
3 unique states visited
3 strongly connected components in search stack
4 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.41272,54396,1,0,72,187481,71,29,6312,126601,215
an accepting run exists (use option '-e' to print it)
Formula 5 is FALSE accepting run found.
FORMULA BART-PT-002-LTLFireability-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 6 : !((F(F(F("(TrainState_2_2_33>=1)")))))
Formula 6 simplified : !F"(TrainState_2_2_33>=1)"
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
6 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.46848,55716,1,0,94,194438,80,38,6313,136993,272
an accepting run exists (use option '-e' to print it)
Formula 6 is FALSE accepting run found.
FORMULA BART-PT-002-LTLFireability-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 7 : !((false))
Formula 7 simplified : 1
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.46873,55716,1,0,94,194438,80,38,6313,136993,272
an accepting run exists (use option '-e' to print it)
Formula 7 is FALSE accepting run found.
FORMULA BART-PT-002-LTLFireability-07 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 8 : !((G((("(TrainState_1_1_20>=1)")U("(TrainState_1_1_26>=1)"))U(("(TrainState_2_2_5>=1)")U("(TrainState_2_2_38>=1)")))))
Formula 8 simplified : !G(("(TrainState_1_1_20>=1)" U "(TrainState_1_1_26>=1)") U ("(TrainState_2_2_5>=1)" U "(TrainState_2_2_38>=1)"))
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.47333,56132,1,0,94,194438,125,38,6354,136995,283
an accepting run exists (use option '-e' to print it)
Formula 8 is FALSE accepting run found.
FORMULA BART-PT-002-LTLFireability-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 9 : !((F(F(F(("(TrainState_2_1_16>=1)")U("(TrainState_2_1_28>=1)"))))))
Formula 9 simplified : !F("(TrainState_2_1_16>=1)" U "(TrainState_2_1_28>=1)")
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
9 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.5601,58244,1,0,117,206432,134,47,6355,151679,340
an accepting run exists (use option '-e' to print it)
Formula 9 is FALSE accepting run found.
FORMULA BART-PT-002-LTLFireability-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 10 : !((false))
Formula 10 simplified : 1
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.56086,58244,1,0,117,206432,134,47,6355,151679,340
an accepting run exists (use option '-e' to print it)
Formula 10 is FALSE accepting run found.
FORMULA BART-PT-002-LTLFireability-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 11 : !((G(F((G("(TrainState_2_3_19>=1)"))U("(TrainState_2_1_12>=1)")))))
Formula 11 simplified : !GF(G"(TrainState_2_3_19>=1)" U "(TrainState_2_1_12>=1)")
3 unique states visited
3 strongly connected components in search stack
4 transitions explored
3 items max in DFS search stack
7 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.64685,59036,1,0,118,210583,143,47,6356,155501,349
an accepting run exists (use option '-e' to print it)
Formula 11 is FALSE accepting run found.
FORMULA BART-PT-002-LTLFireability-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 12 : !((X(F((G("(TrainState_1_1_29>=1)"))U("(TrainState_1_3_18>=1)")))))
Formula 12 simplified : !XF(G"(TrainState_1_1_29>=1)" U "(TrainState_1_3_18>=1)")
3 unique states visited
3 strongly connected components in search stack
3 transitions explored
3 items max in DFS search stack
16 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.81483,63788,1,0,139,231503,152,57,6357,186107,406
an accepting run exists (use option '-e' to print it)
Formula 12 is FALSE accepting run found.
FORMULA BART-PT-002-LTLFireability-12 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 13 : !(((F(("(TrainState_2_1_28>=1)")U("(TrainState_2_2_24>=1)")))U(G(("(TrainState_1_4_28>=1)")U("(TrainState_1_0_0>=1)")))))
Formula 13 simplified : !(F("(TrainState_2_1_28>=1)" U "(TrainState_2_2_24>=1)") U G("(TrainState_1_4_28>=1)" U "(TrainState_1_0_0>=1)"))
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
1 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.82409,64024,1,0,142,232641,163,57,6363,186891,437
an accepting run exists (use option '-e' to print it)
Formula 13 is FALSE accepting run found.
FORMULA BART-PT-002-LTLFireability-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 14 : !((false))
Formula 14 simplified : 1
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.82428,64024,1,0,142,232641,163,57,6363,186891,437
an accepting run exists (use option '-e' to print it)
Formula 14 is FALSE accepting run found.
FORMULA BART-PT-002-LTLFireability-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 15 : !((false))
Formula 15 simplified : 1
2 unique states visited
2 strongly connected components in search stack
2 transitions explored
2 items max in DFS search stack
0 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,1.82441,64024,1,0,142,232641,163,57,6363,186891,437
an accepting run exists (use option '-e' to print it)
Formula 15 is FALSE accepting run found.
FORMULA BART-PT-002-LTLFireability-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1553544729311

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 25, 2019 8:12:04 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 25, 2019 8:12:04 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 25, 2019 8:12:05 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 304 ms
Mar 25, 2019 8:12:05 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 474 places.
Mar 25, 2019 8:12:05 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 404 transitions.
Mar 25, 2019 8:12:05 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 60 ms
Mar 25, 2019 8:12:05 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 210 fixed domain variables (out of 474 variables) in GAL type BART_PT_002
Mar 25, 2019 8:12:05 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 210 constant array cells/variables (out of 474 variables) in type BART_PT_002
Mar 25, 2019 8:12:05 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: NewDistTable_36_4_32,StopTable_2_3,NewDistTable_17_3_14,NewDistTable_8_4_4,NewDistTable_27_3_24,NewDistTable_26_1_25,NewDistTable_29_3_26,NewDistTable_7_1_6,DistStation_7,NewDistTable_34_1_33,NewDistTable_14_5_9,NewDistTable_16_5_11,NewDistTable_32_5_27,NewDistTable_39_2_37,DistStation_23,NewDistTable_25_3_22,NewDistTable_15_5_10,NewDistTable_3_2_1,DistStation_24,NewDistTable_20_2_18,NewDistTable_33_5_28,DistStation_37,NewDistTable_22_5_17,NewDistTable_22_4_18,NewDistTable_16_3_13,NewDistTable_34_2_32,DistStation_29,DistStation_31,NewDistTable_28_1_27,NewDistTable_32_2_30,NewDistTable_21_1_20,NewDistTable_39_1_38,NewDistTable_31_4_27,NewDistTable_16_4_12,DistStation_8,NewDistTable_40_1_39,NewDistTable_27_5_22,NewDistTable_23_3_20,DistStation_11,NewDistTable_18_2_16,NewDistTable_31_2_29,NewDistTable_21_2_19,NewDistTable_25_1_24,NewDistTable_32_4_28,NewDistTable_27_2_25,NewDistTable_22_1_21,NewDistTable_14_3_11,DistStation_14,NewDistTable_29_5_24,NewDistTable_8_1_7,DistStation_6,NewDistTable_10_3_7,NewDistTable_3_1_2,NewDistTable_5_1_4,NewDistTable_9_4_5,NewDistTable_33_2_31,NewDistTable_13_4_9,NewDistTable_32_3_29,DistStation_5,NewDistTable_5_3_2,NewDistTable_19_2_17,DistStation_9,NewDistTable_27_1_26,NewDistTable_20_1_19,NewDistTable_22_2_20,NewDistTable_38_2_36,NewDistTable_7_4_3,NewDistTable_40_2_38,NewDistTable_38_3_35,NewDistTable_11_2_9,DistStation_25,NewDistTable_26_5_21,NewDistTable_29_1_28,NewDistTable_17_4_13,NewDistTable_4_1_3,NewDistTable_28_2_26,NewDistTable_15_3_12,NewDistTable_27_4_23,NewDistTable_23_5_18,NewDistTable_15_4_11,NewDistTable_10_4_6,DistStation_10,NewDistTable_35_4_31,DistStation_39,NewDistTable_37_3_34,DistStation_32,NewDistTable_17_5_12,NewDistTable_35_1_34,NewDistTable_6_1_5,NewDistTable_20_4_16,StopTable_4_10,NewDistTable_14_2_12,NewDistTable_37_4_33,NewDistTable_33_4_29,DistStation_18,NewDistTable_14_1_13,NewDistTable_18_1_17,NewDistTable_34_5_29,NewDistTable_29_4_25,DistStation_35,DistStation_19,DistStation_26,NewDistTable_30_4_26,NewDistTable_8_2_6,NewDistTable_13_1_12,DistStation_16,DistStation_33,NewDistTable_33_1_32,NewDistTable_19_4_15,DistStation_30,NewDistTable_21_3_18,NewDistTable_30_2_28,NewDistTable_39_3_36,NewDistTable_23_4_19,NewDistTable_35_2_33,NewDistTable_7_2_5,NewDistTable_18_5_13,NewDistTable_25_2_23,NewDistTable_23_2_21,NewDistTable_26_4_22,NewDistTable_28_3_25,NewDistTable_33_3_30,DistStation_36,NewDistTable_5_2_3,NewDistTable_7_3_4,NewDistTable_11_5_6,NewDistTable_20_5_15,NewDistTable_24_3_21,NewDistTable_30_1_29,NewDistTable_9_1_8,NewDistTable_37_1_36,NewDistTable_16_2_14,NewDistTable_35_3_32,NewDistTable_20_3_17,NewDistTable_21_4_17,NewDistTable_30_3_27,NewDistTable_26_2_24,StopTable_1_1,DistStation_20,NewDistTable_14_4_10,NewDistTable_8_3_5,NewDistTable_13_3_10,NewDistTable_34_4_30,NewDistTable_10_2_8,NewDistTable_23_1_22,DistStation_38,NewDistTable_19_3_16,NewDistTable_36_2_34,NewDistTable_12_2_10,NewDistTable_21_5_16,StopTable_5_15,NewDistTable_38_1_37,NewDistTable_18_3_15,NewDistTable_2_1_1,NewDistTable_29_2_27,DistStation_17,NewDistTable_12_1_11,DistStation_34,NewDistTable_12_4_8,DistStation_13,NewDistTable_30_5_25,DistStation_40,NewDistTable_36_1_35,NewDistTable_6_3_3,NewDistTable_36_3_33,NewDistTable_18_4_14,NewDistTable_4_3_1,NewDistTable_25_5_20,NewDistTable_32_1_31,NewDistTable_24_2_22,NewDistTable_28_4_24,NewDistTable_16_1_15,NewDistTable_31_3_28,NewDistTable_9_2_7,NewDistTable_9_3_6,NewDistTable_12_3_9,NewDistTable_19_1_18,NewDistTable_24_4_20,NewDistTable_24_1_23,NewDistTable_15_1_14,NewDistTable_24_5_19,DistStation_22,NewDistTable_11_1_10,NewDistTable_17_1_16,NewDistTable_26_3_23,NewDistTable_28_5_23,DistStation_28,NewDistTable_31_5_26,NewDistTable_15_2_13,NewDistTable_11_3_8,DistStation_27,NewDistTable_22_3_19,NewDistTable_37_2_35,NewDistTable_34_3_31,NewDistTable_4_2_2,NewDistTable_6_2_4,NewDistTable_2_2_0,NewDistTable_17_2_15,NewDistTable_13_2_11,DistStation_15,DistStation_21,NewDistTable_31_1_30,DistStation_12,NewDistTable_10_1_9,NewDistTable_11_4_7,NewDistTable_12_5_7,NewDistTable_13_5_8,StopTable_3_6,NewDistTable_19_5_14,NewDistTable_25_4_21,
Mar 25, 2019 8:12:05 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed 210 constant variables :NewDistTable_36_4_32=1, StopTable_2_3=1, NewDistTable_17_3_14=1, NewDistTable_8_4_4=1, NewDistTable_27_3_24=1, NewDistTable_26_1_25=1, NewDistTable_29_3_26=1, NewDistTable_7_1_6=1, DistStation_7=1, NewDistTable_34_1_33=1, NewDistTable_14_5_9=1, NewDistTable_16_5_11=1, NewDistTable_32_5_27=1, NewDistTable_39_2_37=1, DistStation_23=1, NewDistTable_25_3_22=1, NewDistTable_15_5_10=1, NewDistTable_3_2_1=1, DistStation_24=1, NewDistTable_20_2_18=1, NewDistTable_33_5_28=1, DistStation_37=1, NewDistTable_22_5_17=1, NewDistTable_22_4_18=1, NewDistTable_16_3_13=1, NewDistTable_34_2_32=1, DistStation_29=1, DistStation_31=1, NewDistTable_28_1_27=1, NewDistTable_32_2_30=1, NewDistTable_21_1_20=1, NewDistTable_39_1_38=1, NewDistTable_31_4_27=1, NewDistTable_16_4_12=1, DistStation_8=1, NewDistTable_40_1_39=1, NewDistTable_27_5_22=1, NewDistTable_23_3_20=1, DistStation_11=1, NewDistTable_18_2_16=1, NewDistTable_31_2_29=1, NewDistTable_21_2_19=1, NewDistTable_25_1_24=1, NewDistTable_32_4_28=1, NewDistTable_27_2_25=1, NewDistTable_22_1_21=1, NewDistTable_14_3_11=1, DistStation_14=1, NewDistTable_29_5_24=1, NewDistTable_8_1_7=1, DistStation_6=1, NewDistTable_10_3_7=1, NewDistTable_3_1_2=1, NewDistTable_5_1_4=1, NewDistTable_9_4_5=1, NewDistTable_33_2_31=1, NewDistTable_13_4_9=1, NewDistTable_32_3_29=1, DistStation_5=1, NewDistTable_5_3_2=1, NewDistTable_19_2_17=1, DistStation_9=1, NewDistTable_27_1_26=1, NewDistTable_20_1_19=1, NewDistTable_22_2_20=1, NewDistTable_38_2_36=1, NewDistTable_7_4_3=1, NewDistTable_40_2_38=1, NewDistTable_38_3_35=1, NewDistTable_11_2_9=1, DistStation_25=1, NewDistTable_26_5_21=1, NewDistTable_29_1_28=1, NewDistTable_17_4_13=1, NewDistTable_4_1_3=1, NewDistTable_28_2_26=1, NewDistTable_15_3_12=1, NewDistTable_27_4_23=1, NewDistTable_23_5_18=1, NewDistTable_15_4_11=1, NewDistTable_10_4_6=1, DistStation_10=1, NewDistTable_35_4_31=1, DistStation_39=1, NewDistTable_37_3_34=1, DistStation_32=1, NewDistTable_17_5_12=1, NewDistTable_35_1_34=1, NewDistTable_6_1_5=1, NewDistTable_20_4_16=1, StopTable_4_10=1, NewDistTable_14_2_12=1, NewDistTable_37_4_33=1, NewDistTable_33_4_29=1, DistStation_18=1, NewDistTable_14_1_13=1, NewDistTable_18_1_17=1, NewDistTable_34_5_29=1, NewDistTable_29_4_25=1, DistStation_35=1, DistStation_19=1, DistStation_26=1, NewDistTable_30_4_26=1, NewDistTable_8_2_6=1, NewDistTable_13_1_12=1, DistStation_16=1, DistStation_33=1, NewDistTable_33_1_32=1, NewDistTable_19_4_15=1, DistStation_30=1, NewDistTable_21_3_18=1, NewDistTable_30_2_28=1, NewDistTable_39_3_36=1, NewDistTable_23_4_19=1, NewDistTable_35_2_33=1, NewDistTable_7_2_5=1, NewDistTable_18_5_13=1, NewDistTable_25_2_23=1, NewDistTable_23_2_21=1, NewDistTable_26_4_22=1, NewDistTable_28_3_25=1, NewDistTable_33_3_30=1, DistStation_36=1, NewDistTable_5_2_3=1, NewDistTable_7_3_4=1, NewDistTable_11_5_6=1, NewDistTable_20_5_15=1, NewDistTable_24_3_21=1, NewDistTable_30_1_29=1, NewDistTable_9_1_8=1, NewDistTable_37_1_36=1, NewDistTable_16_2_14=1, NewDistTable_35_3_32=1, NewDistTable_20_3_17=1, NewDistTable_21_4_17=1, NewDistTable_30_3_27=1, NewDistTable_26_2_24=1, StopTable_1_1=1, DistStation_20=1, NewDistTable_14_4_10=1, NewDistTable_8_3_5=1, NewDistTable_13_3_10=1, NewDistTable_34_4_30=1, NewDistTable_10_2_8=1, NewDistTable_23_1_22=1, DistStation_38=1, NewDistTable_19_3_16=1, NewDistTable_36_2_34=1, NewDistTable_12_2_10=1, NewDistTable_21_5_16=1, StopTable_5_15=1, NewDistTable_38_1_37=1, NewDistTable_18_3_15=1, NewDistTable_2_1_1=1, NewDistTable_29_2_27=1, DistStation_17=1, NewDistTable_12_1_11=1, DistStation_34=1, NewDistTable_12_4_8=1, DistStation_13=1, NewDistTable_30_5_25=1, DistStation_40=1, NewDistTable_36_1_35=1, NewDistTable_6_3_3=1, NewDistTable_36_3_33=1, NewDistTable_18_4_14=1, NewDistTable_4_3_1=1, NewDistTable_25_5_20=1, NewDistTable_32_1_31=1, NewDistTable_24_2_22=1, NewDistTable_28_4_24=1, NewDistTable_16_1_15=1, NewDistTable_31_3_28=1, NewDistTable_9_2_7=1, NewDistTable_9_3_6=1, NewDistTable_12_3_9=1, NewDistTable_19_1_18=1, NewDistTable_24_4_20=1, NewDistTable_24_1_23=1, NewDistTable_15_1_14=1, NewDistTable_24_5_19=1, DistStation_22=1, NewDistTable_11_1_10=1, NewDistTable_17_1_16=1, NewDistTable_26_3_23=1, NewDistTable_28_5_23=1, DistStation_28=1, NewDistTable_31_5_26=1, NewDistTable_15_2_13=1, NewDistTable_11_3_8=1, DistStation_27=1, NewDistTable_22_3_19=1, NewDistTable_37_2_35=1, NewDistTable_34_3_31=1, NewDistTable_4_2_2=1, NewDistTable_6_2_4=1, NewDistTable_2_2_0=1, NewDistTable_17_2_15=1, NewDistTable_13_2_11=1, DistStation_15=1, DistStation_21=1, NewDistTable_31_1_30=1, DistStation_12=1, NewDistTable_10_1_9=1, NewDistTable_11_4_7=1, NewDistTable_12_5_7=1, NewDistTable_13_5_8=1, StopTable_3_6=1, NewDistTable_19_5_14=1, NewDistTable_25_4_21=1
Mar 25, 2019 8:12:05 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Simplified 1310 expressions due to constant valuations.
Mar 25, 2019 8:12:06 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 324 ms
Mar 25, 2019 8:12:06 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 4 ms
Mar 25, 2019 8:12:06 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 1 ms
Mar 25, 2019 8:12:06 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 404 transitions.
Mar 25, 2019 8:12:07 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 2 place invariants in 130 ms
Mar 25, 2019 8:12:08 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout :(error "Failed to check-sat")
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Failed to check-sat")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:116)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.init(NecessaryEnablingsolver.java:71)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:471)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Mar 25, 2019 8:12:08 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 2733ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="BART-PT-002"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is BART-PT-002, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r184-csrt-155344537500007"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/BART-PT-002.tgz
mv BART-PT-002 execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;