Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/local/x2003239/mcc2019-input.r162-csrt-155286434000305.qcow2', fmt=qcow2 size=4294967296 backing_file=/local/x2003239/mcc2019-input.qcow2 encryption=off cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is SimpleLoadBal-PT-05, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r162-csrt-155286434000305
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 348K
-rw-r--r-- 1 mcc users 4.9K Feb 12 18:42 CTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 12 18:42 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.5K Feb 9 02:03 CTLFireability.txt
-rw-r--r-- 1 mcc users 25K Feb 9 02:03 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 106 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 344 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 3.0K Feb 5 01:29 LTLCardinality.txt
-rw-r--r-- 1 mcc users 13K Feb 5 01:29 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 4 22:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.8K Feb 4 22:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.9K Feb 4 20:38 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K Feb 4 20:38 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.5K Feb 1 20:56 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 1 20:56 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 4 22:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 4 22:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jan 29 09:35 equiv_col
-rw-r--r-- 1 mcc users 3 Jan 29 09:35 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:35 iscolored
-rw-r--r-- 1 mcc users 153K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-00
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-01
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-02
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-03
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-04
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-05
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-06
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-07
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-08
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-09
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-10
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-11
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-12
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-13
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-14
FORMULA_NAME SimpleLoadBal-PT-05-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1553055888464

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : SimpleLoadBal-PT-05-ReachabilityCardinality-00 with value :((P_client_idle_5>=2)&&(((P_lb_load_2_3>=2)||(P_lb_load_1_3>=2))||((P_lb_load_2_1<=P_client_waiting_5)&&(P_lb_routing_1_3<=P_client_waiting_4))))
Read [reachable] property : SimpleLoadBal-PT-05-ReachabilityCardinality-01 with value :((((P_client_waiting_5>=2)||(P_lb_load_1_5<=P_client_ack_5))||(!(P_lb_load_2_0<=P_lb_balancing_1)))&&(P_lb_load_2_5>=2))
Read [invariant] property : SimpleLoadBal-PT-05-ReachabilityCardinality-02 with value :(!(P_server_processed_2>=2))
Read [invariant] property : SimpleLoadBal-PT-05-ReachabilityCardinality-03 with value :(!((P_client_ack_5>=2)||((P_lb_load_1_4>=1)&&(P_client_waiting_2>=3))))
Read [invariant] property : SimpleLoadBal-PT-05-ReachabilityCardinality-04 with value :(!(((P_client_idle_1<=P_server_processed_2)&&(P_server_request_1_1>=3))&&(!(P_lb_balancing_1>=2))))
Read [reachable] property : SimpleLoadBal-PT-05-ReachabilityCardinality-05 with value :((((P_client_waiting_1<=P_client_waiting_3)&&(P_lb_load_2_0<=P_lb_load_1_3))||(!(P_server_request_1_1>=3)))&&(P_lb_load_2_3>=2))
Read [reachable] property : SimpleLoadBal-PT-05-ReachabilityCardinality-06 with value :(P_lb_load_2_5>=3)
Read [invariant] property : SimpleLoadBal-PT-05-ReachabilityCardinality-07 with value :(!(P_server_processed_2>=3))
Read [invariant] property : SimpleLoadBal-PT-05-ReachabilityCardinality-08 with value :(!(P_lb_load_1_5>=3))
Read [invariant] property : SimpleLoadBal-PT-05-ReachabilityCardinality-09 with value :(!(((P_client_ack_5>=1)&&(P_client_waiting_4>=1))&&((P_server_request_2_2>=2)||(P_client_idle_1>=2))))
Read [reachable] property : SimpleLoadBal-PT-05-ReachabilityCardinality-10 with value :(P_server_waiting_2>=3)
Read [reachable] property : SimpleLoadBal-PT-05-ReachabilityCardinality-11 with value :((P_lb_load_2_1>=2)||(P_client_waiting_4>=3))
Read [invariant] property : SimpleLoadBal-PT-05-ReachabilityCardinality-12 with value :(!(((P_server_notification_2>=2)||(P_lb_load_1_3<=P_lb_load_2_4))&&((P_lb_load_1_0<=P_server_notification_ack_1)&&(P_server_request_4_2>=3))))
Read [invariant] property : SimpleLoadBal-PT-05-ReachabilityCardinality-13 with value :((P_client_ack_5>=1)||(P_lb_load_2_4<=P_server_notification_2))
Read [reachable] property : SimpleLoadBal-PT-05-ReachabilityCardinality-14 with value :((((P_server_request_5_1>=1)||(P_server_processed_1<=P_client_idle_3))||(!(P_server_request_2_2<=P_lb_load_1_1)))&&(P_lb_load_1_5>=1))
Read [reachable] property : SimpleLoadBal-PT-05-ReachabilityCardinality-15 with value :((((P_client_waiting_5<=P_server_waiting_2)&&(P_server_request_4_2>=2))&&((P_lb_routing_1_2>=2)||(P_server_request_5_2>=3)))||(P_server_notification_1>=2))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 140
// Phase 1: matrix 140 rows 59 cols
invariant :P_server_idle_2 + P_server_waiting_2 + P_server_processed_2 = 1
invariant :P_client_idle_3 + P_client_waiting_3 = 1
invariant :-1'P_client_waiting_3 + P_client_request_3 + P_client_ack_3 + P_server_request_3_1 + P_server_request_3_2 + P_lb_routing_1_3 = 0
invariant :P_client_idle_2 + P_client_waiting_2 = 1
invariant :-1'P_client_waiting_1 + -1'P_client_waiting_4 + P_client_request_1 + P_client_request_4 + P_client_ack_1 + P_client_ack_4 + -1'P_server_waiting_2 + -1'P_server_processed_2 + P_server_notification_ack_2 + P_server_request_1_1 + -1'P_server_request_2_2 + -1'P_server_request_3_2 + P_server_request_4_1 + -1'P_server_request_5_2 + P_lb_routing_1_1 + P_lb_routing_1_4 + -2'P_lb_load_2_0 + -1'P_lb_load_2_1 + P_lb_load_2_3 + 2'P_lb_load_2_4 + 3'P_lb_load_2_5 = -2
invariant :P_client_waiting_1 + P_client_waiting_2 + P_client_waiting_3 + P_client_waiting_4 + P_client_waiting_5 + -1'P_client_request_1 + -1'P_client_request_2 + -1'P_client_request_3 + -1'P_client_request_4 + -1'P_client_request_5 + -1'P_client_ack_1 + -1'P_client_ack_2 + -1'P_client_ack_3 + -1'P_client_ack_4 + -1'P_client_ack_5 + P_server_waiting_1 + P_server_waiting_2 + P_server_processed_1 + P_server_processed_2 + -1'P_server_notification_ack_1 + -1'P_server_notification_ack_2 + -1'P_lb_routing_1_1 + -1'P_lb_routing_1_2 + -1'P_lb_routing_1_3 + -1'P_lb_routing_1_4 + -1'P_lb_routing_1_5 + 3'P_lb_load_1_0 + 2'P_lb_load_1_1 + P_lb_load_1_2 + -1'P_lb_load_1_4 + -2'P_lb_load_1_5 + 2'P_lb_load_2_0 + P_lb_load_2_1 + -1'P_lb_load_2_3 + -2'P_lb_load_2_4 + -3'P_lb_load_2_5 = 5
invariant :-1'P_server_waiting_2 + P_server_notification_2 + P_server_notification_ack_2 = 0
invariant :P_server_idle_1 + P_server_waiting_1 + P_server_processed_1 = 1
invariant :P_client_idle_1 + P_client_waiting_1 = 1
invariant :-1'P_client_waiting_1 + -1'P_client_waiting_2 + -1'P_client_waiting_3 + -1'P_client_waiting_4 + -1'P_client_waiting_5 + P_client_request_1 + P_client_request_2 + P_client_request_3 + P_client_request_4 + P_client_request_5 + P_client_ack_1 + P_client_ack_2 + P_client_ack_3 + P_client_ack_4 + P_client_ack_5 + -1'P_server_waiting_1 + -1'P_server_waiting_2 + -1'P_server_processed_1 + -1'P_server_processed_2 + P_server_notification_ack_1 + P_server_notification_ack_2 + P_lb_routing_1_1 + P_lb_routing_1_2 + P_lb_routing_1_3 + P_lb_routing_1_4 + P_lb_routing_1_5 + -2'P_lb_load_1_0 + -1'P_lb_load_1_1 + P_lb_load_1_3 + 2'P_lb_load_1_4 + 3'P_lb_load_1_5 + -2'P_lb_load_2_0 + -1'P_lb_load_2_1 + P_lb_load_2_3 + 2'P_lb_load_2_4 + 3'P_lb_load_2_5 = -4
invariant :-1'P_client_waiting_5 + P_client_request_5 + P_client_ack_5 + P_server_request_5_1 + P_server_request_5_2 + P_lb_routing_1_5 = 0
invariant :P_client_waiting_4 + -1'P_client_request_4 + -1'P_client_ack_4 + P_server_waiting_2 + P_server_processed_2 + -1'P_server_notification_ack_2 + P_server_request_1_2 + P_server_request_2_2 + P_server_request_3_2 + -1'P_server_request_4_1 + P_server_request_5_2 + -1'P_lb_routing_1_4 + 2'P_lb_load_2_0 + P_lb_load_2_1 + -1'P_lb_load_2_3 + -2'P_lb_load_2_4 + -3'P_lb_load_2_5 = 2
invariant :-1'P_client_waiting_2 + P_client_request_2 + P_client_ack_2 + P_server_request_2_1 + P_server_request_2_2 + P_lb_routing_1_2 = 0
invariant :P_lb_idle_1 + P_lb_routing_1_1 + P_lb_routing_1_2 + P_lb_routing_1_3 + P_lb_routing_1_4 + P_lb_routing_1_5 + P_lb_balancing_1 = 1
invariant :P_lb_load_2_0 + P_lb_load_2_1 + P_lb_load_2_2 + P_lb_load_2_3 + P_lb_load_2_4 + P_lb_load_2_5 = 1
invariant :P_client_idle_4 + P_client_waiting_4 = 1
invariant :-1'P_server_waiting_1 + P_server_notification_1 + P_server_notification_ack_1 = 0
invariant :-1'P_client_waiting_4 + P_client_request_4 + P_client_ack_4 + P_server_request_4_1 + P_server_request_4_2 + P_lb_routing_1_4 = 0
invariant :P_client_idle_5 + P_client_waiting_5 = 1
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal\_PT\_05\_flat\_flat,116176,0.531486,14864,2,2290,5,32457,6,0,419,29704,0
Total reachable state count : 116176

Verifying 16 reachability properties.
Reachability property SimpleLoadBal-PT-05-ReachabilityCardinality-00 does not hold.
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : SimpleLoadBal-PT-05-ReachabilityCardinality-00

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-05-ReachabilityCardinality-00,0,0.532349,14896,1,0,5,32457,7,0,429,29704,0
Reachability property SimpleLoadBal-PT-05-ReachabilityCardinality-01 does not hold.
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : SimpleLoadBal-PT-05-ReachabilityCardinality-01

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-05-ReachabilityCardinality-01,0,0.533543,15096,1,0,5,32457,8,0,436,29704,0
Invariant property SimpleLoadBal-PT-05-ReachabilityCardinality-02 is true.
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-02 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-05-ReachabilityCardinality-02,0,0.533799,15224,1,0,5,32457,9,0,437,29704,0
Invariant property SimpleLoadBal-PT-05-ReachabilityCardinality-03 is true.
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-03 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-05-ReachabilityCardinality-03,0,0.535319,15224,1,0,5,32457,10,0,441,29704,0
Invariant property SimpleLoadBal-PT-05-ReachabilityCardinality-04 is true.
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-04 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-05-ReachabilityCardinality-04,0,0.538216,15224,1,0,5,32457,11,0,450,29704,0
Reachability property SimpleLoadBal-PT-05-ReachabilityCardinality-05 does not hold.
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : SimpleLoadBal-PT-05-ReachabilityCardinality-05

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-05-ReachabilityCardinality-05,0,0.539459,15224,1,0,5,32457,12,0,468,29704,0
Reachability property SimpleLoadBal-PT-05-ReachabilityCardinality-06 does not hold.
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : SimpleLoadBal-PT-05-ReachabilityCardinality-06

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-05-ReachabilityCardinality-06,0,0.539702,15224,1,0,5,32457,13,0,469,29704,0
Invariant property SimpleLoadBal-PT-05-ReachabilityCardinality-07 is true.
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-07 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-05-ReachabilityCardinality-07,0,0.539924,15224,1,0,5,32457,14,0,470,29704,0
Invariant property SimpleLoadBal-PT-05-ReachabilityCardinality-08 is true.
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-05-ReachabilityCardinality-08,0,0.540211,15224,1,0,5,32457,15,0,471,29704,0
Invariant property SimpleLoadBal-PT-05-ReachabilityCardinality-09 is true.
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-09 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-05-ReachabilityCardinality-09,0,0.542198,15224,1,0,5,32457,16,0,475,29704,0
Reachability property SimpleLoadBal-PT-05-ReachabilityCardinality-10 does not hold.
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : SimpleLoadBal-PT-05-ReachabilityCardinality-10

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-05-ReachabilityCardinality-10,0,0.542364,15224,1,0,5,32457,17,0,476,29704,0
Reachability property SimpleLoadBal-PT-05-ReachabilityCardinality-11 does not hold.
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : SimpleLoadBal-PT-05-ReachabilityCardinality-11

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-05-ReachabilityCardinality-11,0,0.543482,15224,1,0,5,32457,18,0,479,29704,0
Invariant property SimpleLoadBal-PT-05-ReachabilityCardinality-12 is true.
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-05-ReachabilityCardinality-12,0,0.545022,15224,1,0,5,32457,19,0,493,29704,0
Invariant property SimpleLoadBal-PT-05-ReachabilityCardinality-13 is true.
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-05-ReachabilityCardinality-13,0,0.545444,15224,1,0,5,32457,20,0,500,29704,0
Reachability property SimpleLoadBal-PT-05-ReachabilityCardinality-14 does not hold.
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : SimpleLoadBal-PT-05-ReachabilityCardinality-14

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-05-ReachabilityCardinality-14,0,0.5473,15224,1,0,5,32457,21,0,508,29704,0
Reachability property SimpleLoadBal-PT-05-ReachabilityCardinality-15 does not hold.
FORMULA SimpleLoadBal-PT-05-ReachabilityCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : SimpleLoadBal-PT-05-ReachabilityCardinality-15

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
SimpleLoadBal-PT-05-ReachabilityCardinality-15,0,0.550138,15224,1,0,5,32457,22,0,516,29704,0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 140
// Phase 1: matrix 140 rows 59 cols
invariant :P_server_idle_2 + P_server_waiting_2 + P_server_processed_2 = 1
invariant :P_client_idle_3 + P_client_waiting_3 = 1
invariant :-1'P_client_waiting_3 + P_client_request_3 + P_client_ack_3 + P_server_request_3_1 + P_server_request_3_2 + P_lb_routing_1_3 = 0
invariant :P_client_idle_2 + P_client_waiting_2 = 1
invariant :-1'P_client_waiting_1 + -1'P_client_waiting_4 + P_client_request_1 + P_client_request_4 + P_client_ack_1 + P_client_ack_4 + -1'P_server_waiting_2 + -1'P_server_processed_2 + P_server_notification_ack_2 + P_server_request_1_1 + -1'P_server_request_2_2 + -1'P_server_request_3_2 + P_server_request_4_1 + -1'P_server_request_5_2 + P_lb_routing_1_1 + P_lb_routing_1_4 + -2'P_lb_load_2_0 + -1'P_lb_load_2_1 + P_lb_load_2_3 + 2'P_lb_load_2_4 + 3'P_lb_load_2_5 = -2
invariant :P_client_waiting_1 + P_client_waiting_2 + P_client_waiting_3 + P_client_waiting_4 + P_client_waiting_5 + -1'P_client_request_1 + -1'P_client_request_2 + -1'P_client_request_3 + -1'P_client_request_4 + -1'P_client_request_5 + -1'P_client_ack_1 + -1'P_client_ack_2 + -1'P_client_ack_3 + -1'P_client_ack_4 + -1'P_client_ack_5 + P_server_waiting_1 + P_server_waiting_2 + P_server_processed_1 + P_server_processed_2 + -1'P_server_notification_ack_1 + -1'P_server_notification_ack_2 + -1'P_lb_routing_1_1 + -1'P_lb_routing_1_2 + -1'P_lb_routing_1_3 + -1'P_lb_routing_1_4 + -1'P_lb_routing_1_5 + 3'P_lb_load_1_0 + 2'P_lb_load_1_1 + P_lb_load_1_2 + -1'P_lb_load_1_4 + -2'P_lb_load_1_5 + 2'P_lb_load_2_0 + P_lb_load_2_1 + -1'P_lb_load_2_3 + -2'P_lb_load_2_4 + -3'P_lb_load_2_5 = 5
invariant :-1'P_server_waiting_2 + P_server_notification_2 + P_server_notification_ack_2 = 0
invariant :P_server_idle_1 + P_server_waiting_1 + P_server_processed_1 = 1
invariant :P_client_idle_1 + P_client_waiting_1 = 1
invariant :-1'P_client_waiting_1 + -1'P_client_waiting_2 + -1'P_client_waiting_3 + -1'P_client_waiting_4 + -1'P_client_waiting_5 + P_client_request_1 + P_client_request_2 + P_client_request_3 + P_client_request_4 + P_client_request_5 + P_client_ack_1 + P_client_ack_2 + P_client_ack_3 + P_client_ack_4 + P_client_ack_5 + -1'P_server_waiting_1 + -1'P_server_waiting_2 + -1'P_server_processed_1 + -1'P_server_processed_2 + P_server_notification_ack_1 + P_server_notification_ack_2 + P_lb_routing_1_1 + P_lb_routing_1_2 + P_lb_routing_1_3 + P_lb_routing_1_4 + P_lb_routing_1_5 + -2'P_lb_load_1_0 + -1'P_lb_load_1_1 + P_lb_load_1_3 + 2'P_lb_load_1_4 + 3'P_lb_load_1_5 + -2'P_lb_load_2_0 + -1'P_lb_load_2_1 + P_lb_load_2_3 + 2'P_lb_load_2_4 + 3'P_lb_load_2_5 = -4
invariant :-1'P_client_waiting_5 + P_client_request_5 + P_client_ack_5 + P_server_request_5_1 + P_server_request_5_2 + P_lb_routing_1_5 = 0
invariant :P_client_waiting_4 + -1'P_client_request_4 + -1'P_client_ack_4 + P_server_waiting_2 + P_server_processed_2 + -1'P_server_notification_ack_2 + P_server_request_1_2 + P_server_request_2_2 + P_server_request_3_2 + -1'P_server_request_4_1 + P_server_request_5_2 + -1'P_lb_routing_1_4 + 2'P_lb_load_2_0 + P_lb_load_2_1 + -1'P_lb_load_2_3 + -2'P_lb_load_2_4 + -3'P_lb_load_2_5 = 2
invariant :-1'P_client_waiting_2 + P_client_request_2 + P_client_ack_2 + P_server_request_2_1 + P_server_request_2_2 + P_lb_routing_1_2 = 0
invariant :P_lb_idle_1 + P_lb_routing_1_1 + P_lb_routing_1_2 + P_lb_routing_1_3 + P_lb_routing_1_4 + P_lb_routing_1_5 + P_lb_balancing_1 = 1
invariant :P_lb_load_2_0 + P_lb_load_2_1 + P_lb_load_2_2 + P_lb_load_2_3 + P_lb_load_2_4 + P_lb_load_2_5 = 1
invariant :P_client_idle_4 + P_client_waiting_4 = 1
invariant :-1'P_server_waiting_1 + P_server_notification_1 + P_server_notification_ack_1 = 0
invariant :-1'P_client_waiting_4 + P_client_request_4 + P_client_ack_4 + P_server_request_4_1 + P_server_request_4_2 + P_lb_routing_1_4 = 0
invariant :P_client_idle_5 + P_client_waiting_5 = 1

BK_STOP 1553055893378

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 20, 2019 4:24:50 AM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 20, 2019 4:24:50 AM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 20, 2019 4:24:50 AM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 98 ms
Mar 20, 2019 4:24:50 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 59 places.
Mar 20, 2019 4:24:51 AM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 180 transitions.
Mar 20, 2019 4:24:51 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 34 ms
Mar 20, 2019 4:24:51 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 104 ms
Mar 20, 2019 4:24:51 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 71 ms
Mar 20, 2019 4:24:51 AM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 21 ms
Mar 20, 2019 4:24:51 AM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 0 ms
Mar 20, 2019 4:24:51 AM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 89 ms
Mar 20, 2019 4:24:51 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 180 transitions.
Mar 20, 2019 4:24:51 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 180 transitions.
Mar 20, 2019 4:24:52 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 19 place invariants in 37 ms
Mar 20, 2019 4:24:52 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 737 ms.
Mar 20, 2019 4:24:52 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-05-ReachabilityCardinality-00(UNSAT) depth K=0 took 6 ms
Mar 20, 2019 4:24:52 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-05-ReachabilityCardinality-01(UNSAT) depth K=0 took 11 ms
Mar 20, 2019 4:24:52 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-05-ReachabilityCardinality-02(UNSAT) depth K=0 took 21 ms
Mar 20, 2019 4:24:52 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
Mar 20, 2019 4:24:52 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-05-ReachabilityCardinality-03(UNSAT) depth K=0 took 11 ms
Mar 20, 2019 4:24:52 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property SimpleLoadBal-PT-05-ReachabilityCardinality-04(UNSAT) depth K=0 took 3 ms
Skipping mayMatrices nes/nds SMT push produced unexpected response (error "Error writing to Z3 solver: java.io.IOException: Broken pipe")
Mar 20, 2019 4:24:52 AM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
java.lang.RuntimeException: SMT push produced unexpected response (error "Error writing to Z3 solver: java.io.IOException: Broken pipe")
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:87)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.init(NecessaryEnablingsolver.java:71)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:471)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Mar 20, 2019 4:24:52 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying SimpleLoadBal-PT-05-ReachabilityCardinality-05 SMT depth 0
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
Mar 20, 2019 4:24:52 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 0
Mar 20, 2019 4:24:52 AM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 0
Mar 20, 2019 4:24:52 AM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 792ms conformant to PINS in folder :/home/mcc/execution
Mar 20, 2019 4:24:52 AM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 180 transitions.
Mar 20, 2019 4:24:52 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 19 place invariants in 26 ms
Mar 20, 2019 4:24:52 AM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 59 variables to be positive in 260 ms
Mar 20, 2019 4:24:52 AM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 0/ 16 properties. Interrupting other analysis methods.

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SimpleLoadBal-PT-05"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is SimpleLoadBal-PT-05, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r162-csrt-155286434000305"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SimpleLoadBal-PT-05.tgz
mv SimpleLoadBal-PT-05 execution
cd execution
if [ "ReachabilityCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;