fond
Model Checking Contest 2019
9th edition, Prague, Czech Republic, April 7, 2019 (TOOLympics)
Execution of r140-smll-155284912400097
Last Updated
Apr 15, 2019

About the Execution of ITS-Tools for Railroad-PT-010

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
1177.050 46507.00 100636.00 437.90 FFFFFFTFFFFFFFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2019-input.r140-smll-155284912400097.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2019-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
.......................
=====================================================================
Generated by BenchKit 2-3817
Executing tool itstools
Input is Railroad-PT-010, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r140-smll-155284912400097
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 252K
-rw-r--r-- 1 mcc users 3.4K Feb 12 12:02 CTLCardinality.txt
-rw-r--r-- 1 mcc users 18K Feb 12 12:02 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.3K Feb 8 14:23 CTLFireability.txt
-rw-r--r-- 1 mcc users 22K Feb 8 14:23 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 102 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 340 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.4K Feb 5 01:00 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.9K Feb 5 01:00 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Feb 4 22:47 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.3K Feb 4 22:47 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.7K Feb 4 14:57 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 18K Feb 4 14:57 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.1K Feb 1 11:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 1 11:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 4 22:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 4 22:30 UpperBounds.xml

-rw-r--r-- 1 mcc users 6 Jan 29 09:35 equiv_col
-rw-r--r-- 1 mcc users 4 Jan 29 09:35 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:35 iscolored
-rw-r--r-- 1 mcc users 78K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Railroad-PT-010-LTLFireability-00
FORMULA_NAME Railroad-PT-010-LTLFireability-01
FORMULA_NAME Railroad-PT-010-LTLFireability-02
FORMULA_NAME Railroad-PT-010-LTLFireability-03
FORMULA_NAME Railroad-PT-010-LTLFireability-04
FORMULA_NAME Railroad-PT-010-LTLFireability-05
FORMULA_NAME Railroad-PT-010-LTLFireability-06
FORMULA_NAME Railroad-PT-010-LTLFireability-07
FORMULA_NAME Railroad-PT-010-LTLFireability-08
FORMULA_NAME Railroad-PT-010-LTLFireability-09
FORMULA_NAME Railroad-PT-010-LTLFireability-10
FORMULA_NAME Railroad-PT-010-LTLFireability-11
FORMULA_NAME Railroad-PT-010-LTLFireability-12
FORMULA_NAME Railroad-PT-010-LTLFireability-13
FORMULA_NAME Railroad-PT-010-LTLFireability-14
FORMULA_NAME Railroad-PT-010-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1552934627559

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((((G("(((pl_P14_11>=1)&&(pl_P15_5>=1))&&(pl_P26_1>=1))"))U(X("(((pl_P14_6>=1)&&(pl_P15_10>=1))&&(pl_P26_1>=1))")))U(G(F("(((pl_P14_5>=1)&&(pl_P15_5>=1))&&(pl_P26_1>=1))")))))
Formula 0 simplified : !((G"(((pl_P14_11>=1)&&(pl_P15_5>=1))&&(pl_P26_1>=1))" U X"(((pl_P14_6>=1)&&(pl_P15_10>=1))&&(pl_P26_1>=1))") U GF"(((pl_P14_5>=1)&&(pl_P15_5>=1))&&(pl_P26_1>=1))")
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 156 rows 89 cols
invariant :pl_P15_6 + pl_P16_6 + pl_P46_1 + pl_P47_1 = 1
invariant :pl_P22_1 + pl_P26_1 + pl_P36_1 + pl_P37_1 + pl_P37_3 + pl_P48_1 + pl_P63_1 = 1
invariant :pl_P15_3 + pl_P16_3 + pl_P51_1 + pl_P56_1 = 1
invariant :pl_P52_1 + -1'pl_P56_1 = 0
invariant :pl_P14_1 + pl_P21_1 + pl_P36_1 + -1'pl_P48_1 + pl_P63_1 = 1
invariant :pl_P31_1 + -1'pl_P36_1 + -1'pl_P37_1 + -1'pl_P63_1 = 0
invariant :-1'pl_P22_1 + pl_P32_1 + -1'pl_P37_3 + -1'pl_P48_1 = 0
invariant :pl_P45_1 + pl_P51_1 + pl_P56_1 = 1
invariant :pl_P44_1 + -1'pl_P54_1 = 0
invariant :pl_P36_1 + pl_P37_1 + pl_P61_1 + pl_P62_1 + pl_P63_1 = 1
invariant :pl_P20_3 + pl_P21_1 + pl_P22_1 + pl_P63_1 = 1
invariant :pl_P30_1 + -1'pl_P47_1 = 0
invariant :pl_P0_1 + -1'pl_P6_1 = 0
invariant :pl_P15_8 + pl_P16_8 + -1'pl_P67_1 = 0
invariant :pl_P20_2 + -1'pl_P22_1 + -1'pl_P63_1 = 0
invariant :-3'pl_P14_10 + -4'pl_P14_11 + 5'pl_P14_2 + 4'pl_P14_3 + 3'pl_P14_4 + 2'pl_P14_5 + pl_P14_6 + -1'pl_P14_8 + -2'pl_P14_9 + -1'pl_P16_1 + -1'pl_P16_10 + -1'pl_P16_11 + -1'pl_P16_2 + -1'pl_P16_3 + -1'pl_P16_4 + -1'pl_P16_5 + -1'pl_P16_6 + -1'pl_P16_7 + -1'pl_P16_8 + -1'pl_P16_9 + -6'pl_P21_1 + -5'pl_P36_1 + pl_P37_1 + 6'pl_P48_1 + pl_P62_1 + -5'pl_P63_1 = -9
invariant :pl_P25_1 + pl_P60_1 + pl_P66_1 = 1
invariant :pl_P50_1 + pl_P58_1 + pl_P59_1 = 1
invariant :pl_P12_1 + -1'pl_P66_1 = 0
invariant :pl_P29_1 + pl_P58_1 + pl_P59_1 = 1
invariant :pl_P11_1 + pl_P21_1 + pl_P22_1 + pl_P63_1 = 1
invariant :pl_P15_2 + pl_P16_2 + -1'pl_P23_1 = 0
invariant :4'pl_P14_10 + 5'pl_P14_11 + -4'pl_P14_2 + -3'pl_P14_3 + -2'pl_P14_4 + -1'pl_P14_5 + pl_P14_7 + 2'pl_P14_8 + 3'pl_P14_9 + pl_P16_1 + pl_P16_10 + pl_P16_11 + pl_P16_2 + pl_P16_3 + pl_P16_4 + pl_P16_5 + pl_P16_6 + pl_P16_7 + pl_P16_8 + pl_P16_9 + 5'pl_P21_1 + 4'pl_P36_1 + -1'pl_P37_1 + -5'pl_P48_1 + -1'pl_P62_1 + 4'pl_P63_1 = 9
invariant :pl_P34_1 + pl_P54_1 + pl_P55_1 = 1
invariant :pl_P38_1 + pl_P3_1 + pl_P53_1 = 1
invariant :pl_P41_1 + -1'pl_P42_1 = 0
invariant :pl_P8_1 + -1'pl_P9_1 = 0
invariant :pl_P15_11 + pl_P16_11 = 0
invariant :pl_P15_4 + pl_P16_4 + -1'pl_P60_1 = 0
invariant :pl_P15_9 + pl_P16_9 + -1'pl_P53_1 = 0
invariant :pl_P20_1 + -1'pl_P21_1 = 0
invariant :pl_P17_1 + pl_P46_1 + pl_P47_1 = 1
invariant :pl_P15_7 + pl_P16_7 + -1'pl_P58_1 = 0
invariant :pl_P27_1 + -1'pl_P43_1 = 0
invariant :pl_P5_1 + pl_P67_1 + pl_P6_1 = 1
invariant :pl_P15_10 + pl_P16_10 + pl_P28_1 + pl_P43_1 = 1
invariant :pl_P10_1 + pl_P23_1 + pl_P9_1 = 1
invariant :pl_P2_1 + pl_P3_1 + pl_P53_1 = 1
invariant :pl_P15_1 + pl_P16_1 + -1'pl_P4_1 = 0
invariant :pl_P15_5 + pl_P16_5 + pl_P54_1 + pl_P55_1 = 1
invariant :pl_P40_1 + pl_P42_1 + pl_P4_1 = 1
invariant :pl_P19_1 + pl_P28_1 + pl_P43_1 = 1
Reverse transition relation is NOT exact ! Due to transitions tr_T28_1, tr_T37_10, tr_T37_2, tr_T37_3, tr_T37_4, tr_T37_5, tr_T37_6, tr_T37_7, tr_T37_8, tr_T37_9, tr_T4_1, Intersection with reachable at each step enabled. (destroyed/reverse/intersect/total) :10/135/11/156
3 unique states visited
3 strongly connected components in search stack
4 transitions explored
3 items max in DFS search stack
2687 ticks for the emptiness check
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
STATS,0,26.9142,504188,1,0,311,1.33179e+06,332,149,4825,1.73143e+06,325
an accepting run exists (use option '-e' to print it)
Formula 0 is FALSE accepting run found.
FORMULA Railroad-PT-010-LTLFireability-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL
Checking formula 1 : !((X((("((pl_P51_1>=1)&&(pl_P62_1>=1))")U("(((pl_P14_5>=1)&&(pl_P15_10>=1))&&(pl_P26_1>=1))"))U(F(X("(((pl_P14_7>=1)&&(pl_P15_8>=1))&&(pl_P26_1>=1))"))))))
Formula 1 simplified : !X(("((pl_P51_1>=1)&&(pl_P62_1>=1))" U "(((pl_P14_5>=1)&&(pl_P15_10>=1))&&(pl_P26_1>=1))") U FX"(((pl_P14_7>=1)&&(pl_P15_8>=1))&&(pl_P26_1>=1))")
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 2920 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 53 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((((LTLAP3==true))U((LTLAP4==true)))U(<>(X((LTLAP5==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 124 ms.
FORMULA Railroad-PT-010-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (<>((LTLAP6==true)))U((LTLAP7==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 184 ms.
FORMULA Railroad-PT-010-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, <>(X([]([](<>((LTLAP8==true)))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 271 ms.
FORMULA Railroad-PT-010-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, ((X((LTLAP9==true)))U(<>((LTLAP10==true))))U(<>((LTLAP11==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 323 ms.
FORMULA Railroad-PT-010-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP12==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 569 ms.
FORMULA Railroad-PT-010-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, ([]([](<>((LTLAP13==true)))))U((X((LTLAP14==true)))U(<>((LTLAP15==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 380 ms.
FORMULA Railroad-PT-010-LTLFireability-06 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](<>(([]((LTLAP16==true)))U(X((LTLAP17==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 401 ms.
FORMULA Railroad-PT-010-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP0==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 279 ms.
FORMULA Railroad-PT-010-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP18==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 340 ms.
FORMULA Railroad-PT-010-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP19==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 395 ms.
FORMULA Railroad-PT-010-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, (<>(X((LTLAP20==true))))U((LTLAP21==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 134 ms.
FORMULA Railroad-PT-010-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X([](X((LTLAP22==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 134 ms.
FORMULA Railroad-PT-010-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, ([](((LTLAP23==true))U((LTLAP24==true))))U(X((LTLAP25==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 314 ms.
FORMULA Railroad-PT-010-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP17==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 274 ms.
FORMULA Railroad-PT-010-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP26==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 154 ms.
FORMULA Railroad-PT-010-LTLFireability-15 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1552934674066

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 18, 2019 6:43:50 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 18, 2019 6:43:50 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 18, 2019 6:43:50 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 107 ms
Mar 18, 2019 6:43:50 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 118 places.
Mar 18, 2019 6:43:50 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 156 transitions.
Mar 18, 2019 6:43:50 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 28 ms
Mar 18, 2019 6:43:50 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 29 fixed domain variables (out of 118 variables) in GAL type Railroad_PT_010
Mar 18, 2019 6:43:50 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 29 constant array cells/variables (out of 118 variables) in type Railroad_PT_010
Mar 18, 2019 6:43:50 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: pl_P7_1,pl_P20_10,pl_P20_5,pl_P37_2,pl_P20_4,pl_P35_1,pl_P20_6,pl_P24_1,pl_P37_10,pl_P13_1,pl_P49_1,pl_P18_1,pl_P20_11,pl_P39_1,pl_P37_6,pl_P20_9,pl_P20_8,pl_P20_7,pl_P37_5,pl_P65_1,pl_P37_7,pl_P1_1,pl_P33_1,pl_P37_8,pl_P64_1,pl_P57_1,pl_P37_4,pl_P37_11,pl_P37_9,
Mar 18, 2019 6:43:50 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 29 fixed domain variables (out of 118 variables) in GAL type Railroad_PT_010
Mar 18, 2019 6:43:50 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 29 constant array cells/variables (out of 118 variables) in type Railroad_PT_010
Mar 18, 2019 6:43:50 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: pl_P7_1,pl_P20_10,pl_P20_5,pl_P37_2,pl_P20_4,pl_P35_1,pl_P20_6,pl_P24_1,pl_P37_10,pl_P13_1,pl_P49_1,pl_P18_1,pl_P20_11,pl_P39_1,pl_P37_6,pl_P20_9,pl_P20_8,pl_P20_7,pl_P37_5,pl_P65_1,pl_P37_7,pl_P1_1,pl_P33_1,pl_P37_8,pl_P64_1,pl_P57_1,pl_P37_4,pl_P37_11,pl_P37_9,
Mar 18, 2019 6:43:50 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed 29 constant variables :pl_P7_1=0, pl_P20_10=0, pl_P20_5=0, pl_P37_2=0, pl_P20_4=0, pl_P35_1=0, pl_P20_6=0, pl_P24_1=0, pl_P37_10=0, pl_P13_1=0, pl_P49_1=0, pl_P18_1=0, pl_P20_11=0, pl_P39_1=0, pl_P37_6=0, pl_P20_9=0, pl_P20_8=0, pl_P20_7=0, pl_P37_5=0, pl_P65_1=0, pl_P37_7=0, pl_P1_1=0, pl_P33_1=0, pl_P37_8=0, pl_P64_1=0, pl_P57_1=0, pl_P37_4=0, pl_P37_11=0, pl_P37_9=0
Mar 18, 2019 6:43:50 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 131 ms
Mar 18, 2019 6:43:50 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 7 ms
Mar 18, 2019 6:43:50 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 2 ms
Mar 18, 2019 6:43:51 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 156 transitions.
Mar 18, 2019 6:43:51 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 42 place invariants in 50 ms
Mar 18, 2019 6:43:51 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 89 variables to be positive in 321 ms
Mar 18, 2019 6:43:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 156 transitions.
Mar 18, 2019 6:43:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/156 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 18, 2019 6:43:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 25 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 18, 2019 6:43:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 156 transitions.
Mar 18, 2019 6:43:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 20 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 18, 2019 6:43:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 156 transitions.
Mar 18, 2019 6:43:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/156) took 28 ms. Total solver calls (SAT/UNSAT): 12(0/12)
Mar 18, 2019 6:43:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/156) took 3194 ms. Total solver calls (SAT/UNSAT): 1285(1048/237)
Mar 18, 2019 6:44:02 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(18/156) took 6200 ms. Total solver calls (SAT/UNSAT): 2215(1660/555)
Mar 18, 2019 6:44:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(25/156) took 9202 ms. Total solver calls (SAT/UNSAT): 2969(2286/683)
Mar 18, 2019 6:44:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(32/156) took 12346 ms. Total solver calls (SAT/UNSAT): 3694(2753/941)
Mar 18, 2019 6:44:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(42/156) took 15357 ms. Total solver calls (SAT/UNSAT): 4718(3724/994)
Mar 18, 2019 6:44:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(62/156) took 18554 ms. Total solver calls (SAT/UNSAT): 6690(5434/1256)
Mar 18, 2019 6:44:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(80/156) took 21561 ms. Total solver calls (SAT/UNSAT): 8123(6656/1467)
Mar 18, 2019 6:44:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(103/156) took 24600 ms. Total solver calls (SAT/UNSAT): 9482(7831/1651)
Mar 18, 2019 6:44:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(153/156) took 27603 ms. Total solver calls (SAT/UNSAT): 10604(8678/1926)
Mar 18, 2019 6:44:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 27665 ms. Total solver calls (SAT/UNSAT): 10605(8679/1926)
Mar 18, 2019 6:44:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 156 transitions.
Mar 18, 2019 6:44:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 1856 ms. Total solver calls (SAT/UNSAT): 1044(0/1044)
Mar 18, 2019 6:44:25 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 34636ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Railroad-PT-010"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3817"
echo " Executing tool itstools"
echo " Input is Railroad-PT-010, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r140-smll-155284912400097"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Railroad-PT-010.tgz
mv Railroad-PT-010 execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;