Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2019-input.r129-oct2-155274856700269.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2019-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
....................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is QuasiCertifProtocol-PT-06, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r129-oct2-155274856700269
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 384K
-rw-r--r-- 1 mcc users 3.8K Feb 12 10:31 CTLCardinality.txt
-rw-r--r-- 1 mcc users 17K Feb 12 10:31 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 8 12:39 CTLFireability.txt
-rw-r--r-- 1 mcc users 31K Feb 8 12:39 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 112 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 350 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 4.7K Feb 5 00:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 18K Feb 5 00:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 4 22:41 LTLFireability.txt
-rw-r--r-- 1 mcc users 11K Feb 4 22:41 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.5K Feb 4 13:55 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 39K Feb 4 13:55 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.5K Feb 1 10:18 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 1 10:18 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.5K Feb 4 22:26 UpperBounds.txt
-rw-r--r-- 1 mcc users 6.0K Feb 4 22:26 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 3 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 153K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-00
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-01
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-02
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-03
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-04
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-05
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-06
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-07
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-08
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-09
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-10
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-11
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-12
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-13
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-14
FORMULA_NAME QuasiCertifProtocol-PT-06-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1553957788923

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903171603/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903171603/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-00 with value :(!((((((((s2_1+s2_2)+s2_0)+s2_5)+s2_6)+s2_3)+s2_4)<=((((((s4_0+s4_2)+s4_1)+s4_4)+s4_3)+s4_5)+s4_6))||(!(((((((Cstart_5+Cstart_4)+Cstart_3)+Cstart_2)+Cstart_6)+Cstart_1)+Cstart_0)<=((((((n4_5+n4_6)+n4_3)+n4_4)+n4_1)+n4_2)+n4_0)))))
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-01 with value :(!((((((((((((((((((((((((((((((((((((((((((((((((((n9_2_0+n9_1_0)+n9_0_0)+n9_0_1)+n9_1_1)+n9_2_1)+n9_3_1)+n9_3_0)+n9_4_0)+n9_5_0)+n9_6_0)+n9_1_2)+n9_2_2)+n9_3_2)+n9_4_2)+n9_4_1)+n9_5_1)+n9_6_1)+n9_0_2)+n9_3_3)+n9_2_3)+n9_5_3)+n9_4_3)+n9_6_2)+n9_5_2)+n9_1_3)+n9_0_3)+n9_4_4)+n9_3_4)+n9_6_4)+n9_5_4)+n9_0_4)+n9_6_3)+n9_2_4)+n9_1_4)+n9_6_5)+n9_0_6)+n9_4_5)+n9_5_5)+n9_2_5)+n9_3_5)+n9_0_5)+n9_1_5)+n9_5_6)+n9_6_6)+n9_3_6)+n9_4_6)+n9_1_6)+n9_2_6)<=((((((SstopOK_2+SstopOK_3)+SstopOK_0)+SstopOK_1)+SstopOK_6)+SstopOK_4)+SstopOK_5))||(!(((((((SstopOK_2+SstopOK_3)+SstopOK_0)+SstopOK_1)+SstopOK_6)+SstopOK_4)+SstopOK_5)<=((((((n4_5+n4_6)+n4_3)+n4_4)+n4_1)+n4_2)+n4_0)))))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-02 with value :(!((((((((((((((((((((((((((((((((((((((((((((((((((n7_2_0+n7_1_0)+n7_0_0)+n7_3_1)+n7_2_1)+n7_1_1)+n7_0_1)+n7_6_0)+n7_5_0)+n7_4_0)+n7_3_0)+n7_6_2)+n7_5_2)+n7_1_3)+n7_0_3)+n7_3_3)+n7_2_3)+n7_5_3)+n7_4_3)+n7_5_1)+n7_4_1)+n7_0_2)+n7_6_1)+n7_2_2)+n7_1_2)+n7_4_2)+n7_3_2)+n7_0_5)+n7_1_5)+n7_2_5)+n7_3_5)+n7_4_5)+n7_5_5)+n7_6_5)+n7_0_6)+n7_6_3)+n7_0_4)+n7_1_4)+n7_2_4)+n7_3_4)+n7_4_4)+n7_5_4)+n7_6_4)+n7_4_6)+n7_3_6)+n7_2_6)+n7_1_6)+n7_6_6)+n7_5_6)>=2)&&((((((((s6_0+s6_1)+s6_2)+s6_3)+s6_5)+s6_4)+s6_6)<=SstopAbort)||(((((((((((((((((((((((((((((((((((((((((((((((((n7_2_0+n7_1_0)+n7_0_0)+n7_3_1)+n7_2_1)+n7_1_1)+n7_0_1)+n7_6_0)+n7_5_0)+n7_4_0)+n7_3_0)+n7_6_2)+n7_5_2)+n7_1_3)+n7_0_3)+n7_3_3)+n7_2_3)+n7_5_3)+n7_4_3)+n7_5_1)+n7_4_1)+n7_0_2)+n7_6_1)+n7_2_2)+n7_1_2)+n7_4_2)+n7_3_2)+n7_0_5)+n7_1_5)+n7_2_5)+n7_3_5)+n7_4_5)+n7_5_5)+n7_6_5)+n7_0_6)+n7_6_3)+n7_0_4)+n7_1_4)+n7_2_4)+n7_3_4)+n7_4_4)+n7_5_4)+n7_6_4)+n7_4_6)+n7_3_6)+n7_2_6)+n7_1_6)+n7_6_6)+n7_5_6)>=1))))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-03 with value :((!(((((((n3_3+n3_2)+n3_1)+n3_0)+n3_6)+n3_4)+n3_5)>=2))||(((((((SstopOK_2+SstopOK_3)+SstopOK_0)+SstopOK_1)+SstopOK_6)+SstopOK_4)+SstopOK_5)>=2))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-04 with value :(!((!(((((((SstopOK_2+SstopOK_3)+SstopOK_0)+SstopOK_1)+SstopOK_6)+SstopOK_4)+SstopOK_5)<=((((((Sstart_3+Sstart_2)+Sstart_1)+Sstart_0)+Sstart_6)+Sstart_5)+Sstart_4)))&&((CstopAbort<=((((((((((((((((((((((((((((((((((((((((((((((((n9_2_0+n9_1_0)+n9_0_0)+n9_0_1)+n9_1_1)+n9_2_1)+n9_3_1)+n9_3_0)+n9_4_0)+n9_5_0)+n9_6_0)+n9_1_2)+n9_2_2)+n9_3_2)+n9_4_2)+n9_4_1)+n9_5_1)+n9_6_1)+n9_0_2)+n9_3_3)+n9_2_3)+n9_5_3)+n9_4_3)+n9_6_2)+n9_5_2)+n9_1_3)+n9_0_3)+n9_4_4)+n9_3_4)+n9_6_4)+n9_5_4)+n9_0_4)+n9_6_3)+n9_2_4)+n9_1_4)+n9_6_5)+n9_0_6)+n9_4_5)+n9_5_5)+n9_2_5)+n9_3_5)+n9_0_5)+n9_1_5)+n9_5_6)+n9_6_6)+n9_3_6)+n9_4_6)+n9_1_6)+n9_2_6))||(SstopAbort>=3))))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-05 with value :((((AstopAbort>=3)||(((((((Cstart_5+Cstart_4)+Cstart_3)+Cstart_2)+Cstart_6)+Cstart_1)+Cstart_0)<=((((((((((((((((((((((((((((((((((((((((((((((((n7_2_0+n7_1_0)+n7_0_0)+n7_3_1)+n7_2_1)+n7_1_1)+n7_0_1)+n7_6_0)+n7_5_0)+n7_4_0)+n7_3_0)+n7_6_2)+n7_5_2)+n7_1_3)+n7_0_3)+n7_3_3)+n7_2_3)+n7_5_3)+n7_4_3)+n7_5_1)+n7_4_1)+n7_0_2)+n7_6_1)+n7_2_2)+n7_1_2)+n7_4_2)+n7_3_2)+n7_0_5)+n7_1_5)+n7_2_5)+n7_3_5)+n7_4_5)+n7_5_5)+n7_6_5)+n7_0_6)+n7_6_3)+n7_0_4)+n7_1_4)+n7_2_4)+n7_3_4)+n7_4_4)+n7_5_4)+n7_6_4)+n7_4_6)+n7_3_6)+n7_2_6)+n7_1_6)+n7_6_6)+n7_5_6)))&&((((((((n2_6+n2_5)+n2_4)+n2_3)+n2_2)+n2_1)+n2_0)<=((((((n6_1+n6_2)+n6_0)+n6_5)+n6_6)+n6_3)+n6_4))||(AstopOK>=2)))||((!(Astart>=3))||((((((((SstopOK_2+SstopOK_3)+SstopOK_0)+SstopOK_1)+SstopOK_6)+SstopOK_4)+SstopOK_5)>=3)&&(((((((((((((((((((((((((((((((((((((((((((((((((n8_2_0+n8_1_0)+n8_0_0)+n8_6_1)+n8_0_2)+n8_4_1)+n8_5_1)+n8_3_2)+n8_4_2)+n8_1_2)+n8_2_2)+n8_5_0)+n8_6_0)+n8_3_0)+n8_4_0)+n8_2_1)+n8_3_1)+n8_0_1)+n8_1_1)+n8_4_4)+n8_3_4)+n8_6_4)+n8_5_4)+n8_0_4)+n8_6_3)+n8_2_4)+n8_1_4)+n8_3_3)+n8_2_3)+n8_5_3)+n8_4_3)+n8_6_2)+n8_5_2)+n8_1_3)+n8_0_3)+n8_5_6)+n8_6_6)+n8_1_6)+n8_2_6)+n8_3_6)+n8_4_6)+n8_4_5)+n8_5_5)+n8_6_5)+n8_0_6)+n8_0_5)+n8_1_5)+n8_2_5)+n8_3_5)<=((((((s4_0+s4_2)+s4_1)+s4_4)+s4_3)+s4_5)+s4_6)))))
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-06 with value :(!((!(AstopOK>=2))||(!(((((((s4_0+s4_2)+s4_1)+s4_4)+s4_3)+s4_5)+s4_6)<=CstopAbort))))
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-07 with value :((((((((((Sstart_3+Sstart_2)+Sstart_1)+Sstart_0)+Sstart_6)+Sstart_5)+Sstart_4)>=3)&&(a4<=((((((n5_4+n5_5)+n5_2)+n5_3)+n5_0)+n5_1)+n5_6)))||((((((((((((((((((((((((((((((((((((((((((((((((((n7_2_0+n7_1_0)+n7_0_0)+n7_3_1)+n7_2_1)+n7_1_1)+n7_0_1)+n7_6_0)+n7_5_0)+n7_4_0)+n7_3_0)+n7_6_2)+n7_5_2)+n7_1_3)+n7_0_3)+n7_3_3)+n7_2_3)+n7_5_3)+n7_4_3)+n7_5_1)+n7_4_1)+n7_0_2)+n7_6_1)+n7_2_2)+n7_1_2)+n7_4_2)+n7_3_2)+n7_0_5)+n7_1_5)+n7_2_5)+n7_3_5)+n7_4_5)+n7_5_5)+n7_6_5)+n7_0_6)+n7_6_3)+n7_0_4)+n7_1_4)+n7_2_4)+n7_3_4)+n7_4_4)+n7_5_4)+n7_6_4)+n7_4_6)+n7_3_6)+n7_2_6)+n7_1_6)+n7_6_6)+n7_5_6)<=((((((s4_0+s4_2)+s4_1)+s4_4)+s4_3)+s4_5)+s4_6))&&(Astart>=3)))&&((((((((CstopOK_0+CstopOK_1)+CstopOK_6)+CstopOK_5)+CstopOK_4)+CstopOK_3)+CstopOK_2)>=1)&&(a1>=1)))
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-08 with value :(!(SstopOK_1<=n9_4_5))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-09 with value :(((n7_5_6>=1)||(!(a2>=3)))||(Sstart_1<=n8_1_1))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-10 with value :(n9_0_4<=n8_4_5)
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-11 with value :(n7_2_2<=n9_3_2)
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-12 with value :(!(((n7_3_6<=s2_3)||(a5>=2))&&((n7_0_2>=1)&&(n1_2>=3))))
Read [reachable] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-13 with value :((!((n7_0_5<=n9_2_2)||(c1_5>=2)))&&(((n8_3_1>=3)&&(n1_5<=n5_5))||(n1_1<=CstopOK_1)))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-14 with value :((((n3_5>=1)&&(n1_2>=1))&&(!(Sstart_3>=1)))||(((s4_1<=n9_5_3)&&(Cstart_1>=1))||(!(n6_4>=1))))
Read [invariant] property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-15 with value :(!(((CstopAbort<=n8_6_3)&&(s3_4>=1))||((n9_1_3>=1)&&(n3_4>=2))))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 116 rows 270 cols
invariant :n7_6_0 + -1'n7_6_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :malicious_reservoir + CstopAbort + -1's6_0 + -1's6_1 + -1's6_2 + -1's6_3 + -1's6_5 + -1's6_4 + -1's6_6 + -1's5_1 + -1's5_0 + -1's5_3 + -1's5_2 + -1's5_5 + -1's5_4 + -1's4_0 + -1's5_6 + -1's4_2 + -1's4_1 + -1's4_4 + -1's4_3 + -1's3_0 + -1's3_1 + -1's4_5 + -1's4_6 + -1's3_4 + -1's3_5 + -1's3_2 + -1's3_3 + -1's2_1 + -1's2_2 + -1's3_6 + -1's2_0 + -1's2_5 + -1's2_6 + -1's2_3 + -1's2_4 + -1'Sstart_3 + -1'Sstart_2 + -1'Sstart_1 + -1'Sstart_0 + -1'Sstart_6 + -1'Sstart_5 + -1'Sstart_4 + -1'SstopOK_2 + -1'SstopOK_3 + -1'SstopOK_0 + -1'SstopOK_1 + -1'SstopOK_6 + -1'SstopOK_4 + -1'SstopOK_5 = -4
invariant :n9_5_6 + CstopOK_6 + -1'SstopOK_5 = 0
invariant :n7_0_2 + -1'n7_0_4 + -1'n8_1_4 + n8_5_2 + -1'n8_5_5 + n8_1_5 = 0
invariant :n2_4 + -1'n2_2 + n1_4 + -1'n1_2 = 0
invariant :n9_4_1 + CstopOK_1 + -1'SstopOK_4 = 0
invariant :n9_2_1 + CstopOK_1 + -1'SstopOK_2 = 0
invariant :n9_5_2 + CstopOK_2 + -1'SstopOK_5 = 0
invariant :n3_3 + n4_3 + -1'n4_4 + -1'n3_4 = 0
invariant :n7_4_2 + -1'n7_4_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_4_0 + -1'n7_4_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_3_1 + -1'n7_3_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n8_4_6 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n4_5 + -1'n4_4 + -1'n3_4 + n3_5 = 0
invariant :n7_5_3 + -1'n7_5_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n7_6_2 + -1'n7_6_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_6_2 + -1'n8_5_2 + n8_5_5 + -1'n8_6_5 = 0
invariant :n8_2_1 + -1'n8_1_1 + n8_1_5 + -1'n8_2_5 = 0
invariant :n7_6_1 + -1'n7_6_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n5_3 + -1'n5_6 + -1'n6_6 + n6_3 = 0
invariant :n9_0_6 + CstopOK_6 + -1'SstopOK_0 = 0
invariant :Cstart_1 + -1'Cstart_0 + -1'n8_4_0 + n8_1_1 + n8_4_5 + -1'n8_1_5 = 0
invariant :n8_4_4 + -1'n8_1_4 + -1'n8_4_5 + n8_1_5 = 0
invariant :n3_0 + -1'n4_4 + n4_0 + -1'n3_4 = 0
invariant :n9_6_6 + CstopOK_6 + -1'SstopOK_6 = 0
invariant :n9_5_5 + CstopOK_5 + -1'SstopOK_5 = 0
invariant :Cstart_4 + -1'Cstart_0 + -1'n8_4_0 + n8_1_4 + n8_4_5 + -1'n8_1_5 = 0
invariant :n8_3_2 + -1'n8_5_2 + n8_5_5 + -1'n8_3_5 = 0
invariant :n9_2_3 + CstopOK_3 + -1'SstopOK_2 = 0
invariant :n8_3_3 + -1'n8_0_3 + n8_0_5 + -1'n8_3_5 = 0
invariant :n7_3_2 + -1'n7_3_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_5_6 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_1_0 + -1'n8_4_0 + n8_4_5 + -1'n8_1_5 = 0
invariant :n8_1_3 + -1'n8_0_3 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_6_1 + CstopOK_1 + -1'SstopOK_6 = 0
invariant :n2_6 + -1'n2_2 + n1_6 + -1'n1_2 = 0
invariant :n7_6_5 + -1'n7_6_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_1_2 + -1'n8_5_2 + n8_5_5 + -1'n8_1_5 = 0
invariant :n9_3_2 + CstopOK_2 + -1'SstopOK_3 = 0
invariant :n8_5_0 + -1'n8_4_0 + n8_4_5 + -1'n8_5_5 = 0
invariant :n7_0_6 + -1'n7_0_4 + -1'n8_1_4 + n8_0_6 + -1'n8_0_5 + n8_1_5 = 0
invariant :n9_0_2 + CstopOK_2 + -1'SstopOK_0 = 0
invariant :n9_0_5 + CstopOK_5 + -1'SstopOK_0 = 0
invariant :n9_1_1 + CstopOK_1 + -1'SstopOK_1 = 0
invariant :n8_0_0 + -1'n8_4_0 + n8_4_5 + -1'n8_0_5 = 0
invariant :n7_3_5 + -1'n7_3_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_2_4 + -1'n8_1_4 + n8_1_5 + -1'n8_2_5 = 0
invariant :n8_2_3 + -1'n8_0_3 + n8_0_5 + -1'n8_2_5 = 0
invariant :n7_2_3 + -1'n7_2_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n8_3_0 + -1'n8_4_0 + n8_4_5 + -1'n8_3_5 = 0
invariant :n7_5_1 + -1'n7_5_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n7_4_3 + -1'n7_4_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n5_5 + -1'n5_6 + n6_5 + -1'n6_6 = 0
invariant :n7_2_2 + -1'n7_2_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_2_4 + -1'n7_2_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n7_1_1 + -1'n7_1_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :Cstart_6 + -1'Cstart_0 + -1'n8_4_0 + n8_4_5 + n8_0_6 + -1'n8_0_5 = 0
invariant :Cstart_2 + -1'Cstart_0 + -1'n8_4_0 + n8_5_2 + n8_4_5 + -1'n8_5_5 = 0
invariant :n9_2_5 + CstopOK_5 + -1'SstopOK_2 = 0
invariant :n9_3_6 + CstopOK_6 + -1'SstopOK_3 = 0
invariant :n9_6_4 + CstopOK_4 + -1'SstopOK_6 = 0
invariant :n8_3_1 + -1'n8_1_1 + n8_1_5 + -1'n8_3_5 = 0
invariant :n7_5_5 + -1'n7_5_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n9_3_1 + CstopOK_1 + -1'SstopOK_3 = 0
invariant :n7_0_1 + -1'n7_0_4 + n8_1_1 + -1'n8_1_4 = 0
invariant :n9_6_5 + CstopOK_5 + -1'SstopOK_6 = 0
invariant :n7_3_0 + -1'n7_3_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_2_6 + -1'n8_0_6 + n8_0_5 + -1'n8_2_5 = 0
invariant :n9_6_3 + CstopOK_3 + -1'SstopOK_6 = 0
invariant :n7_0_5 + -1'n7_0_4 + -1'n8_1_4 + n8_1_5 = 0
invariant :n9_1_3 + CstopOK_3 + -1'SstopOK_1 = 0
invariant :Cstart_3 + -1'Cstart_0 + -1'n8_4_0 + n8_0_3 + n8_4_5 + -1'n8_0_5 = 0
invariant :n5_2 + n6_2 + -1'n5_6 + -1'n6_6 = 0
invariant :n9_0_4 + CstopOK_4 + -1'SstopOK_0 = 0
invariant :n7_0_0 + -1'n7_0_4 + n8_4_0 + -1'n8_1_4 + -1'n8_4_5 + n8_1_5 = 0
invariant :n9_3_0 + CstopOK_0 + -1'SstopOK_3 = 0
invariant :n8_5_1 + -1'n8_1_1 + -1'n8_5_5 + n8_1_5 = 0
invariant :n8_3_4 + -1'n8_1_4 + n8_1_5 + -1'n8_3_5 = 0
invariant :n8_1_6 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n5_4 + -1'n5_6 + -1'n6_6 + n6_4 = 0
invariant :n7_3_4 + -1'n7_3_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_1_0 + CstopOK_0 + -1'SstopOK_1 = 0
invariant :n8_0_4 + -1'n8_1_4 + -1'n8_0_5 + n8_1_5 = 0
invariant :n9_0_0 + CstopOK_0 + -1'SstopOK_0 = 0
invariant :n2_3 + -1'n2_2 + n1_3 + -1'n1_2 = 0
invariant :n9_4_4 + CstopOK_4 + -1'SstopOK_4 = 0
invariant :n7_5_4 + -1'n7_5_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_1_4 + CstopOK_4 + -1'SstopOK_1 = 0
invariant :n7_2_1 + -1'n7_2_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n4_6 + -1'n4_4 + n3_6 + -1'n3_4 = 0
invariant :n9_2_4 + CstopOK_4 + -1'SstopOK_2 = 0
invariant :c1_0 + c1_1 + c1_2 + c1_3 + c1_4 + c1_5 + c1_6 + CstopAbort + CstopOK_0 + CstopOK_1 + CstopOK_6 + CstopOK_5 + CstopOK_4 + CstopOK_3 + CstopOK_2 + 7'Cstart_0 + 6'n8_4_0 + -1'n8_1_1 + -1'n8_1_4 + -1'n8_5_2 + -1'n8_0_3 + -6'n8_4_5 + n8_5_5 + -1'n8_0_6 + 2'n8_0_5 + 2'n8_1_5 = 7
invariant :n3_2 + -1'n4_4 + n4_2 + -1'n3_4 = 0
invariant :n5_1 + n6_1 + -1'n5_6 + -1'n6_6 = 0
invariant :n9_3_3 + CstopOK_3 + -1'SstopOK_3 = 0
invariant :n9_4_2 + CstopOK_2 + -1'SstopOK_4 = 0
invariant :n7_1_4 + -1'n7_1_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :Cstart_5 + -1'Cstart_0 + -1'n8_4_0 + n8_4_5 = 0
invariant :n9_4_3 + CstopOK_3 + -1'SstopOK_4 = 0
invariant :n8_0_1 + -1'n8_1_1 + -1'n8_0_5 + n8_1_5 = 0
invariant :n9_6_0 + CstopOK_0 + -1'SstopOK_6 = 0
invariant :a5 + a2 + a4 + a3 + AstopAbort + a1 + Astart + AstopOK = 1
invariant :n9_0_3 + CstopOK_3 + -1'SstopOK_0 = 0
invariant :n5_0 + -1'n5_6 + n6_0 + -1'n6_6 = 0
invariant :n9_5_0 + CstopOK_0 + -1'SstopOK_5 = 0
invariant :n9_1_2 + CstopOK_2 + -1'SstopOK_1 = 0
invariant :n7_1_2 + -1'n7_1_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_6_4 + -1'n8_1_4 + -1'n8_6_5 + n8_1_5 = 0
invariant :n9_2_0 + CstopOK_0 + -1'SstopOK_2 = 0
invariant :n8_6_1 + -1'n8_1_1 + -1'n8_6_5 + n8_1_5 = 0
invariant :n9_2_6 + CstopOK_6 + -1'SstopOK_2 = 0
invariant :n2_5 + -1'n2_2 + n1_5 + -1'n1_2 = 0
invariant :n8_2_0 + -1'n8_4_0 + n8_4_5 + -1'n8_2_5 = 0
invariant :n9_3_4 + CstopOK_4 + -1'SstopOK_3 = 0
invariant :n7_2_5 + -1'n7_2_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_6_4 + -1'n7_6_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n7_6_3 + -1'n7_6_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n8_3_6 + -1'n8_0_6 + n8_0_5 + -1'n8_3_5 = 0
invariant :n8_6_6 + -1'n8_6_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_5_4 + -1'n8_1_4 + -1'n8_5_5 + n8_1_5 = 0
invariant :n9_6_2 + CstopOK_2 + -1'SstopOK_6 = 0
invariant :n7_1_5 + -1'n7_1_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n9_4_5 + CstopOK_5 + -1'SstopOK_4 = 0
invariant :n8_5_3 + -1'n8_0_3 + -1'n8_5_5 + n8_0_5 = 0
invariant :n7_4_4 + -1'n7_4_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_1_5 + CstopOK_5 + -1'SstopOK_1 = 0
invariant :n7_1_3 + -1'n7_1_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n8_6_3 + -1'n8_0_3 + -1'n8_6_5 + n8_0_5 = 0
invariant :n9_4_6 + CstopOK_6 + -1'SstopOK_4 = 0
invariant :n8_2_2 + -1'n8_5_2 + n8_5_5 + -1'n8_2_5 = 0
invariant :n9_5_4 + CstopOK_4 + -1'SstopOK_5 = 0
invariant :n9_0_1 + CstopOK_1 + -1'SstopOK_0 = 0
invariant :n8_4_3 + -1'n8_0_3 + -1'n8_4_5 + n8_0_5 = 0
invariant :n7_5_0 + -1'n7_5_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_4_1 + -1'n8_1_1 + -1'n8_4_5 + n8_1_5 = 0
invariant :n7_2_0 + -1'n7_2_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_5_2 + -1'n7_5_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n1_1 + -1'n2_2 + n2_1 + -1'n1_2 = 0
invariant :n3_1 + -1'n4_4 + n4_1 + -1'n3_4 = 0
invariant :n7_4_1 + -1'n7_4_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_2_2 + CstopOK_2 + -1'SstopOK_2 = 0
invariant :n7_4_5 + -1'n7_4_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_0_3 + -1'n7_0_4 + -1'n8_1_4 + n8_0_3 + -1'n8_0_5 + n8_1_5 = 0
invariant :n8_0_2 + -1'n8_5_2 + n8_5_5 + -1'n8_0_5 = 0
invariant :n1_0 + -1'n2_2 + n2_0 + -1'n1_2 = 0
invariant :n9_3_5 + CstopOK_5 + -1'SstopOK_3 = 0
invariant :n8_6_0 + -1'n8_4_0 + n8_4_5 + -1'n8_6_5 = 0
invariant :s6_0 + s6_1 + s6_2 + s6_3 + s6_5 + s6_4 + SstopAbort + s6_6 + s5_1 + s5_0 + s5_3 + s5_2 + s5_5 + s5_4 + s4_0 + s5_6 + s4_2 + s4_1 + s4_4 + s4_3 + s3_0 + s3_1 + s4_5 + s4_6 + s3_4 + s3_5 + s3_2 + s3_3 + s2_1 + s2_2 + s3_6 + s2_0 + s2_5 + s2_6 + s2_3 + s2_4 + Sstart_3 + Sstart_2 + Sstart_1 + Sstart_0 + Sstart_6 + Sstart_5 + Sstart_4 + SstopOK_2 + SstopOK_3 + SstopOK_0 + SstopOK_1 + SstopOK_6 + SstopOK_4 + SstopOK_5 = 7
invariant :n9_1_6 + CstopOK_6 + -1'SstopOK_1 = 0
invariant :n9_5_3 + CstopOK_3 + -1'SstopOK_5 = 0
invariant :n9_4_0 + CstopOK_0 + -1'SstopOK_4 = 0
invariant :n7_1_0 + -1'n7_1_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_4_2 + -1'n8_5_2 + -1'n8_4_5 + n8_5_5 = 0
invariant :n7_3_3 + -1'n7_3_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n9_5_1 + CstopOK_1 + -1'SstopOK_5 = 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 116 rows 270 cols
invariant :n7_6_0 + -1'n7_6_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :malicious_reservoir + CstopAbort + -1's6_0 + -1's6_1 + -1's6_2 + -1's6_3 + -1's6_5 + -1's6_4 + -1's6_6 + -1's5_1 + -1's5_0 + -1's5_3 + -1's5_2 + -1's5_5 + -1's5_4 + -1's4_0 + -1's5_6 + -1's4_2 + -1's4_1 + -1's4_4 + -1's4_3 + -1's3_0 + -1's3_1 + -1's4_5 + -1's4_6 + -1's3_4 + -1's3_5 + -1's3_2 + -1's3_3 + -1's2_1 + -1's2_2 + -1's3_6 + -1's2_0 + -1's2_5 + -1's2_6 + -1's2_3 + -1's2_4 + -1'Sstart_3 + -1'Sstart_2 + -1'Sstart_1 + -1'Sstart_0 + -1'Sstart_6 + -1'Sstart_5 + -1'Sstart_4 + -1'SstopOK_2 + -1'SstopOK_3 + -1'SstopOK_0 + -1'SstopOK_1 + -1'SstopOK_6 + -1'SstopOK_4 + -1'SstopOK_5 = -4
invariant :n9_5_6 + CstopOK_6 + -1'SstopOK_5 = 0
invariant :n7_0_2 + -1'n7_0_4 + -1'n8_1_4 + n8_5_2 + -1'n8_5_5 + n8_1_5 = 0
invariant :n2_4 + -1'n2_2 + n1_4 + -1'n1_2 = 0
invariant :n9_4_1 + CstopOK_1 + -1'SstopOK_4 = 0
invariant :n9_2_1 + CstopOK_1 + -1'SstopOK_2 = 0
invariant :n9_5_2 + CstopOK_2 + -1'SstopOK_5 = 0
invariant :n3_3 + n4_3 + -1'n4_4 + -1'n3_4 = 0
invariant :n7_4_2 + -1'n7_4_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_4_0 + -1'n7_4_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_3_1 + -1'n7_3_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n8_4_6 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n4_5 + -1'n4_4 + -1'n3_4 + n3_5 = 0
invariant :n7_5_3 + -1'n7_5_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n7_6_2 + -1'n7_6_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_6_2 + -1'n8_5_2 + n8_5_5 + -1'n8_6_5 = 0
invariant :n8_2_1 + -1'n8_1_1 + n8_1_5 + -1'n8_2_5 = 0
invariant :n7_6_1 + -1'n7_6_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n5_3 + -1'n5_6 + -1'n6_6 + n6_3 = 0
invariant :n9_0_6 + CstopOK_6 + -1'SstopOK_0 = 0
invariant :Cstart_1 + -1'Cstart_0 + -1'n8_4_0 + n8_1_1 + n8_4_5 + -1'n8_1_5 = 0
invariant :n8_4_4 + -1'n8_1_4 + -1'n8_4_5 + n8_1_5 = 0
invariant :n3_0 + -1'n4_4 + n4_0 + -1'n3_4 = 0
invariant :n9_6_6 + CstopOK_6 + -1'SstopOK_6 = 0
invariant :n9_5_5 + CstopOK_5 + -1'SstopOK_5 = 0
invariant :Cstart_4 + -1'Cstart_0 + -1'n8_4_0 + n8_1_4 + n8_4_5 + -1'n8_1_5 = 0
invariant :n8_3_2 + -1'n8_5_2 + n8_5_5 + -1'n8_3_5 = 0
invariant :n9_2_3 + CstopOK_3 + -1'SstopOK_2 = 0
invariant :n8_3_3 + -1'n8_0_3 + n8_0_5 + -1'n8_3_5 = 0
invariant :n7_3_2 + -1'n7_3_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_5_6 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_1_0 + -1'n8_4_0 + n8_4_5 + -1'n8_1_5 = 0
invariant :n8_1_3 + -1'n8_0_3 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_6_1 + CstopOK_1 + -1'SstopOK_6 = 0
invariant :n2_6 + -1'n2_2 + n1_6 + -1'n1_2 = 0
invariant :n7_6_5 + -1'n7_6_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_1_2 + -1'n8_5_2 + n8_5_5 + -1'n8_1_5 = 0
invariant :n9_3_2 + CstopOK_2 + -1'SstopOK_3 = 0
invariant :n8_5_0 + -1'n8_4_0 + n8_4_5 + -1'n8_5_5 = 0
invariant :n7_0_6 + -1'n7_0_4 + -1'n8_1_4 + n8_0_6 + -1'n8_0_5 + n8_1_5 = 0
invariant :n9_0_2 + CstopOK_2 + -1'SstopOK_0 = 0
invariant :n9_0_5 + CstopOK_5 + -1'SstopOK_0 = 0
invariant :n9_1_1 + CstopOK_1 + -1'SstopOK_1 = 0
invariant :n8_0_0 + -1'n8_4_0 + n8_4_5 + -1'n8_0_5 = 0
invariant :n7_3_5 + -1'n7_3_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_2_4 + -1'n8_1_4 + n8_1_5 + -1'n8_2_5 = 0
invariant :n8_2_3 + -1'n8_0_3 + n8_0_5 + -1'n8_2_5 = 0
invariant :n7_2_3 + -1'n7_2_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n8_3_0 + -1'n8_4_0 + n8_4_5 + -1'n8_3_5 = 0
invariant :n7_5_1 + -1'n7_5_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n7_4_3 + -1'n7_4_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n5_5 + -1'n5_6 + n6_5 + -1'n6_6 = 0
invariant :n7_2_2 + -1'n7_2_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_2_4 + -1'n7_2_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n7_1_1 + -1'n7_1_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :Cstart_6 + -1'Cstart_0 + -1'n8_4_0 + n8_4_5 + n8_0_6 + -1'n8_0_5 = 0
invariant :Cstart_2 + -1'Cstart_0 + -1'n8_4_0 + n8_5_2 + n8_4_5 + -1'n8_5_5 = 0
invariant :n9_2_5 + CstopOK_5 + -1'SstopOK_2 = 0
invariant :n9_3_6 + CstopOK_6 + -1'SstopOK_3 = 0
invariant :n9_6_4 + CstopOK_4 + -1'SstopOK_6 = 0
invariant :n8_3_1 + -1'n8_1_1 + n8_1_5 + -1'n8_3_5 = 0
invariant :n7_5_5 + -1'n7_5_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n9_3_1 + CstopOK_1 + -1'SstopOK_3 = 0
invariant :n7_0_1 + -1'n7_0_4 + n8_1_1 + -1'n8_1_4 = 0
invariant :n9_6_5 + CstopOK_5 + -1'SstopOK_6 = 0
invariant :n7_3_0 + -1'n7_3_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_2_6 + -1'n8_0_6 + n8_0_5 + -1'n8_2_5 = 0
invariant :n9_6_3 + CstopOK_3 + -1'SstopOK_6 = 0
invariant :n7_0_5 + -1'n7_0_4 + -1'n8_1_4 + n8_1_5 = 0
invariant :n9_1_3 + CstopOK_3 + -1'SstopOK_1 = 0
invariant :Cstart_3 + -1'Cstart_0 + -1'n8_4_0 + n8_0_3 + n8_4_5 + -1'n8_0_5 = 0
invariant :n5_2 + n6_2 + -1'n5_6 + -1'n6_6 = 0
invariant :n9_0_4 + CstopOK_4 + -1'SstopOK_0 = 0
invariant :n7_0_0 + -1'n7_0_4 + n8_4_0 + -1'n8_1_4 + -1'n8_4_5 + n8_1_5 = 0
invariant :n9_3_0 + CstopOK_0 + -1'SstopOK_3 = 0
invariant :n8_5_1 + -1'n8_1_1 + -1'n8_5_5 + n8_1_5 = 0
invariant :n8_3_4 + -1'n8_1_4 + n8_1_5 + -1'n8_3_5 = 0
invariant :n8_1_6 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n5_4 + -1'n5_6 + -1'n6_6 + n6_4 = 0
invariant :n7_3_4 + -1'n7_3_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_1_0 + CstopOK_0 + -1'SstopOK_1 = 0
invariant :n8_0_4 + -1'n8_1_4 + -1'n8_0_5 + n8_1_5 = 0
invariant :n9_0_0 + CstopOK_0 + -1'SstopOK_0 = 0
invariant :n2_3 + -1'n2_2 + n1_3 + -1'n1_2 = 0
invariant :n9_4_4 + CstopOK_4 + -1'SstopOK_4 = 0
invariant :n7_5_4 + -1'n7_5_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_1_4 + CstopOK_4 + -1'SstopOK_1 = 0
invariant :n7_2_1 + -1'n7_2_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n4_6 + -1'n4_4 + n3_6 + -1'n3_4 = 0
invariant :n9_2_4 + CstopOK_4 + -1'SstopOK_2 = 0
invariant :c1_0 + c1_1 + c1_2 + c1_3 + c1_4 + c1_5 + c1_6 + CstopAbort + CstopOK_0 + CstopOK_1 + CstopOK_6 + CstopOK_5 + CstopOK_4 + CstopOK_3 + CstopOK_2 + 7'Cstart_0 + 6'n8_4_0 + -1'n8_1_1 + -1'n8_1_4 + -1'n8_5_2 + -1'n8_0_3 + -6'n8_4_5 + n8_5_5 + -1'n8_0_6 + 2'n8_0_5 + 2'n8_1_5 = 7
invariant :n3_2 + -1'n4_4 + n4_2 + -1'n3_4 = 0
invariant :n5_1 + n6_1 + -1'n5_6 + -1'n6_6 = 0
invariant :n9_3_3 + CstopOK_3 + -1'SstopOK_3 = 0
invariant :n9_4_2 + CstopOK_2 + -1'SstopOK_4 = 0
invariant :n7_1_4 + -1'n7_1_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :Cstart_5 + -1'Cstart_0 + -1'n8_4_0 + n8_4_5 = 0
invariant :n9_4_3 + CstopOK_3 + -1'SstopOK_4 = 0
invariant :n8_0_1 + -1'n8_1_1 + -1'n8_0_5 + n8_1_5 = 0
invariant :n9_6_0 + CstopOK_0 + -1'SstopOK_6 = 0
invariant :a5 + a2 + a4 + a3 + AstopAbort + a1 + Astart + AstopOK = 1
invariant :n9_0_3 + CstopOK_3 + -1'SstopOK_0 = 0
invariant :n5_0 + -1'n5_6 + n6_0 + -1'n6_6 = 0
invariant :n9_5_0 + CstopOK_0 + -1'SstopOK_5 = 0
invariant :n9_1_2 + CstopOK_2 + -1'SstopOK_1 = 0
invariant :n7_1_2 + -1'n7_1_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_6_4 + -1'n8_1_4 + -1'n8_6_5 + n8_1_5 = 0
invariant :n9_2_0 + CstopOK_0 + -1'SstopOK_2 = 0
invariant :n8_6_1 + -1'n8_1_1 + -1'n8_6_5 + n8_1_5 = 0
invariant :n9_2_6 + CstopOK_6 + -1'SstopOK_2 = 0
invariant :n2_5 + -1'n2_2 + n1_5 + -1'n1_2 = 0
invariant :n8_2_0 + -1'n8_4_0 + n8_4_5 + -1'n8_2_5 = 0
invariant :n9_3_4 + CstopOK_4 + -1'SstopOK_3 = 0
invariant :n7_2_5 + -1'n7_2_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_6_4 + -1'n7_6_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n7_6_3 + -1'n7_6_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n8_3_6 + -1'n8_0_6 + n8_0_5 + -1'n8_3_5 = 0
invariant :n8_6_6 + -1'n8_6_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_5_4 + -1'n8_1_4 + -1'n8_5_5 + n8_1_5 = 0
invariant :n9_6_2 + CstopOK_2 + -1'SstopOK_6 = 0
invariant :n7_1_5 + -1'n7_1_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n9_4_5 + CstopOK_5 + -1'SstopOK_4 = 0
invariant :n8_5_3 + -1'n8_0_3 + -1'n8_5_5 + n8_0_5 = 0
invariant :n7_4_4 + -1'n7_4_6 + n8_1_4 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_1_5 + CstopOK_5 + -1'SstopOK_1 = 0
invariant :n7_1_3 + -1'n7_1_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n8_6_3 + -1'n8_0_3 + -1'n8_6_5 + n8_0_5 = 0
invariant :n9_4_6 + CstopOK_6 + -1'SstopOK_4 = 0
invariant :n8_2_2 + -1'n8_5_2 + n8_5_5 + -1'n8_2_5 = 0
invariant :n9_5_4 + CstopOK_4 + -1'SstopOK_5 = 0
invariant :n9_0_1 + CstopOK_1 + -1'SstopOK_0 = 0
invariant :n8_4_3 + -1'n8_0_3 + -1'n8_4_5 + n8_0_5 = 0
invariant :n7_5_0 + -1'n7_5_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_4_1 + -1'n8_1_1 + -1'n8_4_5 + n8_1_5 = 0
invariant :n7_2_0 + -1'n7_2_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_5_2 + -1'n7_5_6 + n8_5_2 + -1'n8_5_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n1_1 + -1'n2_2 + n2_1 + -1'n1_2 = 0
invariant :n3_1 + -1'n4_4 + n4_1 + -1'n3_4 = 0
invariant :n7_4_1 + -1'n7_4_6 + n8_1_1 + -1'n8_0_6 + n8_0_5 + -1'n8_1_5 = 0
invariant :n9_2_2 + CstopOK_2 + -1'SstopOK_2 = 0
invariant :n7_4_5 + -1'n7_4_6 + -1'n8_0_6 + n8_0_5 = 0
invariant :n7_0_3 + -1'n7_0_4 + -1'n8_1_4 + n8_0_3 + -1'n8_0_5 + n8_1_5 = 0
invariant :n8_0_2 + -1'n8_5_2 + n8_5_5 + -1'n8_0_5 = 0
invariant :n1_0 + -1'n2_2 + n2_0 + -1'n1_2 = 0
invariant :n9_3_5 + CstopOK_5 + -1'SstopOK_3 = 0
invariant :n8_6_0 + -1'n8_4_0 + n8_4_5 + -1'n8_6_5 = 0
invariant :s6_0 + s6_1 + s6_2 + s6_3 + s6_5 + s6_4 + SstopAbort + s6_6 + s5_1 + s5_0 + s5_3 + s5_2 + s5_5 + s5_4 + s4_0 + s5_6 + s4_2 + s4_1 + s4_4 + s4_3 + s3_0 + s3_1 + s4_5 + s4_6 + s3_4 + s3_5 + s3_2 + s3_3 + s2_1 + s2_2 + s3_6 + s2_0 + s2_5 + s2_6 + s2_3 + s2_4 + Sstart_3 + Sstart_2 + Sstart_1 + Sstart_0 + Sstart_6 + Sstart_5 + Sstart_4 + SstopOK_2 + SstopOK_3 + SstopOK_0 + SstopOK_1 + SstopOK_6 + SstopOK_4 + SstopOK_5 = 7
invariant :n9_1_6 + CstopOK_6 + -1'SstopOK_1 = 0
invariant :n9_5_3 + CstopOK_3 + -1'SstopOK_5 = 0
invariant :n9_4_0 + CstopOK_0 + -1'SstopOK_4 = 0
invariant :n7_1_0 + -1'n7_1_6 + n8_4_0 + -1'n8_4_5 + -1'n8_0_6 + n8_0_5 = 0
invariant :n8_4_2 + -1'n8_5_2 + -1'n8_4_5 + n8_5_5 = 0
invariant :n7_3_3 + -1'n7_3_6 + n8_0_3 + -1'n8_0_6 = 0
invariant :n9_5_1 + CstopOK_1 + -1'SstopOK_5 = 0
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-05 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-06 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-07 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-09 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol\_PT\_06\_flat\_flat,2.27196e+06,19.5992,487188,2,295765,5,2.80836e+06,6,0,1129,1.10607e+06,0
Total reachable state count : 2271960

Verifying 16 reachability properties.
Reachability property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-00

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-00,0,19.7224,487368,1,0,5,2.80836e+06,7,0,1340,1.10607e+06,0
Reachability property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-01

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-01,0,20.6918,487432,1,0,5,2.80836e+06,8,0,4876,1.10607e+06,0
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-02,1,20.7077,487432,2,271,6,2.80836e+06,9,0,4992,1.10607e+06,0
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-03,1,20.709,487432,2,271,7,2.80836e+06,10,0,5013,1.10607e+06,0
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-04 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-04,1,20.7981,487432,2,271,8,2.80836e+06,11,0,5166,1.10607e+06,0
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-05 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-05,0,20.8133,487432,1,0,8,2.80836e+06,12,0,5178,1.10607e+06,0
Reachability property QuasiCertifProtocol-PT-06-ReachabilityCardinality-06 does not hold.
No reachable states exhibit your property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-06

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-06,0,20.814,487432,1,0,8,2.80836e+06,13,0,5181,1.10607e+06,0
Reachability property QuasiCertifProtocol-PT-06-ReachabilityCardinality-07 does not hold.
No reachable states exhibit your property : QuasiCertifProtocol-PT-06-ReachabilityCardinality-07

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-07,0,21.9755,487432,1,0,8,2.80836e+06,14,0,14827,1.10607e+06,0
Reachability property QuasiCertifProtocol-PT-06-ReachabilityCardinality-08 is true.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-08 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-08,7560,22.0123,487432,2,18531,9,2.80836e+06,15,0,14831,1.10607e+06,0
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-09 is true.

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-09,0,22.0157,487432,1,0,9,2.80836e+06,16,0,14835,1.10607e+06,0
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-10 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-10 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-10,160,22.0712,487432,2,4482,10,2.80836e+06,17,0,14841,1.10607e+06,0
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-11 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-11 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-11,1,22.0774,487432,2,271,11,2.80836e+06,18,0,14845,1.10607e+06,0
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-12 is true.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-12,0,22.2285,487432,1,0,11,2.80836e+06,19,0,14853,1.10607e+06,0
Reachability property QuasiCertifProtocol-PT-06-ReachabilityCardinality-13 is true.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-13 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-13,1,22.2402,487432,2,271,11,2.80836e+06,20,0,14868,1.10607e+06,0
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-14 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-14,2268,22.265,487432,2,7457,12,2.80836e+06,21,0,14885,1.10607e+06,0
Invariant property QuasiCertifProtocol-PT-06-ReachabilityCardinality-15 does not hold.
FORMULA QuasiCertifProtocol-PT-06-ReachabilityCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
QuasiCertifProtocol-PT-06-ReachabilityCardinality-15,42,22.2674,487432,2,364,13,2.80836e+06,22,0,14894,1.10607e+06,0
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1553957813632

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 30, 2019 2:56:30 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 30, 2019 2:56:30 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 30, 2019 2:56:30 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 43 ms
Mar 30, 2019 2:56:30 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 270 places.
Mar 30, 2019 2:56:30 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 116 transitions.
Mar 30, 2019 2:56:30 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 12 ms
Mar 30, 2019 2:56:30 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 54 ms
Mar 30, 2019 2:56:30 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 27 ms
Mar 30, 2019 2:56:30 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 12 ms
Mar 30, 2019 2:56:30 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 39 ms
Mar 30, 2019 2:56:30 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 2 ms
Mar 30, 2019 2:56:30 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 116 transitions.
Mar 30, 2019 2:56:30 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 116 transitions.
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 155 place invariants in 50 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 437 ms.
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(UNSAT) depth K=0 took 10 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(UNSAT) depth K=0 took 13 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02(UNSAT) depth K=0 took 8 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03(UNSAT) depth K=0 took 0 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-04(UNSAT) depth K=0 took 9 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-05(UNSAT) depth K=0 took 6 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 116 transitions.
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-06(UNSAT) depth K=0 took 16 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-07(UNSAT) depth K=0 took 12 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-08(UNSAT) depth K=0 took 8 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-09(UNSAT) depth K=0 took 12 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-10(UNSAT) depth K=0 took 7 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-11(UNSAT) depth K=0 took 23 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-12(UNSAT) depth K=0 took 10 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-13(UNSAT) depth K=0 took 9 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 155 place invariants in 44 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-14(UNSAT) depth K=0 took 17 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-15(UNSAT) depth K=0 took 7 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(UNSAT) depth K=1 took 8 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(UNSAT) depth K=1 took 8 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02(UNSAT) depth K=1 took 8 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03(UNSAT) depth K=1 took 20 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-04(UNSAT) depth K=1 took 11 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-05(UNSAT) depth K=1 took 5 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-06(UNSAT) depth K=1 took 6 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-07(UNSAT) depth K=1 took 7 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-08(UNSAT) depth K=1 took 7 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-09(UNSAT) depth K=1 took 2 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-10(UNSAT) depth K=1 took 6 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-11(UNSAT) depth K=1 took 12 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-12(UNSAT) depth K=1 took 7 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-13(UNSAT) depth K=1 took 22 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-14(UNSAT) depth K=1 took 14 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-15(UNSAT) depth K=1 took 6 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(UNSAT) depth K=2 took 106 ms
Mar 30, 2019 2:56:31 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(UNSAT) depth K=2 took 364 ms
Mar 30, 2019 2:56:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02(UNSAT) depth K=2 took 678 ms
Mar 30, 2019 2:56:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03(UNSAT) depth K=2 took 100 ms
Mar 30, 2019 2:56:32 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 270 variables to be positive in 1570 ms
Mar 30, 2019 2:56:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-04(UNSAT) depth K=2 took 222 ms
Mar 30, 2019 2:56:33 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 270 variables to be positive in 2032 ms
Mar 30, 2019 2:56:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 116 transitions.
Mar 30, 2019 2:56:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/116 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 30, 2019 2:56:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 5 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 30, 2019 2:56:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 116 transitions.
Mar 30, 2019 2:56:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 5 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 30, 2019 2:56:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-05(UNSAT) depth K=2 took 143 ms
Mar 30, 2019 2:56:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-06(UNSAT) depth K=2 took 103 ms
Mar 30, 2019 2:56:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-07(UNSAT) depth K=2 took 87 ms
Mar 30, 2019 2:56:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-08(UNSAT) depth K=2 took 85 ms
Mar 30, 2019 2:56:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-00
Mar 30, 2019 2:56:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(SAT) depth K=0 took 543 ms
Mar 30, 2019 2:56:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-09(UNSAT) depth K=2 took 109 ms
Mar 30, 2019 2:56:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-10(UNSAT) depth K=2 took 228 ms
Mar 30, 2019 2:56:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-01
Mar 30, 2019 2:56:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(SAT) depth K=0 took 360 ms
Mar 30, 2019 2:56:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-11(UNSAT) depth K=2 took 79 ms
Mar 30, 2019 2:56:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-12(UNSAT) depth K=2 took 98 ms
Mar 30, 2019 2:56:33 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-13(UNSAT) depth K=2 took 89 ms
Mar 30, 2019 2:56:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-14(UNSAT) depth K=2 took 100 ms
Mar 30, 2019 2:56:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-15(UNSAT) depth K=2 took 110 ms
Mar 30, 2019 2:56:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-02
Mar 30, 2019 2:56:34 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02(SAT) depth K=0 took 721 ms
Mar 30, 2019 2:56:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-03
Mar 30, 2019 2:56:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03(SAT) depth K=0 took 1118 ms
Mar 30, 2019 2:56:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(UNSAT) depth K=3 took 1938 ms
Mar 30, 2019 2:56:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-04
Mar 30, 2019 2:56:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-04(SAT) depth K=0 took 2429 ms
Mar 30, 2019 2:56:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant QuasiCertifProtocol-PT-06-ReachabilityCardinality-05
Mar 30, 2019 2:56:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for QuasiCertifProtocol-PT-06-ReachabilityCardinality-05
Mar 30, 2019 2:56:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-05(TRUE) depth K=0 took 49 ms
Mar 30, 2019 2:56:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate QuasiCertifProtocol-PT-06-ReachabilityCardinality-06
Mar 30, 2019 2:56:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for QuasiCertifProtocol-PT-06-ReachabilityCardinality-06
Mar 30, 2019 2:56:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-06(FALSE) depth K=0 took 49 ms
Mar 30, 2019 2:56:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate QuasiCertifProtocol-PT-06-ReachabilityCardinality-07
Mar 30, 2019 2:56:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for QuasiCertifProtocol-PT-06-ReachabilityCardinality-07
Mar 30, 2019 2:56:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-07(FALSE) depth K=0 took 2491 ms
Mar 30, 2019 2:56:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-08
Mar 30, 2019 2:56:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-08(SAT) depth K=0 took 696 ms
Mar 30, 2019 2:56:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant QuasiCertifProtocol-PT-06-ReachabilityCardinality-09
Mar 30, 2019 2:56:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for QuasiCertifProtocol-PT-06-ReachabilityCardinality-09
Mar 30, 2019 2:56:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-09(TRUE) depth K=0 took 64 ms
Mar 30, 2019 2:56:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 116 transitions.
Mar 30, 2019 2:56:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-10
Mar 30, 2019 2:56:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-10(SAT) depth K=0 took 1070 ms
Mar 30, 2019 2:56:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/116) took 948 ms. Total solver calls (SAT/UNSAT): 98(98/0)
Mar 30, 2019 2:56:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-11
Mar 30, 2019 2:56:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-11(SAT) depth K=0 took 994 ms
Mar 30, 2019 2:56:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-12
Mar 30, 2019 2:56:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-12(SAT) depth K=0 took 407 ms
Mar 30, 2019 2:56:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(UNSAT) depth K=3 took 7885 ms
Mar 30, 2019 2:56:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-13
Mar 30, 2019 2:56:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-13(SAT) depth K=0 took 391 ms
Mar 30, 2019 2:56:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-14
Mar 30, 2019 2:56:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-14(SAT) depth K=0 took 387 ms
Mar 30, 2019 2:56:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-15
Mar 30, 2019 2:56:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-15(SAT) depth K=0 took 371 ms
Mar 30, 2019 2:56:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(4/116) took 4372 ms. Total solver calls (SAT/UNSAT): 480(480/0)
Mar 30, 2019 2:56:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-02(UNSAT) depth K=3 took 2336 ms
Mar 30, 2019 2:56:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-00
Mar 30, 2019 2:56:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-00(SAT) depth K=1 took 2372 ms
Mar 30, 2019 2:56:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-03(UNSAT) depth K=3 took 1931 ms
Mar 30, 2019 2:56:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesQuasiCertifProtocol-PT-06-ReachabilityCardinality-01
Mar 30, 2019 2:56:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property QuasiCertifProtocol-PT-06-ReachabilityCardinality-01(SAT) depth K=1 took 1430 ms
Mar 30, 2019 2:56:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(9/116) took 8039 ms. Total solver calls (SAT/UNSAT): 911(911/0)
Mar 30, 2019 2:56:53 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(14/116) took 11429 ms. Total solver calls (SAT/UNSAT): 1301(1301/0)
Mar 30, 2019 2:56:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
Mar 30, 2019 2:56:53 PM org.smtlib.impl.Script execute
WARNING: Script execution failed on command (declare-fun s0 () (Array Int Int)) with error
Mar 30, 2019 2:56:53 PM org.smtlib.impl.Script execute
WARNING: Script execution failed on command (assert (= 1 (+ (select s0 49) (select s0 53) (select s0 54) (select s0 55) (select s0 56) (select s0 60) (select s0 253) (select s0 267)))) with error (error "Failed to assert expression: java.io.IOException: Broken pipe (= 1 (+ (select s0 49) (select s0 53) (select s0 54) (select s0 55) (select s0 56) (select s0 60) (select s0 253) (select s0 267)))")
[(declare-fun s0 () (Array Int Int)), (assert (= 1 (+ (select s0 49) (select s0 53) (select s0 54) (select s0 55) (select s0 56) (select s0 60) (select s0 253) (select s0 267)))), (assert (>= (select s0 53) 1)), (assert (>= (select s0 49) 0)), (assert (>= (select s0 53) 0)), (assert (>= (select s0 54) 0)), (assert (>= (select s0 55) 0)), (assert (>= (select s0 56) 0)), (assert (>= (select s0 60) 0)), (assert (>= (select s0 253) 0)), (assert (>= (select s0 267) 0))]
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout when executing script :
org.smtlib.impl.Script@6ce6ec82
Mar 30, 2019 2:56:53 PM fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver checkSat
WARNING: SMT solver unexpectedly returned 'unknown' answer, retrying.
java.lang.RuntimeException: SMT solver raised an exception or timeout when executing script :
org.smtlib.impl.Script@6ce6ec82
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:448)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Mar 30, 2019 2:56:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying QuasiCertifProtocol-PT-06-ReachabilityCardinality-04 SMT depth 3
java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Mar 30, 2019 2:56:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
WARNING: Unexpected error occurred while running SMT. Was verifying QuasiCertifProtocol-PT-06-ReachabilityCardinality-02 K-induction depth 1
Exception in thread "Thread-8" java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:336)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an error :unknown
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:318)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:305)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.verify(KInductionSolver.java:573)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:301)
... 3 more
java.lang.RuntimeException: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: SMT solver raised an exception or timeout :(error "Solver has unexpectedly terminated")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.checkSat(NextBMCSolver.java:297)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:452)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
Mar 30, 2019 2:56:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 3
Mar 30, 2019 2:56:53 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 3
Mar 30, 2019 2:56:53 PM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 4/ 16 properties. Interrupting other analysis methods.
Mar 30, 2019 2:56:53 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 22735ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="QuasiCertifProtocol-PT-06"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is QuasiCertifProtocol-PT-06, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r129-oct2-155274856700269"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/QuasiCertifProtocol-PT-06.tgz
mv QuasiCertifProtocol-PT-06 execution
cd execution
if [ "ReachabilityCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;