fond
Model Checking Contest 2019
9th edition, Prague, Czech Republic, April 7, 2019 (TOOLympics)
Execution of r118-smll-155272319100079
Last Updated
Apr 15, 2019

About the Execution of ITS-Tools for Planning-PT-none

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
654.720 19017.00 45406.00 640.30 FFFFFFFFFFFFFFFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2019-input.r118-smll-155272319100079.qcow2', fmt=qcow2 size=4294967296 backing_file='/data/fkordon/mcc2019-input.qcow2' encryption=off cluster_size=65536 lazy_refcounts=off
Waiting for the VM to be ready (probing ssh)
....................
=====================================================================
Generated by BenchKit 2-3957
Executing tool itstools
Input is Planning-PT-none, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r118-smll-155272319100079
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 216K
-rw-r--r-- 1 mcc users 2.9K Feb 12 09:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 15K Feb 12 09:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 8 09:32 CTLFireability.txt
-rw-r--r-- 1 mcc users 14K Feb 8 09:32 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 103 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 341 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.4K Feb 5 00:33 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Feb 5 00:33 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.8K Feb 4 22:38 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.6K Feb 4 22:38 LTLFireability.xml
-rw-r--r-- 1 mcc users 2.9K Feb 4 12:43 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 14K Feb 4 12:43 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 1 08:06 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 1 08:06 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 4 22:23 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 4 22:23 UpperBounds.xml

-rw-r--r-- 1 mcc users 6 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 56K Mar 10 17:31 model.pnml
-rw-r--r-- 1 mcc users 1 Mar 10 17:31 unfinite

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Planning-PT-none-LTLFireability-00
FORMULA_NAME Planning-PT-none-LTLFireability-01
FORMULA_NAME Planning-PT-none-LTLFireability-02
FORMULA_NAME Planning-PT-none-LTLFireability-03
FORMULA_NAME Planning-PT-none-LTLFireability-04
FORMULA_NAME Planning-PT-none-LTLFireability-05
FORMULA_NAME Planning-PT-none-LTLFireability-06
FORMULA_NAME Planning-PT-none-LTLFireability-07
FORMULA_NAME Planning-PT-none-LTLFireability-08
FORMULA_NAME Planning-PT-none-LTLFireability-09
FORMULA_NAME Planning-PT-none-LTLFireability-10
FORMULA_NAME Planning-PT-none-LTLFireability-11
FORMULA_NAME Planning-PT-none-LTLFireability-12
FORMULA_NAME Planning-PT-none-LTLFireability-13
FORMULA_NAME Planning-PT-none-LTLFireability-14
FORMULA_NAME Planning-PT-none-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1552831991587

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLFireability.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLFireability.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLFireability.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLFireability.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !((G(F(G("((((p15>=1)&&(p44>=1))&&(p61>=1))&&(p81>=1))")))))
Formula 0 simplified : !GFG"((((p15>=1)&&(p44>=1))&&(p61>=1))&&(p81>=1))"
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 112
// Phase 1: matrix 112 rows 124 cols
invariant :p49 + p57 = 1
invariant :p18 + p5 = 1
invariant :p64 + p73 = 1
invariant :p17 + p4 = 1
invariant :p21 + p8 = 1
invariant :p67 + p78 = 1
invariant :p32 + p42 = 1
invariant :p16 + p3 = 1
invariant :p62 + p70 = 1
invariant :p31 + p41 = 1
invariant :p45 + p53 = 1
invariant :p68 + p80 = 1
invariant :p1 + -1'p70 + -1'p71 + -1'p73 + -1'p74 + -1'p77 + -1'p78 + -1'p80 + -1'p81 = -1
invariant :p28 + p38 = 1
invariant :p30 + p40 = 1
invariant :p35 + -1'p84 + -1'p85 + p92 + p93 = -1
invariant :p48 + p56 = 1
invariant :p46 + p54 = 1
invariant :p20 + p7 = 1
invariant :p50 + p58 = 1
invariant :p36 + -1'p82 + -1'p83 + p90 + p91 = -1
invariant :p10 + p70 + p71 + p73 + p74 + p77 + p78 + p80 + p81 = 2
invariant :p19 + p6 = 1
invariant :p47 + p55 = 1
invariant :p34 + -1'p86 + -1'p87 + p94 + p96 = -1
invariant :p66 + p77 = 1
invariant :p109 + p110 + p33 + -1'p88 + -1'p89 = -1
invariant :p69 + p81 = 1
invariant :p51 + p59 = 1
invariant :p13 + p84 + p85 + -1'p92 + -1'p93 = 2
invariant :p22 + p9 = 1
invariant :p29 + p39 = 1
invariant :p25 + p26 + p43 + -1'p60 + -1'p61 = 2
invariant :p63 + p71 = 1
invariant :p27 + p37 = 1
invariant :p15 + p2 = 1
invariant :p44 + p52 = 1
invariant :p12 + p86 + p87 + -1'p94 + -1'p96 = 2
invariant :p14 + p82 + p83 + -1'p90 + -1'p91 = 2
invariant :p108 + p43 = 1
invariant :p11 + p33 = 1
invariant :p65 + p74 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 2247 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 52 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, [](<>([]((LTLAP0==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 263 ms.
FORMULA Planning-PT-none-LTLFireability-00 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, []((LTLAP1==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 376 ms.
FORMULA Planning-PT-none-LTLFireability-01 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>((((LTLAP2==true))U((LTLAP3==true)))U([]([]((LTLAP4==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 141 ms.
FORMULA Planning-PT-none-LTLFireability-02 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(X((<>((LTLAP5==true)))U(X((LTLAP6==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 276 ms.
FORMULA Planning-PT-none-LTLFireability-03 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X([](([]((LTLAP7==true)))U(<>((LTLAP8==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 387 ms.
FORMULA Planning-PT-none-LTLFireability-04 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X([]((LTLAP9==true))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 239 ms.
FORMULA Planning-PT-none-LTLFireability-05 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, ([](X([]((LTLAP10==true)))))U((LTLAP11==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 60 ms.
FORMULA Planning-PT-none-LTLFireability-06 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP12==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 282 ms.
FORMULA Planning-PT-none-LTLFireability-07 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, [](X(X((LTLAP13==true)))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 72 ms.
FORMULA Planning-PT-none-LTLFireability-08 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP14==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 615 ms.
FORMULA Planning-PT-none-LTLFireability-09 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, ([](<>(X((LTLAP15==true)))))U((LTLAP16==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 263 ms.
FORMULA Planning-PT-none-LTLFireability-10 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, []((<>(X((LTLAP17==true))))U(<>(<>((LTLAP18==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 254 ms.
FORMULA Planning-PT-none-LTLFireability-11 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X((X((LTLAP16==true)))U([](<>((LTLAP19==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 255 ms.
FORMULA Planning-PT-none-LTLFireability-12 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, --when, --ltl, X(X(([]((LTLAP20==true)))U([]((LTLAP21==true))))), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 504 ms.
FORMULA Planning-PT-none-LTLFireability-13 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, <>((LTLAP22==true)), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 515 ms.
FORMULA Planning-PT-none-LTLFireability-14 FALSE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, --ltl, (LTLAP13==true), --buchi-type=spotba], workingDir=/home/mcc/execution]
LTSmin run took 103 ms.
FORMULA Planning-PT-none-LTLFireability-15 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1552832010604

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLFireability = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLFireability -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLFireability -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 17, 2019 2:13:14 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 17, 2019 2:13:14 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 17, 2019 2:13:14 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 70 ms
Mar 17, 2019 2:13:14 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 126 places.
Mar 17, 2019 2:13:14 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 128 transitions.
Mar 17, 2019 2:13:14 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 26 ms
Mar 17, 2019 2:13:15 PM fr.lip6.move.gal.instantiate.DomainAnalyzer computeVariableDomains
INFO: Found a total of 2 fixed domain variables (out of 126 variables) in GAL type Planning_PT_none
Mar 17, 2019 2:13:15 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: Found a total of 2 constant array cells/variables (out of 126 variables) in type Planning_PT_none
Mar 17, 2019 2:13:15 PM fr.lip6.move.gal.instantiate.Simplifier printConstantVars
INFO: p24,p23,
Mar 17, 2019 2:13:15 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Removed 2 constant variables :p24=1, p23=1
Mar 17, 2019 2:13:15 PM fr.lip6.move.gal.instantiate.Simplifier simplifyConstantVariables
INFO: Simplified 24 expressions due to constant valuations.
Mar 17, 2019 2:13:15 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 131 ms
Mar 17, 2019 2:13:15 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLFireability.pnml.gal : 6 ms
Mar 17, 2019 2:13:15 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLFireability.ltl : 3 ms
Mar 17, 2019 2:13:15 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 128 transitions.
Mar 17, 2019 2:13:16 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 42 place invariants in 54 ms
Mar 17, 2019 2:13:16 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 124 variables to be positive in 414 ms
Mar 17, 2019 2:13:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 128 transitions.
Mar 17, 2019 2:13:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/128 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 17, 2019 2:13:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 16 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 17, 2019 2:13:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 128 transitions.
Mar 17, 2019 2:13:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 14 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 17, 2019 2:13:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 128 transitions.
Mar 17, 2019 2:13:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(37/128) took 2052 ms. Total solver calls (SAT/UNSAT): 1123(1000/123)
Mar 17, 2019 2:13:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 3306 ms. Total solver calls (SAT/UNSAT): 1464(1274/190)
Mar 17, 2019 2:13:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 128 transitions.
Mar 17, 2019 2:13:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 1280 ms. Total solver calls (SAT/UNSAT): 164(0/164)
Mar 17, 2019 2:13:21 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 6564ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Planning-PT-none"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3957"
echo " Executing tool itstools"
echo " Input is Planning-PT-none, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r118-smll-155272319100079"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Planning-PT-none.tgz
mv Planning-PT-none execution
cd execution
if [ "LTLFireability" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLFireability" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;