Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2019-input.r107-oct2-155272231100501.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2019-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..............................................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is Peterson-COL-5, examination is LTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r107-oct2-155272231100501
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 212K
-rw-r--r-- 1 mcc users 3.8K Feb 12 04:17 CTLCardinality.txt
-rw-r--r-- 1 mcc users 20K Feb 12 04:17 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Feb 8 03:27 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 8 03:27 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 101 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 339 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.7K Feb 5 00:25 LTLCardinality.txt
-rw-r--r-- 1 mcc users 13K Feb 5 00:25 LTLCardinality.xml
-rw-r--r-- 1 mcc users 1.9K Feb 4 22:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.8K Feb 4 22:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.5K Feb 4 08:00 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 17K Feb 4 08:00 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 1 02:18 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 1 02:18 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 4 22:22 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 4 22:22 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 equiv_pt
-rw-r--r-- 1 mcc users 2 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 45K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-COL-5-LTLCardinality-00
FORMULA_NAME Peterson-COL-5-LTLCardinality-01
FORMULA_NAME Peterson-COL-5-LTLCardinality-02
FORMULA_NAME Peterson-COL-5-LTLCardinality-03
FORMULA_NAME Peterson-COL-5-LTLCardinality-04
FORMULA_NAME Peterson-COL-5-LTLCardinality-05
FORMULA_NAME Peterson-COL-5-LTLCardinality-06
FORMULA_NAME Peterson-COL-5-LTLCardinality-07
FORMULA_NAME Peterson-COL-5-LTLCardinality-08
FORMULA_NAME Peterson-COL-5-LTLCardinality-09
FORMULA_NAME Peterson-COL-5-LTLCardinality-10
FORMULA_NAME Peterson-COL-5-LTLCardinality-11
FORMULA_NAME Peterson-COL-5-LTLCardinality-12
FORMULA_NAME Peterson-COL-5-LTLCardinality-13
FORMULA_NAME Peterson-COL-5-LTLCardinality-14
FORMULA_NAME Peterson-COL-5-LTLCardinality-15

=== Now, execution of the tool begins

BK_START 1552935099222

18:52:04.924 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
18:52:04.930 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64, --gc-threshold, 2000000, -i, /home/mcc/execution/LTLCardinality.pnml.gal, -t, CGAL, -LTL, /home/mcc/execution/LTLCardinality.ltl, -c, -stutter-deadlock], workingDir=/home/mcc/execution]

its-ltl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ltl-linux64 --gc-threshold 2000000 -i /home/mcc/execution/LTLCardinality.pnml.gal -t CGAL -LTL /home/mcc/execution/LTLCardinality.ltl -c -stutter-deadlock
Read 16 LTL properties
Checking formula 0 : !(((G(G("((((((((((((((((((((((((((((((turn_0+turn_1)+turn_2)+turn_3)+turn_4)+turn_5)+turn_6)+turn_7)+turn_8)+turn_9)+turn_10)+turn_11)+turn_12)+turn_13)+turn_14)+turn_15)+turn_16)+turn_17)+turn_18)+turn_19)+turn_20)+turn_21)+turn_22)+turn_23)+turn_24)+turn_25)+turn_26)+turn_27)+turn_28)+turn_29)>=1)")))U(G("((((((((((((wantSection_0+wantSection_1)+wantSection_2)+wantSection_3)+wantSection_4)+wantSection_5)+wantSection_6)+wantSection_7)+wantSection_8)+wantSection_9)+wantSection_10)+wantSection_11)>=2)"))))
Formula 0 simplified : !(G"((((((((((((((((((((((((((((((turn_0+turn_1)+turn_2)+turn_3)+turn_4)+turn_5)+turn_6)+turn_7)+turn_8)+turn_9)+turn_10)+turn_11)+turn_12)+turn_13)+turn_14)+turn_15)+turn_16)+turn_17)+turn_18)+turn_19)+turn_20)+turn_21)+turn_22)+turn_23)+turn_24)+turn_25)+turn_26)+turn_27)+turn_28)+turn_29)>=1)" U G"((((((((((((wantSection_0+wantSection_1)+wantSection_2)+wantSection_3)+wantSection_4)+wantSection_5)+wantSection_6)+wantSection_7)+wantSection_8)+wantSection_9)+wantSection_10)+wantSection_11)>=2)")
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
Normalized transition count is 1182
// Phase 1: matrix 1182 rows 864 cols
invariant :wantSection_6 + wantSection_7 = 1
invariant :-1'wantSection_3 + askForSection_5 + askForSection_6 + askForSection_7 + askForSection_8 + askForSection_9 + testTurn_5 + testTurn_6 + testTurn_7 + testTurn_8 + testTurn_9 + beginLoop_30 + beginLoop_31 + beginLoop_32 + beginLoop_33 + beginLoop_34 + beginLoop_35 + beginLoop_36 + beginLoop_37 + beginLoop_38 + beginLoop_39 + beginLoop_40 + beginLoop_41 + beginLoop_42 + beginLoop_43 + beginLoop_44 + beginLoop_45 + beginLoop_46 + beginLoop_47 + beginLoop_48 + beginLoop_49 + beginLoop_50 + beginLoop_51 + beginLoop_52 + beginLoop_53 + beginLoop_54 + beginLoop_55 + beginLoop_56 + beginLoop_57 + beginLoop_58 + beginLoop_59 + endTurn_5 + endTurn_6 + endTurn_7 + endTurn_8 + endTurn_9 + CS_1 + testIdentity_30 + testIdentity_31 + testIdentity_32 + testIdentity_33 + testIdentity_34 + testIdentity_35 + testIdentity_36 + testIdentity_37 + testIdentity_38 + testIdentity_39 + testIdentity_40 + testIdentity_41 + testIdentity_42 + testIdentity_43 + testIdentity_44 + testIdentity_45 + testIdentity_46 + testIdentity_47 + testIdentity_48 + testIdentity_49 + testIdentity_50 + testIdentity_51 + testIdentity_52 + testIdentity_53 + testIdentity_54 + testIdentity_55 + testIdentity_56 + testIdentity_57 + testIdentity_58 + testIdentity_59 + testAlone_30 + testAlone_31 + testAlone_32 + testAlone_33 + testAlone_34 + testAlone_35 + testAlone_36 + testAlone_37 + testAlone_38 + testAlone_39 + testAlone_40 + testAlone_41 + testAlone_42 + testAlone_43 + testAlone_44 + testAlone_45 + testAlone_46 + testAlone_47 + testAlone_48 + testAlone_49 + testAlone_50 + testAlone_51 + testAlone_52 + testAlone_53 + testAlone_54 + testAlone_55 + testAlone_56 + testAlone_57 + testAlone_58 + testAlone_59 + isEndLoop_30 + isEndLoop_31 + isEndLoop_32 + isEndLoop_33 + isEndLoop_34 + isEndLoop_35 + isEndLoop_36 + isEndLoop_37 + isEndLoop_38 + isEndLoop_39 + isEndLoop_40 + isEndLoop_41 + isEndLoop_42 + isEndLoop_43 + isEndLoop_44 + isEndLoop_45 + isEndLoop_46 + isEndLoop_47 + isEndLoop_48 + isEndLoop_49 + isEndLoop_50 + isEndLoop_51 + isEndLoop_52 + isEndLoop_53 + isEndLoop_54 + isEndLoop_55 + isEndLoop_56 + isEndLoop_57 + isEndLoop_58 + isEndLoop_59 = 0
invariant :idle_0 + wantSection_1 = 1
invariant :-1'wantSection_7 + askForSection_15 + askForSection_16 + askForSection_17 + askForSection_18 + askForSection_19 + testTurn_15 + testTurn_16 + testTurn_17 + testTurn_18 + testTurn_19 + beginLoop_90 + beginLoop_91 + beginLoop_92 + beginLoop_93 + beginLoop_94 + beginLoop_95 + beginLoop_96 + beginLoop_97 + beginLoop_98 + beginLoop_99 + beginLoop_100 + beginLoop_101 + beginLoop_102 + beginLoop_103 + beginLoop_104 + beginLoop_105 + beginLoop_106 + beginLoop_107 + beginLoop_108 + beginLoop_109 + beginLoop_110 + beginLoop_111 + beginLoop_112 + beginLoop_113 + beginLoop_114 + beginLoop_115 + beginLoop_116 + beginLoop_117 + beginLoop_118 + beginLoop_119 + endTurn_15 + endTurn_16 + endTurn_17 + endTurn_18 + endTurn_19 + CS_3 + testIdentity_90 + testIdentity_91 + testIdentity_92 + testIdentity_93 + testIdentity_94 + testIdentity_95 + testIdentity_96 + testIdentity_97 + testIdentity_98 + testIdentity_99 + testIdentity_100 + testIdentity_101 + testIdentity_102 + testIdentity_103 + testIdentity_104 + testIdentity_105 + testIdentity_106 + testIdentity_107 + testIdentity_108 + testIdentity_109 + testIdentity_110 + testIdentity_111 + testIdentity_112 + testIdentity_113 + testIdentity_114 + testIdentity_115 + testIdentity_116 + testIdentity_117 + testIdentity_118 + testIdentity_119 + testAlone_90 + testAlone_91 + testAlone_92 + testAlone_93 + testAlone_94 + testAlone_95 + testAlone_96 + testAlone_97 + testAlone_98 + testAlone_99 + testAlone_100 + testAlone_101 + testAlone_102 + testAlone_103 + testAlone_104 + testAlone_105 + testAlone_106 + testAlone_107 + testAlone_108 + testAlone_109 + testAlone_110 + testAlone_111 + testAlone_112 + testAlone_113 + testAlone_114 + testAlone_115 + testAlone_116 + testAlone_117 + testAlone_118 + testAlone_119 + isEndLoop_90 + isEndLoop_91 + isEndLoop_92 + isEndLoop_93 + isEndLoop_94 + isEndLoop_95 + isEndLoop_96 + isEndLoop_97 + isEndLoop_98 + isEndLoop_99 + isEndLoop_100 + isEndLoop_101 + isEndLoop_102 + isEndLoop_103 + isEndLoop_104 + isEndLoop_105 + isEndLoop_106 + isEndLoop_107 + isEndLoop_108 + isEndLoop_109 + isEndLoop_110 + isEndLoop_111 + isEndLoop_112 + isEndLoop_113 + isEndLoop_114 + isEndLoop_115 + isEndLoop_116 + isEndLoop_117 + isEndLoop_118 + isEndLoop_119 = 0
invariant :turn_6 + turn_7 + turn_8 + turn_9 + turn_10 + turn_11 = 1
invariant :turn_24 + turn_25 + turn_26 + turn_27 + turn_28 + turn_29 = 1
invariant :idle_2 + wantSection_5 = 1
invariant :wantSection_4 + wantSection_5 = 1
invariant :idle_5 + wantSection_11 = 1
invariant :turn_12 + turn_13 + turn_14 + turn_15 + turn_16 + turn_17 = 1
invariant :turn_18 + turn_19 + turn_20 + turn_21 + turn_22 + turn_23 = 1
invariant :-1'wantSection_1 + askForSection_0 + askForSection_1 + askForSection_2 + askForSection_3 + askForSection_4 + testTurn_0 + testTurn_1 + testTurn_2 + testTurn_3 + testTurn_4 + beginLoop_0 + beginLoop_1 + beginLoop_2 + beginLoop_3 + beginLoop_4 + beginLoop_5 + beginLoop_6 + beginLoop_7 + beginLoop_8 + beginLoop_9 + beginLoop_10 + beginLoop_11 + beginLoop_12 + beginLoop_13 + beginLoop_14 + beginLoop_15 + beginLoop_16 + beginLoop_17 + beginLoop_18 + beginLoop_19 + beginLoop_20 + beginLoop_21 + beginLoop_22 + beginLoop_23 + beginLoop_24 + beginLoop_25 + beginLoop_26 + beginLoop_27 + beginLoop_28 + beginLoop_29 + endTurn_0 + endTurn_1 + endTurn_2 + endTurn_3 + endTurn_4 + CS_0 + testIdentity_0 + testIdentity_1 + testIdentity_2 + testIdentity_3 + testIdentity_4 + testIdentity_5 + testIdentity_6 + testIdentity_7 + testIdentity_8 + testIdentity_9 + testIdentity_10 + testIdentity_11 + testIdentity_12 + testIdentity_13 + testIdentity_14 + testIdentity_15 + testIdentity_16 + testIdentity_17 + testIdentity_18 + testIdentity_19 + testIdentity_20 + testIdentity_21 + testIdentity_22 + testIdentity_23 + testIdentity_24 + testIdentity_25 + testIdentity_26 + testIdentity_27 + testIdentity_28 + testIdentity_29 + testAlone_0 + testAlone_1 + testAlone_2 + testAlone_3 + testAlone_4 + testAlone_5 + testAlone_6 + testAlone_7 + testAlone_8 + testAlone_9 + testAlone_10 + testAlone_11 + testAlone_12 + testAlone_13 + testAlone_14 + testAlone_15 + testAlone_16 + testAlone_17 + testAlone_18 + testAlone_19 + testAlone_20 + testAlone_21 + testAlone_22 + testAlone_23 + testAlone_24 + testAlone_25 + testAlone_26 + testAlone_27 + testAlone_28 + testAlone_29 + isEndLoop_0 + isEndLoop_1 + isEndLoop_2 + isEndLoop_3 + isEndLoop_4 + isEndLoop_5 + isEndLoop_6 + isEndLoop_7 + isEndLoop_8 + isEndLoop_9 + isEndLoop_10 + isEndLoop_11 + isEndLoop_12 + isEndLoop_13 + isEndLoop_14 + isEndLoop_15 + isEndLoop_16 + isEndLoop_17 + isEndLoop_18 + isEndLoop_19 + isEndLoop_20 + isEndLoop_21 + isEndLoop_22 + isEndLoop_23 + isEndLoop_24 + isEndLoop_25 + isEndLoop_26 + isEndLoop_27 + isEndLoop_28 + isEndLoop_29 = 0
invariant :wantSection_10 + wantSection_11 = 1
invariant :idle_1 + wantSection_3 = 1
invariant :-1'wantSection_5 + askForSection_10 + askForSection_11 + askForSection_12 + askForSection_13 + askForSection_14 + testTurn_10 + testTurn_11 + testTurn_12 + testTurn_13 + testTurn_14 + beginLoop_60 + beginLoop_61 + beginLoop_62 + beginLoop_63 + beginLoop_64 + beginLoop_65 + beginLoop_66 + beginLoop_67 + beginLoop_68 + beginLoop_69 + beginLoop_70 + beginLoop_71 + beginLoop_72 + beginLoop_73 + beginLoop_74 + beginLoop_75 + beginLoop_76 + beginLoop_77 + beginLoop_78 + beginLoop_79 + beginLoop_80 + beginLoop_81 + beginLoop_82 + beginLoop_83 + beginLoop_84 + beginLoop_85 + beginLoop_86 + beginLoop_87 + beginLoop_88 + beginLoop_89 + endTurn_10 + endTurn_11 + endTurn_12 + endTurn_13 + endTurn_14 + CS_2 + testIdentity_60 + testIdentity_61 + testIdentity_62 + testIdentity_63 + testIdentity_64 + testIdentity_65 + testIdentity_66 + testIdentity_67 + testIdentity_68 + testIdentity_69 + testIdentity_70 + testIdentity_71 + testIdentity_72 + testIdentity_73 + testIdentity_74 + testIdentity_75 + testIdentity_76 + testIdentity_77 + testIdentity_78 + testIdentity_79 + testIdentity_80 + testIdentity_81 + testIdentity_82 + testIdentity_83 + testIdentity_84 + testIdentity_85 + testIdentity_86 + testIdentity_87 + testIdentity_88 + testIdentity_89 + testAlone_60 + testAlone_61 + testAlone_62 + testAlone_63 + testAlone_64 + testAlone_65 + testAlone_66 + testAlone_67 + testAlone_68 + testAlone_69 + testAlone_70 + testAlone_71 + testAlone_72 + testAlone_73 + testAlone_74 + testAlone_75 + testAlone_76 + testAlone_77 + testAlone_78 + testAlone_79 + testAlone_80 + testAlone_81 + testAlone_82 + testAlone_83 + testAlone_84 + testAlone_85 + testAlone_86 + testAlone_87 + testAlone_88 + testAlone_89 + isEndLoop_60 + isEndLoop_61 + isEndLoop_62 + isEndLoop_63 + isEndLoop_64 + isEndLoop_65 + isEndLoop_66 + isEndLoop_67 + isEndLoop_68 + isEndLoop_69 + isEndLoop_70 + isEndLoop_71 + isEndLoop_72 + isEndLoop_73 + isEndLoop_74 + isEndLoop_75 + isEndLoop_76 + isEndLoop_77 + isEndLoop_78 + isEndLoop_79 + isEndLoop_80 + isEndLoop_81 + isEndLoop_82 + isEndLoop_83 + isEndLoop_84 + isEndLoop_85 + isEndLoop_86 + isEndLoop_87 + isEndLoop_88 + isEndLoop_89 = 0
invariant :wantSection_2 + wantSection_3 = 1
invariant :idle_4 + wantSection_9 = 1
invariant :wantSection_8 + wantSection_9 = 1
invariant :-1'wantSection_11 + askForSection_25 + askForSection_26 + askForSection_27 + askForSection_28 + askForSection_29 + testTurn_25 + testTurn_26 + testTurn_27 + testTurn_28 + testTurn_29 + beginLoop_150 + beginLoop_151 + beginLoop_152 + beginLoop_153 + beginLoop_154 + beginLoop_155 + beginLoop_156 + beginLoop_157 + beginLoop_158 + beginLoop_159 + beginLoop_160 + beginLoop_161 + beginLoop_162 + beginLoop_163 + beginLoop_164 + beginLoop_165 + beginLoop_166 + beginLoop_167 + beginLoop_168 + beginLoop_169 + beginLoop_170 + beginLoop_171 + beginLoop_172 + beginLoop_173 + beginLoop_174 + beginLoop_175 + beginLoop_176 + beginLoop_177 + beginLoop_178 + beginLoop_179 + endTurn_25 + endTurn_26 + endTurn_27 + endTurn_28 + endTurn_29 + CS_5 + testIdentity_150 + testIdentity_151 + testIdentity_152 + testIdentity_153 + testIdentity_154 + testIdentity_155 + testIdentity_156 + testIdentity_157 + testIdentity_158 + testIdentity_159 + testIdentity_160 + testIdentity_161 + testIdentity_162 + testIdentity_163 + testIdentity_164 + testIdentity_165 + testIdentity_166 + testIdentity_167 + testIdentity_168 + testIdentity_169 + testIdentity_170 + testIdentity_171 + testIdentity_172 + testIdentity_173 + testIdentity_174 + testIdentity_175 + testIdentity_176 + testIdentity_177 + testIdentity_178 + testIdentity_179 + testAlone_150 + testAlone_151 + testAlone_152 + testAlone_153 + testAlone_154 + testAlone_155 + testAlone_156 + testAlone_157 + testAlone_158 + testAlone_159 + testAlone_160 + testAlone_161 + testAlone_162 + testAlone_163 + testAlone_164 + testAlone_165 + testAlone_166 + testAlone_167 + testAlone_168 + testAlone_169 + testAlone_170 + testAlone_171 + testAlone_172 + testAlone_173 + testAlone_174 + testAlone_175 + testAlone_176 + testAlone_177 + testAlone_178 + testAlone_179 + isEndLoop_150 + isEndLoop_151 + isEndLoop_152 + isEndLoop_153 + isEndLoop_154 + isEndLoop_155 + isEndLoop_156 + isEndLoop_157 + isEndLoop_158 + isEndLoop_159 + isEndLoop_160 + isEndLoop_161 + isEndLoop_162 + isEndLoop_163 + isEndLoop_164 + isEndLoop_165 + isEndLoop_166 + isEndLoop_167 + isEndLoop_168 + isEndLoop_169 + isEndLoop_170 + isEndLoop_171 + isEndLoop_172 + isEndLoop_173 + isEndLoop_174 + isEndLoop_175 + isEndLoop_176 + isEndLoop_177 + isEndLoop_178 + isEndLoop_179 = 0
invariant :idle_3 + wantSection_7 = 1
invariant :-1'wantSection_9 + askForSection_20 + askForSection_21 + askForSection_22 + askForSection_23 + askForSection_24 + testTurn_20 + testTurn_21 + testTurn_22 + testTurn_23 + testTurn_24 + beginLoop_120 + beginLoop_121 + beginLoop_122 + beginLoop_123 + beginLoop_124 + beginLoop_125 + beginLoop_126 + beginLoop_127 + beginLoop_128 + beginLoop_129 + beginLoop_130 + beginLoop_131 + beginLoop_132 + beginLoop_133 + beginLoop_134 + beginLoop_135 + beginLoop_136 + beginLoop_137 + beginLoop_138 + beginLoop_139 + beginLoop_140 + beginLoop_141 + beginLoop_142 + beginLoop_143 + beginLoop_144 + beginLoop_145 + beginLoop_146 + beginLoop_147 + beginLoop_148 + beginLoop_149 + endTurn_20 + endTurn_21 + endTurn_22 + endTurn_23 + endTurn_24 + CS_4 + testIdentity_120 + testIdentity_121 + testIdentity_122 + testIdentity_123 + testIdentity_124 + testIdentity_125 + testIdentity_126 + testIdentity_127 + testIdentity_128 + testIdentity_129 + testIdentity_130 + testIdentity_131 + testIdentity_132 + testIdentity_133 + testIdentity_134 + testIdentity_135 + testIdentity_136 + testIdentity_137 + testIdentity_138 + testIdentity_139 + testIdentity_140 + testIdentity_141 + testIdentity_142 + testIdentity_143 + testIdentity_144 + testIdentity_145 + testIdentity_146 + testIdentity_147 + testIdentity_148 + testIdentity_149 + testAlone_120 + testAlone_121 + testAlone_122 + testAlone_123 + testAlone_124 + testAlone_125 + testAlone_126 + testAlone_127 + testAlone_128 + testAlone_129 + testAlone_130 + testAlone_131 + testAlone_132 + testAlone_133 + testAlone_134 + testAlone_135 + testAlone_136 + testAlone_137 + testAlone_138 + testAlone_139 + testAlone_140 + testAlone_141 + testAlone_142 + testAlone_143 + testAlone_144 + testAlone_145 + testAlone_146 + testAlone_147 + testAlone_148 + testAlone_149 + isEndLoop_120 + isEndLoop_121 + isEndLoop_122 + isEndLoop_123 + isEndLoop_124 + isEndLoop_125 + isEndLoop_126 + isEndLoop_127 + isEndLoop_128 + isEndLoop_129 + isEndLoop_130 + isEndLoop_131 + isEndLoop_132 + isEndLoop_133 + isEndLoop_134 + isEndLoop_135 + isEndLoop_136 + isEndLoop_137 + isEndLoop_138 + isEndLoop_139 + isEndLoop_140 + isEndLoop_141 + isEndLoop_142 + isEndLoop_143 + isEndLoop_144 + isEndLoop_145 + isEndLoop_146 + isEndLoop_147 + isEndLoop_148 + isEndLoop_149 = 0
invariant :turn_0 + turn_1 + turn_2 + turn_3 + turn_4 + turn_5 = 1
invariant :wantSection_0 + wantSection_1 = 1
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
sparsehash FATAL ERROR: failed to allocate 40 groups
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Could not compile executable .CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]

BK_STOP 1552935755169

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ LTLCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution LTLCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination LTLCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 18, 2019 6:51:40 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 18, 2019 6:51:40 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 18, 2019 6:51:40 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
Mar 18, 2019 6:52:05 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 24624 ms
Mar 18, 2019 6:52:05 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 11 places.
Mar 18, 2019 6:52:05 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
Mar 18, 2019 6:52:05 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :ProcTourProc->beginLoop,testIdentity,testAlone,isEndLoop,
ProcBool->wantSection,
ProcTour->askForSection,testTurn,endTurn,
TourProc->turn,
Process->idle,CS,

Mar 18, 2019 6:52:05 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 14 transitions.
Mar 18, 2019 6:52:05 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
Mar 18, 2019 6:52:05 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 6 ms
Mar 18, 2019 6:52:05 PM fr.lip6.move.gal.instantiate.Instantiator instantiateParameters
INFO: On-the-fly reduction of False transitions avoided exploring 96.0 instantiations of transitions. Total transitions/syncs built is 1308
Mar 18, 2019 6:52:05 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 183 ms
Mar 18, 2019 6:52:06 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/LTLCardinality.pnml.gal : 21 ms
Mar 18, 2019 6:52:06 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSLTLTools
INFO: Time to serialize properties into /home/mcc/execution/LTLCardinality.ltl : 5 ms
Mar 18, 2019 6:52:06 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 1284 transitions. Expanding to a total of 1308 deterministic transitions.
Mar 18, 2019 6:52:06 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 7 ms.
Mar 18, 2019 6:52:07 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 23 place invariants in 317 ms
Mar 18, 2019 6:52:08 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 864 variables to be positive in 1369 ms
Mar 18, 2019 6:52:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 1302 transitions.
Mar 18, 2019 6:52:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/1302 took 1 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 18, 2019 6:52:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 52 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 18, 2019 6:52:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 1302 transitions.
Mar 18, 2019 6:52:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 29 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 18, 2019 6:58:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 1302 transitions.
Mar 18, 2019 6:58:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/1302) took 1955 ms. Total solver calls (SAT/UNSAT): 61(30/31)
Mar 18, 2019 6:58:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(2/1302) took 5859 ms. Total solver calls (SAT/UNSAT): 183(90/93)
Mar 18, 2019 6:58:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(4/1302) took 9216 ms. Total solver calls (SAT/UNSAT): 305(150/155)
Mar 18, 2019 6:58:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(6/1302) took 17672 ms. Total solver calls (SAT/UNSAT): 666(420/246)
Mar 18, 2019 6:58:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(7/1302) took 26403 ms. Total solver calls (SAT/UNSAT): 965(659/306)
Mar 18, 2019 6:58:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(8/1302) took 33722 ms. Total solver calls (SAT/UNSAT): 1263(897/366)
Mar 18, 2019 6:59:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(9/1302) took 41327 ms. Total solver calls (SAT/UNSAT): 1560(1134/426)
Mar 18, 2019 6:59:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(10/1302) took 48253 ms. Total solver calls (SAT/UNSAT): 1856(1370/486)
Mar 18, 2019 6:59:20 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/1302) took 57075 ms. Total solver calls (SAT/UNSAT): 2151(1605/546)
Mar 18, 2019 6:59:28 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(12/1302) took 65255 ms. Total solver calls (SAT/UNSAT): 2445(1845/600)
Mar 18, 2019 6:59:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(13/1302) took 73947 ms. Total solver calls (SAT/UNSAT): 2738(2084/654)
Mar 18, 2019 6:59:43 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(14/1302) took 80316 ms. Total solver calls (SAT/UNSAT): 3030(2322/708)
Mar 18, 2019 6:59:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(15/1302) took 88711 ms. Total solver calls (SAT/UNSAT): 3321(2559/762)
Mar 18, 2019 6:59:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(16/1302) took 96311 ms. Total solver calls (SAT/UNSAT): 3611(2795/816)
Mar 18, 2019 7:00:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(17/1302) took 104633 ms. Total solver calls (SAT/UNSAT): 3900(3030/870)
Mar 18, 2019 7:00:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(18/1302) took 112199 ms. Total solver calls (SAT/UNSAT): 4188(3270/918)
Mar 18, 2019 7:00:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(19/1302) took 119928 ms. Total solver calls (SAT/UNSAT): 4475(3509/966)
Mar 18, 2019 7:00:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(20/1302) took 128052 ms. Total solver calls (SAT/UNSAT): 4761(3747/1014)
Mar 18, 2019 7:00:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(21/1302) took 135684 ms. Total solver calls (SAT/UNSAT): 5046(3984/1062)
Mar 18, 2019 7:00:48 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(22/1302) took 144769 ms. Total solver calls (SAT/UNSAT): 5330(4220/1110)
Mar 18, 2019 7:00:56 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(23/1302) took 153208 ms. Total solver calls (SAT/UNSAT): 5613(4455/1158)
Mar 18, 2019 7:01:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(24/1302) took 161936 ms. Total solver calls (SAT/UNSAT): 5895(4695/1200)
Mar 18, 2019 7:01:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(25/1302) took 169903 ms. Total solver calls (SAT/UNSAT): 6176(4934/1242)
Mar 18, 2019 7:01:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(26/1302) took 175876 ms. Total solver calls (SAT/UNSAT): 6456(5172/1284)
Mar 18, 2019 7:01:27 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(27/1302) took 183803 ms. Total solver calls (SAT/UNSAT): 6735(5409/1326)
Mar 18, 2019 7:01:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(28/1302) took 192695 ms. Total solver calls (SAT/UNSAT): 7013(5645/1368)
Mar 18, 2019 7:01:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(29/1302) took 202023 ms. Total solver calls (SAT/UNSAT): 7290(5880/1410)
Mar 18, 2019 7:01:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(30/1302) took 208992 ms. Total solver calls (SAT/UNSAT): 7566(6120/1446)
Mar 18, 2019 7:01:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(31/1302) took 215421 ms. Total solver calls (SAT/UNSAT): 7841(6359/1482)
Mar 18, 2019 7:02:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(32/1302) took 224064 ms. Total solver calls (SAT/UNSAT): 8115(6597/1518)
Mar 18, 2019 7:02:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(33/1302) took 231278 ms. Total solver calls (SAT/UNSAT): 8388(6834/1554)
Mar 18, 2019 7:02:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(34/1302) took 240932 ms. Total solver calls (SAT/UNSAT): 8660(7070/1590)
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:480)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Mar 18, 2019 7:02:27 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 621263ms conformant to PINS in folder :/home/mcc/execution
virtual memory exhausted: Cannot allocate memory
java.lang.RuntimeException: Could not compile executable .CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
at fr.lip6.move.gal.application.LTSminRunner.compilePINS(LTSminRunner.java:241)
at fr.lip6.move.gal.application.LTSminRunner.access$6(LTSminRunner.java:224)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:75)
at java.lang.Thread.run(Thread.java:748)
ITS-tools command line returned an error code 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-COL-5"
export BK_EXAMINATION="LTLCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is Peterson-COL-5, examination is LTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r107-oct2-155272231100501"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Peterson-COL-5.tgz
mv Peterson-COL-5 execution
cd execution
if [ "LTLCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "LTLCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;