Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2019-input.r107-oct2-155272230900395.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2019-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is PermAdmissibility-COL-10, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r107-oct2-155272230900395
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 220K
-rw-r--r-- 1 mcc users 3.8K Feb 12 04:11 CTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Feb 12 04:11 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Feb 8 03:14 CTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 8 03:13 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.0K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 111 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 349 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.4K Feb 5 00:23 LTLCardinality.txt
-rw-r--r-- 1 mcc users 9.7K Feb 5 00:23 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 4 22:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.4K Feb 4 22:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Feb 4 07:56 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 22K Feb 4 07:56 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.4K Feb 1 02:10 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 20K Feb 1 02:10 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 4 22:22 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 4 22:22 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 equiv_pt
-rw-r--r-- 1 mcc users 3 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 37K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-COL-10-ReachabilityCardinality-00
FORMULA_NAME PermAdmissibility-COL-10-ReachabilityCardinality-01
FORMULA_NAME PermAdmissibility-COL-10-ReachabilityCardinality-02
FORMULA_NAME PermAdmissibility-COL-10-ReachabilityCardinality-03
FORMULA_NAME PermAdmissibility-COL-10-ReachabilityCardinality-04
FORMULA_NAME PermAdmissibility-COL-10-ReachabilityCardinality-05
FORMULA_NAME PermAdmissibility-COL-10-ReachabilityCardinality-06
FORMULA_NAME PermAdmissibility-COL-10-ReachabilityCardinality-07
FORMULA_NAME PermAdmissibility-COL-10-ReachabilityCardinality-08
FORMULA_NAME PermAdmissibility-COL-10-ReachabilityCardinality-09
FORMULA_NAME PermAdmissibility-COL-10-ReachabilityCardinality-10
FORMULA_NAME PermAdmissibility-COL-10-ReachabilityCardinality-11
FORMULA_NAME PermAdmissibility-COL-10-ReachabilityCardinality-12
FORMULA_NAME PermAdmissibility-COL-10-ReachabilityCardinality-13
FORMULA_NAME PermAdmissibility-COL-10-ReachabilityCardinality-14
FORMULA_NAME PermAdmissibility-COL-10-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1552926616164

16:30:41.995 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
16:30:41.997 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : PermAdmissibility-COL-10-ReachabilityCardinality-00 with value :((!((c8_0<=(((((((out6_0+out6_1)+out6_2)+out6_3)+out6_4)+out6_5)+out6_6)+out6_7))||((((((((in4_0+in4_1)+in4_2)+in4_3)+in4_4)+in4_5)+in4_6)+in4_7)>=2)))&&((!(c16_0<=(((((((aux13_0+aux13_1)+aux13_2)+aux13_3)+aux13_4)+aux13_5)+aux13_6)+aux13_7)))||(((((((((aux5_0+aux5_1)+aux5_2)+aux5_3)+aux5_4)+aux5_5)+aux5_6)+aux5_7)>=3)||((((((((aux9_0+aux9_1)+aux9_2)+aux9_3)+aux9_4)+aux9_5)+aux9_6)+aux9_7)<=(((((((out1_0+out1_1)+out1_2)+out1_3)+out1_4)+out1_5)+out1_6)+out1_7)))))
Read [invariant] property : PermAdmissibility-COL-10-ReachabilityCardinality-01 with value :(((((((((((aux8_0+aux8_1)+aux8_2)+aux8_3)+aux8_4)+aux8_5)+aux8_6)+aux8_7)>=2)&&(c13_0>=2))||((c11_0>=3)&&((((((((in3_0+in3_1)+in3_2)+in3_3)+in3_4)+in3_5)+in3_6)+in3_7)<=(((((((aux11_0+aux11_1)+aux11_2)+aux11_3)+aux11_4)+aux11_5)+aux11_6)+aux11_7))))||(c5_0>=3))
Read [invariant] property : PermAdmissibility-COL-10-ReachabilityCardinality-02 with value :(((((((((out7_0+out7_1)+out7_2)+out7_3)+out7_4)+out7_5)+out7_6)+out7_7)<=(((((((aux6_0+aux6_1)+aux6_2)+aux6_3)+aux6_4)+aux6_5)+aux6_6)+aux6_7))||((((((((((out2_0+out2_1)+out2_2)+out2_3)+out2_4)+out2_5)+out2_6)+out2_7)<=c5_0)&&((((((((aux11_0+aux11_1)+aux11_2)+aux11_3)+aux11_4)+aux11_5)+aux11_6)+aux11_7)<=c16_0))&&(c19_0<=(((((((out4_0+out4_1)+out4_2)+out4_3)+out4_4)+out4_5)+out4_6)+out4_7))))
Read [invariant] property : PermAdmissibility-COL-10-ReachabilityCardinality-03 with value :(((!(c19_0>=2))||((((((((aux15_0+aux15_1)+aux15_2)+aux15_3)+aux15_4)+aux15_5)+aux15_6)+aux15_7)<=c5_0))||(c16_0>=3))
Read [reachable] property : PermAdmissibility-COL-10-ReachabilityCardinality-04 with value :(((((((((((aux5_0+aux5_1)+aux5_2)+aux5_3)+aux5_4)+aux5_5)+aux5_6)+aux5_7)<=c12_0)&&(c19_0>=3))&&(((((((((aux11_0+aux11_1)+aux11_2)+aux11_3)+aux11_4)+aux11_5)+aux11_6)+aux11_7)>=2)||(c14_0>=1)))&&(((((((((out2_0+out2_1)+out2_2)+out2_3)+out2_4)+out2_5)+out2_6)+out2_7)>=2)&&(!((((((((out4_0+out4_1)+out4_2)+out4_3)+out4_4)+out4_5)+out4_6)+out4_7)>=2))))
Read [reachable] property : PermAdmissibility-COL-10-ReachabilityCardinality-05 with value :((((((((in3_0+in3_1)+in3_2)+in3_3)+in3_4)+in3_5)+in3_6)+in3_7)<=c5_0)
Read [reachable] property : PermAdmissibility-COL-10-ReachabilityCardinality-06 with value :((((c5_0>=3)&&(c14_0>=3))&&(((((((((aux6_0+aux6_1)+aux6_2)+aux6_3)+aux6_4)+aux6_5)+aux6_6)+aux6_7)<=(((((((out4_0+out4_1)+out4_2)+out4_3)+out4_4)+out4_5)+out4_6)+out4_7))||((((((((aux8_0+aux8_1)+aux8_2)+aux8_3)+aux8_4)+aux8_5)+aux8_6)+aux8_7)>=1)))||((((((((((out2_0+out2_1)+out2_2)+out2_3)+out2_4)+out2_5)+out2_6)+out2_7)>=1)&&((((((((aux14_0+aux14_1)+aux14_2)+aux14_3)+aux14_4)+aux14_5)+aux14_6)+aux14_7)>=2))&&((c8_0<=(((((((in1_0+in1_1)+in1_2)+in1_3)+in1_4)+in1_5)+in1_6)+in1_7))&&((((((((out2_0+out2_1)+out2_2)+out2_3)+out2_4)+out2_5)+out2_6)+out2_7)<=(((((((out3_0+out3_1)+out3_2)+out3_3)+out3_4)+out3_5)+out3_6)+out3_7)))))
Read [reachable] property : PermAdmissibility-COL-10-ReachabilityCardinality-07 with value :((((((((out8_0+out8_1)+out8_2)+out8_3)+out8_4)+out8_5)+out8_6)+out8_7)>=2)
Read [invariant] property : PermAdmissibility-COL-10-ReachabilityCardinality-08 with value :((!(c8_0>=2))||(((c11_0<=(((((((aux12_0+aux12_1)+aux12_2)+aux12_3)+aux12_4)+aux12_5)+aux12_6)+aux12_7))||((((((((aux6_0+aux6_1)+aux6_2)+aux6_3)+aux6_4)+aux6_5)+aux6_6)+aux6_7)<=(((((((aux15_0+aux15_1)+aux15_2)+aux15_3)+aux15_4)+aux15_5)+aux15_6)+aux15_7)))||(((((((((aux11_0+aux11_1)+aux11_2)+aux11_3)+aux11_4)+aux11_5)+aux11_6)+aux11_7)<=(((((((out8_0+out8_1)+out8_2)+out8_3)+out8_4)+out8_5)+out8_6)+out8_7))&&((((((((out2_0+out2_1)+out2_2)+out2_3)+out2_4)+out2_5)+out2_6)+out2_7)>=2))))
Read [invariant] property : PermAdmissibility-COL-10-ReachabilityCardinality-09 with value :(!((((((((((out1_0+out1_1)+out1_2)+out1_3)+out1_4)+out1_5)+out1_6)+out1_7)<=c16_0)||((((((((aux14_0+aux14_1)+aux14_2)+aux14_3)+aux14_4)+aux14_5)+aux14_6)+aux14_7)<=c13_0))&&(!((((((((out4_0+out4_1)+out4_2)+out4_3)+out4_4)+out4_5)+out4_6)+out4_7)<=(((((((out2_0+out2_1)+out2_2)+out2_3)+out2_4)+out2_5)+out2_6)+out2_7)))))
Read [invariant] property : PermAdmissibility-COL-10-ReachabilityCardinality-10 with value :((((c13_0<=(((((((out5_0+out5_1)+out5_2)+out5_3)+out5_4)+out5_5)+out5_6)+out5_7))||((((((((aux11_0+aux11_1)+aux11_2)+aux11_3)+aux11_4)+aux11_5)+aux11_6)+aux11_7)<=(((((((aux12_0+aux12_1)+aux12_2)+aux12_3)+aux12_4)+aux12_5)+aux12_6)+aux12_7)))||(((((((((aux7_0+aux7_1)+aux7_2)+aux7_3)+aux7_4)+aux7_5)+aux7_6)+aux7_7)>=3)&&((((((((aux7_0+aux7_1)+aux7_2)+aux7_3)+aux7_4)+aux7_5)+aux7_6)+aux7_7)<=(((((((out4_0+out4_1)+out4_2)+out4_3)+out4_4)+out4_5)+out4_6)+out4_7))))||(((c14_0>=2)||((((((((out2_0+out2_1)+out2_2)+out2_3)+out2_4)+out2_5)+out2_6)+out2_7)<=(((((((out8_0+out8_1)+out8_2)+out8_3)+out8_4)+out8_5)+out8_6)+out8_7)))||(((((((((out3_0+out3_1)+out3_2)+out3_3)+out3_4)+out3_5)+out3_6)+out3_7)<=c8_0)&&(c12_0>=2))))
Read [reachable] property : PermAdmissibility-COL-10-ReachabilityCardinality-11 with value :((((((((in2_0+in2_1)+in2_2)+in2_3)+in2_4)+in2_5)+in2_6)+in2_7)<=c8_0)
Read [invariant] property : PermAdmissibility-COL-10-ReachabilityCardinality-12 with value :(c13_0<=(((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7))
Read [reachable] property : PermAdmissibility-COL-10-ReachabilityCardinality-13 with value :((((((((((in3_0+in3_1)+in3_2)+in3_3)+in3_4)+in3_5)+in3_6)+in3_7)>=3)&&((c20_0>=3)||((((((((aux16_0+aux16_1)+aux16_2)+aux16_3)+aux16_4)+aux16_5)+aux16_6)+aux16_7)>=1)))&&((!((((((((aux8_0+aux8_1)+aux8_2)+aux8_3)+aux8_4)+aux8_5)+aux8_6)+aux8_7)>=1))&&(!((((((((aux13_0+aux13_1)+aux13_2)+aux13_3)+aux13_4)+aux13_5)+aux13_6)+aux13_7)>=1))))
Read [invariant] property : PermAdmissibility-COL-10-ReachabilityCardinality-14 with value :((!((((((((in1_0+in1_1)+in1_2)+in1_3)+in1_4)+in1_5)+in1_6)+in1_7)<=(((((((out8_0+out8_1)+out8_2)+out8_3)+out8_4)+out8_5)+out8_6)+out8_7)))||(c13_0<=(((((((out1_0+out1_1)+out1_2)+out1_3)+out1_4)+out1_5)+out1_6)+out1_7)))
Read [reachable] property : PermAdmissibility-COL-10-ReachabilityCardinality-15 with value :(!((!((((((((out2_0+out2_1)+out2_2)+out2_3)+out2_4)+out2_5)+out2_6)+out2_7)<=c110_0))||((((((((out1_0+out1_1)+out1_2)+out1_3)+out1_4)+out1_5)+out1_6)+out1_7)<=(((((((in4_0+in4_1)+in4_2)+in4_3)+in4_4)+in4_5)+in4_6)+in4_7))))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 1024 rows 208 cols
invariant :2'c15_0 + aux15_0 + aux15_1 + aux15_2 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 + -1'out8_0 + -1'out8_1 + -1'out8_2 + -1'out8_3 + -1'out8_4 + -1'out8_5 + -1'out8_6 + -1'out8_7 = 0
invariant :4'c13_0 + -2'aux9_0 + -2'aux9_2 + -2'aux9_4 + -2'aux10_0 + -2'aux10_2 + -2'aux10_4 + 2'aux11_1 + 2'aux11_3 + 2'aux11_5 + 2'aux11_6 + 2'aux11_7 + -2'aux12_0 + -2'aux12_2 + -2'aux12_4 + 2'in1_1 + 2'in1_3 + 2'in1_5 + 2'in1_6 + 2'in1_7 + -2'in2_0 + -2'in2_2 + -2'in2_4 + 2'in3_1 + 2'in3_3 + 2'in3_5 + 2'in3_6 + 2'in3_7 + -2'in4_0 + -2'in4_2 + -2'in4_4 + 2'aux8_1 + 2'aux8_3 + 2'aux8_5 + 2'aux8_6 + 2'aux8_7 + -2'aux7_0 + -2'aux7_2 + -2'aux7_4 + 2'aux6_1 + 2'aux6_3 + 2'aux6_5 + 2'aux6_6 + 2'aux6_7 + 2'aux5_1 + 2'aux5_3 + 2'aux5_5 + 2'aux5_6 + 2'aux5_7 + -4'c9_0 + -2'c110_0 + -2'aux16_0 + -2'aux16_2 + -2'aux16_4 + -2'aux15_0 + -2'aux15_2 + -2'aux15_4 + -1'aux14_0 + aux14_1 + -1'aux14_2 + aux14_3 + -1'aux14_4 + aux14_5 + aux14_6 + aux14_7 + aux13_0 + 3'aux13_1 + aux13_2 + 3'aux13_3 + aux13_4 + 3'aux13_5 + 3'aux13_6 + 3'aux13_7 + -2'out1_0 + -2'out1_2 + -2'out1_4 + out2_0 + 3'out2_1 + out2_2 + 3'out2_3 + out2_4 + 3'out2_5 + 3'out2_6 + 3'out2_7 + -2'out3_0 + -2'out3_2 + -2'out3_4 + out4_0 + 3'out4_1 + out4_2 + 3'out4_3 + out4_4 + 3'out4_5 + 3'out4_6 + 3'out4_7 + -2'out5_0 + -2'out5_2 + -2'out5_4 + -1'out6_0 + out6_1 + -1'out6_2 + out6_3 + -1'out6_4 + out6_5 + out6_6 + out6_7 + -2'out7_0 + -2'out7_2 + -2'out7_4 + -1'out8_0 + out8_1 + -1'out8_2 + out8_3 + -1'out8_4 + out8_5 + out8_6 + out8_7 = 20
invariant :c18_0 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 = 0
invariant :in1_0 + in1_1 + in1_2 + in1_3 + in1_4 + in1_5 + in1_6 + in1_7 + -1'in3_0 + -1'in3_1 + -1'in3_2 + -1'in3_3 + -1'in3_4 + -1'in3_5 + -1'in3_6 + -1'in3_7 = 0
invariant :c20_0 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 + out8_0 + out8_1 + out8_2 + out8_3 + out8_4 + out8_5 + out8_6 + out8_7 = 0
invariant :2'c16_0 + -1'aux15_0 + -1'aux15_1 + -1'aux15_2 + -1'aux15_3 + -1'aux15_4 + -1'aux15_5 + -1'aux15_6 + -1'aux15_7 + 2'c17_0 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + -1'out4_0 + -1'out4_1 + -1'out4_2 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 = 0
invariant :-2'c5_0 + c8_0 + in4_0 + in4_1 + in4_2 + in4_3 + in4_4 + in4_5 + in4_6 + in4_7 + -1'aux5_0 + -1'aux5_1 + -1'aux5_2 + -1'aux5_3 + -1'aux5_4 + -1'aux5_5 + -1'aux5_6 + -1'aux5_7 + 2'c9_0 + c110_0 = 0
invariant :-4'c13_0 + 2'aux12_0 + 2'aux12_1 + 2'aux12_2 + 2'aux12_3 + 2'aux12_4 + 2'aux12_5 + 2'aux12_6 + 2'aux12_7 + aux15_0 + aux15_1 + aux15_2 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -2'aux13_0 + -2'aux13_1 + -2'aux13_2 + -2'aux13_3 + -2'aux13_4 + -2'aux13_5 + -2'aux13_6 + -2'aux13_7 + 2'c17_0 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + -1'out4_0 + -1'out4_1 + -1'out4_2 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 = 0
invariant :aux16_0 + aux16_1 + aux16_2 + aux16_3 + aux16_4 + aux16_5 + aux16_6 + aux16_7 + -2'c17_0 + -2'out2_0 + -2'out2_1 + -2'out2_2 + -2'out2_3 + -2'out2_4 + -2'out2_5 + -2'out2_6 + -2'out2_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 + out8_0 + out8_1 + out8_2 + out8_3 + out8_4 + out8_5 + out8_6 + out8_7 = 0
invariant :2'aux9_0 + 2'aux9_2 + 2'aux9_4 + 2'aux10_0 + 2'aux10_2 + 2'aux10_4 + -2'aux11_1 + -2'aux11_3 + -2'aux11_5 + -2'aux11_6 + -2'aux11_7 + 2'aux12_0 + 2'aux12_2 + 2'aux12_4 + -2'in1_1 + -2'in1_3 + -2'in1_5 + -2'in1_6 + -2'in1_7 + 4'c5_0 + 2'in2_0 + 2'in2_2 + 2'in2_4 + -2'in3_1 + -2'in3_3 + -2'in3_5 + -2'in3_6 + -2'in3_7 + 2'in4_0 + 2'in4_2 + 2'in4_4 + 2'aux8_0 + 2'aux8_2 + 2'aux8_4 + 2'aux7_0 + 2'aux7_2 + 2'aux7_4 + -2'aux6_1 + -2'aux6_3 + -2'aux6_5 + -2'aux6_6 + -2'aux6_7 + 2'aux5_0 + 2'aux5_2 + 2'aux5_4 + 2'c12_0 + 2'aux16_0 + 2'aux16_2 + 2'aux16_4 + 2'aux15_0 + 2'aux15_2 + 2'aux15_4 + aux14_0 + -1'aux14_1 + aux14_2 + -1'aux14_3 + aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + aux13_0 + -1'aux13_1 + aux13_2 + -1'aux13_3 + aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + 2'out1_0 + 2'out1_2 + 2'out1_4 + out2_0 + -1'out2_1 + out2_2 + -1'out2_3 + out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + 2'out3_0 + 2'out3_2 + 2'out3_4 + out4_0 + -1'out4_1 + out4_2 + -1'out4_3 + out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + 2'out5_0 + 2'out5_2 + 2'out5_4 + out6_0 + -1'out6_1 + out6_2 + -1'out6_3 + out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 + 2'out7_0 + 2'out7_2 + 2'out7_4 + out8_0 + -1'out8_1 + out8_2 + -1'out8_3 + out8_4 + -1'out8_5 + -1'out8_6 + -1'out8_7 = 20
invariant :2'c5_0 + c6_0 + -1'in3_0 + -1'in3_1 + -1'in3_2 + -1'in3_3 + -1'in3_4 + -1'in3_5 + -1'in3_6 + -1'in3_7 = 0
invariant :c19_0 + -1'out4_0 + -1'out4_1 + -1'out4_2 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 0
invariant :2'c13_0 + -2'c5_0 + 2'in3_0 + 2'in3_1 + 2'in3_2 + 2'in3_3 + 2'in3_4 + 2'in3_5 + 2'in3_6 + 2'in3_7 + aux6_0 + aux6_1 + aux6_2 + aux6_3 + aux6_4 + aux6_5 + aux6_6 + aux6_7 + c12_0 + aux13_0 + aux13_1 + aux13_2 + aux13_3 + aux13_4 + aux13_5 + aux13_6 + aux13_7 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 = 20
invariant :2'aux9_0 + 2'aux9_1 + 2'aux9_2 + 2'aux9_3 + 2'aux9_4 + 2'aux9_7 + -2'aux10_5 + -2'aux10_6 + -2'aux11_5 + -2'aux11_6 + -2'aux12_5 + -2'aux12_6 + -2'in1_5 + -2'in1_6 + 4'c5_0 + -2'in2_5 + -2'in2_6 + -2'in3_5 + -2'in3_6 + -2'in4_5 + -2'in4_6 + -2'aux8_5 + -2'aux8_6 + -2'aux7_5 + -2'aux7_6 + -2'aux6_5 + -2'aux6_6 + 2'aux5_0 + 2'aux5_1 + 2'aux5_2 + 2'aux5_3 + 2'aux5_4 + 2'aux5_7 + -2'c110_0 + -2'aux16_5 + -2'aux16_6 + -2'aux15_5 + -2'aux15_6 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + -1'aux14_5 + -1'aux14_6 + aux14_7 + aux13_0 + aux13_1 + aux13_2 + aux13_3 + aux13_4 + -1'aux13_5 + -1'aux13_6 + aux13_7 + -2'out1_5 + -2'out1_6 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + -1'out2_5 + -1'out2_6 + out2_7 + -2'out3_5 + -2'out3_6 + out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + -1'out4_5 + -1'out4_6 + out4_7 + -2'out5_5 + -2'out5_6 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + -1'out6_5 + -1'out6_6 + out6_7 + -2'out7_5 + -2'out7_6 + out8_0 + out8_1 + out8_2 + out8_3 + out8_4 + -1'out8_5 + -1'out8_6 + out8_7 = 0
invariant :aux9_5 + aux10_5 + aux11_5 + aux12_5 + in1_5 + in2_5 + in3_5 + in4_5 + aux8_5 + aux7_5 + aux6_5 + aux5_5 + aux16_5 + aux15_5 + aux14_5 + aux13_5 + out1_5 + out2_5 + out3_5 + out4_5 + out5_5 + out6_5 + out7_5 + out8_5 = 10
invariant :aux9_6 + aux10_6 + aux11_6 + aux12_6 + in1_6 + in2_6 + in3_6 + in4_6 + aux8_6 + aux7_6 + aux6_6 + aux5_6 + aux16_6 + aux15_6 + aux14_6 + aux13_6 + out1_6 + out2_6 + out3_6 + out4_6 + out5_6 + out6_6 + out7_6 + out8_6 = 10
invariant :in2_0 + in2_1 + in2_2 + in2_3 + in2_4 + in2_5 + in2_6 + in2_7 + -1'in4_0 + -1'in4_1 + -1'in4_2 + -1'in4_3 + -1'in4_4 + -1'in4_5 + -1'in4_6 + -1'in4_7 = 0
invariant :2'c13_0 + 2'c5_0 + aux5_0 + aux5_1 + aux5_2 + aux5_3 + aux5_4 + aux5_5 + aux5_6 + aux5_7 + c110_0 + 2'c11_0 + 2'c12_0 + aux13_0 + aux13_1 + aux13_2 + aux13_3 + aux13_4 + aux13_5 + aux13_6 + aux13_7 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 = 20
invariant :2'c14_0 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + aux14_5 + aux14_6 + aux14_7 + -1'aux13_0 + -1'aux13_1 + -1'aux13_2 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -1'out4_0 + -1'out4_1 + -1'out4_2 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 + out8_0 + out8_1 + out8_2 + out8_3 + out8_4 + out8_5 + out8_6 + out8_7 = 0
invariant :2'aux9_0 + 2'aux9_1 + 2'aux9_2 + 2'aux9_4 + 2'aux10_0 + 2'aux10_1 + 2'aux10_2 + 2'aux10_4 + -2'aux11_3 + -2'aux11_5 + -2'aux11_6 + -2'aux11_7 + -2'aux12_3 + -2'aux12_5 + -2'aux12_6 + -2'aux12_7 + -2'in1_3 + -2'in1_5 + -2'in1_6 + -2'in1_7 + 8'c5_0 + 2'in2_0 + 2'in2_1 + 2'in2_2 + 2'in2_4 + -2'in3_3 + -2'in3_5 + -2'in3_6 + -2'in3_7 + -2'in4_0 + -2'in4_1 + -2'in4_2 + -4'in4_3 + -2'in4_4 + -4'in4_5 + -4'in4_6 + -4'in4_7 + -2'aux8_3 + -2'aux8_5 + -2'aux8_6 + -2'aux8_7 + -2'aux7_3 + -2'aux7_5 + -2'aux7_6 + -2'aux7_7 + -2'aux6_3 + -2'aux6_5 + -2'aux6_6 + -2'aux6_7 + 4'aux5_0 + 4'aux5_1 + 4'aux5_2 + 2'aux5_3 + 4'aux5_4 + 2'aux5_5 + 2'aux5_6 + 2'aux5_7 + -2'aux16_3 + -2'aux16_5 + -2'aux16_6 + -2'aux16_7 + aux15_0 + aux15_1 + aux15_2 + -1'aux15_3 + aux15_4 + -1'aux15_5 + -1'aux15_6 + -1'aux15_7 + aux14_0 + aux14_1 + aux14_2 + -1'aux14_3 + aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + aux13_0 + aux13_1 + aux13_2 + -1'aux13_3 + aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + 2'c17_0 + 2'out1_0 + 2'out1_1 + 2'out1_2 + 2'out1_4 + 2'out2_0 + 2'out2_1 + 2'out2_2 + 2'out2_4 + -2'out3_3 + -2'out3_5 + -2'out3_6 + -2'out3_7 + 2'out4_0 + 2'out4_1 + 2'out4_2 + 2'out4_4 + -2'out5_3 + -2'out5_5 + -2'out5_6 + -2'out5_7 + out6_0 + out6_1 + out6_2 + -1'out6_3 + out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 + -2'out7_3 + -2'out7_5 + -2'out7_6 + -2'out7_7 + out8_0 + out8_1 + out8_2 + -1'out8_3 + out8_4 + -1'out8_5 + -1'out8_6 + -1'out8_7 = 0
invariant :aux9_3 + aux10_3 + aux11_3 + aux12_3 + in1_3 + -1'in2_0 + -1'in2_1 + -1'in2_2 + -1'in2_4 + -1'in2_5 + -1'in2_6 + -1'in2_7 + in3_3 + in4_0 + in4_1 + in4_2 + 2'in4_3 + in4_4 + in4_5 + in4_6 + in4_7 + aux8_3 + aux7_3 + aux6_3 + aux5_3 + aux16_3 + aux15_3 + aux14_3 + aux13_3 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + out2_0 + out2_1 + out2_2 + 2'out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out3_3 + out4_3 + out5_3 + out6_3 + out7_3 + out8_3 = 10
invariant :-4'c13_0 + -2'aux9_2 + -2'aux9_4 + -2'aux10_2 + -2'aux10_4 + 2'aux11_0 + 2'aux11_1 + 2'aux11_3 + 2'aux11_5 + 2'aux11_6 + 2'aux11_7 + -2'aux12_2 + -2'aux12_4 + -2'in1_2 + -2'in1_4 + -2'in2_2 + -2'in2_4 + -2'in3_2 + -2'in3_4 + -2'in4_2 + -2'in4_4 + -2'aux8_2 + -2'aux8_4 + -2'aux7_2 + -2'aux7_4 + -2'aux6_2 + -2'aux6_4 + -2'aux5_2 + -2'aux5_4 + -4'c12_0 + -2'aux16_2 + -2'aux16_4 + -2'aux15_2 + -2'aux15_4 + aux14_0 + aux14_1 + -1'aux14_2 + aux14_3 + -1'aux14_4 + aux14_5 + aux14_6 + aux14_7 + -1'aux13_0 + -1'aux13_1 + -3'aux13_2 + -1'aux13_3 + -3'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + -2'out1_2 + -2'out1_4 + -1'out2_0 + -1'out2_1 + -3'out2_2 + -1'out2_3 + -3'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -2'out3_2 + -2'out3_4 + -1'out4_0 + -1'out4_1 + -3'out4_2 + -1'out4_3 + -3'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + -2'out5_2 + -2'out5_4 + out6_0 + out6_1 + -1'out6_2 + out6_3 + -1'out6_4 + out6_5 + out6_6 + out6_7 + -2'out7_2 + -2'out7_4 + out8_0 + out8_1 + -1'out8_2 + out8_3 + -1'out8_4 + out8_5 + out8_6 + out8_7 = -40
invariant :aux9_4 + aux10_4 + aux11_4 + aux12_4 + in1_4 + in2_4 + in3_4 + in4_4 + aux8_4 + aux7_4 + aux6_4 + aux5_4 + aux16_4 + aux15_4 + aux14_4 + aux13_4 + out1_4 + out2_4 + out3_4 + out4_4 + out5_4 + out6_4 + out7_4 + out8_4 = 10
invariant :aux9_2 + aux10_2 + aux11_2 + aux12_2 + in1_2 + in2_2 + in3_2 + in4_2 + aux8_2 + aux7_2 + aux6_2 + aux5_2 + aux16_2 + aux15_2 + aux14_2 + aux13_2 + out1_2 + out2_2 + out3_2 + out4_2 + out5_2 + out6_2 + out7_2 + out8_2 = 10
invariant :2'c7_0 + 2'in3_0 + 2'in3_1 + 2'in3_2 + 2'in3_3 + 2'in3_4 + 2'in3_5 + 2'in3_6 + 2'in3_7 + -2'in4_0 + -2'in4_1 + -2'in4_2 + -2'in4_3 + -2'in4_4 + -2'in4_5 + -2'in4_6 + -2'in4_7 + aux5_0 + aux5_1 + aux5_2 + aux5_3 + aux5_4 + aux5_5 + aux5_6 + aux5_7 + -2'c9_0 + -1'c110_0 = 0
invariant :-2'aux9_0 + -2'aux9_1 + -2'aux9_2 + -2'aux9_3 + -2'aux9_4 + 2'aux10_5 + 2'aux10_6 + 2'aux10_7 + 2'aux11_5 + 2'aux11_6 + 2'aux11_7 + 2'aux12_5 + 2'aux12_6 + 2'aux12_7 + 2'in1_5 + 2'in1_6 + 2'in1_7 + -4'c5_0 + 2'in2_5 + 2'in2_6 + 2'in2_7 + 2'in3_5 + 2'in3_6 + 2'in3_7 + 2'in4_5 + 2'in4_6 + 2'in4_7 + 2'aux8_5 + 2'aux8_6 + 2'aux8_7 + 2'aux7_5 + 2'aux7_6 + 2'aux7_7 + 2'aux6_5 + 2'aux6_6 + 2'aux6_7 + -2'aux5_0 + -2'aux5_1 + -2'aux5_2 + -2'aux5_3 + -2'aux5_4 + 2'c110_0 + 2'aux16_5 + 2'aux16_6 + 2'aux16_7 + 2'aux15_5 + 2'aux15_6 + 2'aux15_7 + -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + aux14_5 + aux14_6 + aux14_7 + -1'aux13_0 + -1'aux13_1 + -1'aux13_2 + -1'aux13_3 + -1'aux13_4 + aux13_5 + aux13_6 + aux13_7 + 2'out1_5 + 2'out1_6 + 2'out1_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + out2_5 + out2_6 + out2_7 + 2'out3_5 + 2'out3_6 + 2'out3_7 + -1'out4_0 + -1'out4_1 + -1'out4_2 + -1'out4_3 + -1'out4_4 + out4_5 + out4_6 + out4_7 + 2'out5_5 + 2'out5_6 + 2'out5_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + out6_5 + out6_6 + out6_7 + 2'out7_5 + 2'out7_6 + 2'out7_7 + -1'out8_0 + -1'out8_1 + -1'out8_2 + -1'out8_3 + -1'out8_4 + out8_5 + out8_6 + out8_7 = 20
invariant :out1_0 + out1_1 + out1_2 + out1_3 + out1_4 + out1_5 + out1_6 + out1_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 = 0
invariant :out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + -1'out4_0 + -1'out4_1 + -1'out4_2 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 = 0
invariant :out5_0 + out5_1 + out5_2 + out5_3 + out5_4 + out5_5 + out5_6 + out5_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 0
invariant :out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + -1'out8_0 + -1'out8_1 + -1'out8_2 + -1'out8_3 + -1'out8_4 + -1'out8_5 + -1'out8_6 + -1'out8_7 = 0
invariant :-4'c5_0 + 2'in4_0 + 2'in4_1 + 2'in4_2 + 2'in4_3 + 2'in4_4 + 2'in4_5 + 2'in4_6 + 2'in4_7 + aux7_0 + aux7_1 + aux7_2 + aux7_3 + aux7_4 + aux7_5 + aux7_6 + aux7_7 + -2'aux5_0 + -2'aux5_1 + -2'aux5_2 + -2'aux5_3 + -2'aux5_4 + -2'aux5_5 + -2'aux5_6 + -2'aux5_7 + 2'c9_0 + c110_0 = 0
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 1024 rows 208 cols
invariant :2'c15_0 + aux15_0 + aux15_1 + aux15_2 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 + -1'out8_0 + -1'out8_1 + -1'out8_2 + -1'out8_3 + -1'out8_4 + -1'out8_5 + -1'out8_6 + -1'out8_7 = 0
invariant :4'c13_0 + -2'aux9_0 + -2'aux9_2 + -2'aux9_4 + -2'aux10_0 + -2'aux10_2 + -2'aux10_4 + 2'aux11_1 + 2'aux11_3 + 2'aux11_5 + 2'aux11_6 + 2'aux11_7 + -2'aux12_0 + -2'aux12_2 + -2'aux12_4 + 2'in1_1 + 2'in1_3 + 2'in1_5 + 2'in1_6 + 2'in1_7 + -2'in2_0 + -2'in2_2 + -2'in2_4 + 2'in3_1 + 2'in3_3 + 2'in3_5 + 2'in3_6 + 2'in3_7 + -2'in4_0 + -2'in4_2 + -2'in4_4 + 2'aux8_1 + 2'aux8_3 + 2'aux8_5 + 2'aux8_6 + 2'aux8_7 + -2'aux7_0 + -2'aux7_2 + -2'aux7_4 + 2'aux6_1 + 2'aux6_3 + 2'aux6_5 + 2'aux6_6 + 2'aux6_7 + 2'aux5_1 + 2'aux5_3 + 2'aux5_5 + 2'aux5_6 + 2'aux5_7 + -4'c9_0 + -2'c110_0 + -2'aux16_0 + -2'aux16_2 + -2'aux16_4 + -2'aux15_0 + -2'aux15_2 + -2'aux15_4 + -1'aux14_0 + aux14_1 + -1'aux14_2 + aux14_3 + -1'aux14_4 + aux14_5 + aux14_6 + aux14_7 + aux13_0 + 3'aux13_1 + aux13_2 + 3'aux13_3 + aux13_4 + 3'aux13_5 + 3'aux13_6 + 3'aux13_7 + -2'out1_0 + -2'out1_2 + -2'out1_4 + out2_0 + 3'out2_1 + out2_2 + 3'out2_3 + out2_4 + 3'out2_5 + 3'out2_6 + 3'out2_7 + -2'out3_0 + -2'out3_2 + -2'out3_4 + out4_0 + 3'out4_1 + out4_2 + 3'out4_3 + out4_4 + 3'out4_5 + 3'out4_6 + 3'out4_7 + -2'out5_0 + -2'out5_2 + -2'out5_4 + -1'out6_0 + out6_1 + -1'out6_2 + out6_3 + -1'out6_4 + out6_5 + out6_6 + out6_7 + -2'out7_0 + -2'out7_2 + -2'out7_4 + -1'out8_0 + out8_1 + -1'out8_2 + out8_3 + -1'out8_4 + out8_5 + out8_6 + out8_7 = 20
invariant :c18_0 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 = 0
invariant :in1_0 + in1_1 + in1_2 + in1_3 + in1_4 + in1_5 + in1_6 + in1_7 + -1'in3_0 + -1'in3_1 + -1'in3_2 + -1'in3_3 + -1'in3_4 + -1'in3_5 + -1'in3_6 + -1'in3_7 = 0
invariant :c20_0 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 + out8_0 + out8_1 + out8_2 + out8_3 + out8_4 + out8_5 + out8_6 + out8_7 = 0
invariant :2'c16_0 + -1'aux15_0 + -1'aux15_1 + -1'aux15_2 + -1'aux15_3 + -1'aux15_4 + -1'aux15_5 + -1'aux15_6 + -1'aux15_7 + 2'c17_0 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + -1'out4_0 + -1'out4_1 + -1'out4_2 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 = 0
invariant :-2'c5_0 + c8_0 + in4_0 + in4_1 + in4_2 + in4_3 + in4_4 + in4_5 + in4_6 + in4_7 + -1'aux5_0 + -1'aux5_1 + -1'aux5_2 + -1'aux5_3 + -1'aux5_4 + -1'aux5_5 + -1'aux5_6 + -1'aux5_7 + 2'c9_0 + c110_0 = 0
invariant :-4'c13_0 + 2'aux12_0 + 2'aux12_1 + 2'aux12_2 + 2'aux12_3 + 2'aux12_4 + 2'aux12_5 + 2'aux12_6 + 2'aux12_7 + aux15_0 + aux15_1 + aux15_2 + aux15_3 + aux15_4 + aux15_5 + aux15_6 + aux15_7 + -2'aux13_0 + -2'aux13_1 + -2'aux13_2 + -2'aux13_3 + -2'aux13_4 + -2'aux13_5 + -2'aux13_6 + -2'aux13_7 + 2'c17_0 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + -1'out4_0 + -1'out4_1 + -1'out4_2 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 = 0
invariant :aux16_0 + aux16_1 + aux16_2 + aux16_3 + aux16_4 + aux16_5 + aux16_6 + aux16_7 + -2'c17_0 + -2'out2_0 + -2'out2_1 + -2'out2_2 + -2'out2_3 + -2'out2_4 + -2'out2_5 + -2'out2_6 + -2'out2_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 + out8_0 + out8_1 + out8_2 + out8_3 + out8_4 + out8_5 + out8_6 + out8_7 = 0
invariant :2'aux9_0 + 2'aux9_2 + 2'aux9_4 + 2'aux10_0 + 2'aux10_2 + 2'aux10_4 + -2'aux11_1 + -2'aux11_3 + -2'aux11_5 + -2'aux11_6 + -2'aux11_7 + 2'aux12_0 + 2'aux12_2 + 2'aux12_4 + -2'in1_1 + -2'in1_3 + -2'in1_5 + -2'in1_6 + -2'in1_7 + 4'c5_0 + 2'in2_0 + 2'in2_2 + 2'in2_4 + -2'in3_1 + -2'in3_3 + -2'in3_5 + -2'in3_6 + -2'in3_7 + 2'in4_0 + 2'in4_2 + 2'in4_4 + 2'aux8_0 + 2'aux8_2 + 2'aux8_4 + 2'aux7_0 + 2'aux7_2 + 2'aux7_4 + -2'aux6_1 + -2'aux6_3 + -2'aux6_5 + -2'aux6_6 + -2'aux6_7 + 2'aux5_0 + 2'aux5_2 + 2'aux5_4 + 2'c12_0 + 2'aux16_0 + 2'aux16_2 + 2'aux16_4 + 2'aux15_0 + 2'aux15_2 + 2'aux15_4 + aux14_0 + -1'aux14_1 + aux14_2 + -1'aux14_3 + aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + aux13_0 + -1'aux13_1 + aux13_2 + -1'aux13_3 + aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + 2'out1_0 + 2'out1_2 + 2'out1_4 + out2_0 + -1'out2_1 + out2_2 + -1'out2_3 + out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + 2'out3_0 + 2'out3_2 + 2'out3_4 + out4_0 + -1'out4_1 + out4_2 + -1'out4_3 + out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + 2'out5_0 + 2'out5_2 + 2'out5_4 + out6_0 + -1'out6_1 + out6_2 + -1'out6_3 + out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 + 2'out7_0 + 2'out7_2 + 2'out7_4 + out8_0 + -1'out8_1 + out8_2 + -1'out8_3 + out8_4 + -1'out8_5 + -1'out8_6 + -1'out8_7 = 20
invariant :2'c5_0 + c6_0 + -1'in3_0 + -1'in3_1 + -1'in3_2 + -1'in3_3 + -1'in3_4 + -1'in3_5 + -1'in3_6 + -1'in3_7 = 0
invariant :c19_0 + -1'out4_0 + -1'out4_1 + -1'out4_2 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 = 0
invariant :2'c13_0 + -2'c5_0 + 2'in3_0 + 2'in3_1 + 2'in3_2 + 2'in3_3 + 2'in3_4 + 2'in3_5 + 2'in3_6 + 2'in3_7 + aux6_0 + aux6_1 + aux6_2 + aux6_3 + aux6_4 + aux6_5 + aux6_6 + aux6_7 + c12_0 + aux13_0 + aux13_1 + aux13_2 + aux13_3 + aux13_4 + aux13_5 + aux13_6 + aux13_7 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 = 20
invariant :2'aux9_0 + 2'aux9_1 + 2'aux9_2 + 2'aux9_3 + 2'aux9_4 + 2'aux9_7 + -2'aux10_5 + -2'aux10_6 + -2'aux11_5 + -2'aux11_6 + -2'aux12_5 + -2'aux12_6 + -2'in1_5 + -2'in1_6 + 4'c5_0 + -2'in2_5 + -2'in2_6 + -2'in3_5 + -2'in3_6 + -2'in4_5 + -2'in4_6 + -2'aux8_5 + -2'aux8_6 + -2'aux7_5 + -2'aux7_6 + -2'aux6_5 + -2'aux6_6 + 2'aux5_0 + 2'aux5_1 + 2'aux5_2 + 2'aux5_3 + 2'aux5_4 + 2'aux5_7 + -2'c110_0 + -2'aux16_5 + -2'aux16_6 + -2'aux15_5 + -2'aux15_6 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + -1'aux14_5 + -1'aux14_6 + aux14_7 + aux13_0 + aux13_1 + aux13_2 + aux13_3 + aux13_4 + -1'aux13_5 + -1'aux13_6 + aux13_7 + -2'out1_5 + -2'out1_6 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + -1'out2_5 + -1'out2_6 + out2_7 + -2'out3_5 + -2'out3_6 + out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + -1'out4_5 + -1'out4_6 + out4_7 + -2'out5_5 + -2'out5_6 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + -1'out6_5 + -1'out6_6 + out6_7 + -2'out7_5 + -2'out7_6 + out8_0 + out8_1 + out8_2 + out8_3 + out8_4 + -1'out8_5 + -1'out8_6 + out8_7 = 0
invariant :aux9_5 + aux10_5 + aux11_5 + aux12_5 + in1_5 + in2_5 + in3_5 + in4_5 + aux8_5 + aux7_5 + aux6_5 + aux5_5 + aux16_5 + aux15_5 + aux14_5 + aux13_5 + out1_5 + out2_5 + out3_5 + out4_5 + out5_5 + out6_5 + out7_5 + out8_5 = 10
invariant :aux9_6 + aux10_6 + aux11_6 + aux12_6 + in1_6 + in2_6 + in3_6 + in4_6 + aux8_6 + aux7_6 + aux6_6 + aux5_6 + aux16_6 + aux15_6 + aux14_6 + aux13_6 + out1_6 + out2_6 + out3_6 + out4_6 + out5_6 + out6_6 + out7_6 + out8_6 = 10
invariant :in2_0 + in2_1 + in2_2 + in2_3 + in2_4 + in2_5 + in2_6 + in2_7 + -1'in4_0 + -1'in4_1 + -1'in4_2 + -1'in4_3 + -1'in4_4 + -1'in4_5 + -1'in4_6 + -1'in4_7 = 0
invariant :2'c13_0 + 2'c5_0 + aux5_0 + aux5_1 + aux5_2 + aux5_3 + aux5_4 + aux5_5 + aux5_6 + aux5_7 + c110_0 + 2'c11_0 + 2'c12_0 + aux13_0 + aux13_1 + aux13_2 + aux13_3 + aux13_4 + aux13_5 + aux13_6 + aux13_7 + out2_0 + out2_1 + out2_2 + out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out4_0 + out4_1 + out4_2 + out4_3 + out4_4 + out4_5 + out4_6 + out4_7 = 20
invariant :2'c14_0 + aux14_0 + aux14_1 + aux14_2 + aux14_3 + aux14_4 + aux14_5 + aux14_6 + aux14_7 + -1'aux13_0 + -1'aux13_1 + -1'aux13_2 + -1'aux13_3 + -1'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -1'out4_0 + -1'out4_1 + -1'out4_2 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + out6_0 + out6_1 + out6_2 + out6_3 + out6_4 + out6_5 + out6_6 + out6_7 + out8_0 + out8_1 + out8_2 + out8_3 + out8_4 + out8_5 + out8_6 + out8_7 = 0
invariant :2'aux9_0 + 2'aux9_1 + 2'aux9_2 + 2'aux9_4 + 2'aux10_0 + 2'aux10_1 + 2'aux10_2 + 2'aux10_4 + -2'aux11_3 + -2'aux11_5 + -2'aux11_6 + -2'aux11_7 + -2'aux12_3 + -2'aux12_5 + -2'aux12_6 + -2'aux12_7 + -2'in1_3 + -2'in1_5 + -2'in1_6 + -2'in1_7 + 8'c5_0 + 2'in2_0 + 2'in2_1 + 2'in2_2 + 2'in2_4 + -2'in3_3 + -2'in3_5 + -2'in3_6 + -2'in3_7 + -2'in4_0 + -2'in4_1 + -2'in4_2 + -4'in4_3 + -2'in4_4 + -4'in4_5 + -4'in4_6 + -4'in4_7 + -2'aux8_3 + -2'aux8_5 + -2'aux8_6 + -2'aux8_7 + -2'aux7_3 + -2'aux7_5 + -2'aux7_6 + -2'aux7_7 + -2'aux6_3 + -2'aux6_5 + -2'aux6_6 + -2'aux6_7 + 4'aux5_0 + 4'aux5_1 + 4'aux5_2 + 2'aux5_3 + 4'aux5_4 + 2'aux5_5 + 2'aux5_6 + 2'aux5_7 + -2'aux16_3 + -2'aux16_5 + -2'aux16_6 + -2'aux16_7 + aux15_0 + aux15_1 + aux15_2 + -1'aux15_3 + aux15_4 + -1'aux15_5 + -1'aux15_6 + -1'aux15_7 + aux14_0 + aux14_1 + aux14_2 + -1'aux14_3 + aux14_4 + -1'aux14_5 + -1'aux14_6 + -1'aux14_7 + aux13_0 + aux13_1 + aux13_2 + -1'aux13_3 + aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + 2'c17_0 + 2'out1_0 + 2'out1_1 + 2'out1_2 + 2'out1_4 + 2'out2_0 + 2'out2_1 + 2'out2_2 + 2'out2_4 + -2'out3_3 + -2'out3_5 + -2'out3_6 + -2'out3_7 + 2'out4_0 + 2'out4_1 + 2'out4_2 + 2'out4_4 + -2'out5_3 + -2'out5_5 + -2'out5_6 + -2'out5_7 + out6_0 + out6_1 + out6_2 + -1'out6_3 + out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 + -2'out7_3 + -2'out7_5 + -2'out7_6 + -2'out7_7 + out8_0 + out8_1 + out8_2 + -1'out8_3 + out8_4 + -1'out8_5 + -1'out8_6 + -1'out8_7 = 0
invariant :aux9_3 + aux10_3 + aux11_3 + aux12_3 + in1_3 + -1'in2_0 + -1'in2_1 + -1'in2_2 + -1'in2_4 + -1'in2_5 + -1'in2_6 + -1'in2_7 + in3_3 + in4_0 + in4_1 + in4_2 + 2'in4_3 + in4_4 + in4_5 + in4_6 + in4_7 + aux8_3 + aux7_3 + aux6_3 + aux5_3 + aux16_3 + aux15_3 + aux14_3 + aux13_3 + -1'out1_0 + -1'out1_1 + -1'out1_2 + -1'out1_4 + -1'out1_5 + -1'out1_6 + -1'out1_7 + out2_0 + out2_1 + out2_2 + 2'out2_3 + out2_4 + out2_5 + out2_6 + out2_7 + out3_3 + out4_3 + out5_3 + out6_3 + out7_3 + out8_3 = 10
invariant :-4'c13_0 + -2'aux9_2 + -2'aux9_4 + -2'aux10_2 + -2'aux10_4 + 2'aux11_0 + 2'aux11_1 + 2'aux11_3 + 2'aux11_5 + 2'aux11_6 + 2'aux11_7 + -2'aux12_2 + -2'aux12_4 + -2'in1_2 + -2'in1_4 + -2'in2_2 + -2'in2_4 + -2'in3_2 + -2'in3_4 + -2'in4_2 + -2'in4_4 + -2'aux8_2 + -2'aux8_4 + -2'aux7_2 + -2'aux7_4 + -2'aux6_2 + -2'aux6_4 + -2'aux5_2 + -2'aux5_4 + -4'c12_0 + -2'aux16_2 + -2'aux16_4 + -2'aux15_2 + -2'aux15_4 + aux14_0 + aux14_1 + -1'aux14_2 + aux14_3 + -1'aux14_4 + aux14_5 + aux14_6 + aux14_7 + -1'aux13_0 + -1'aux13_1 + -3'aux13_2 + -1'aux13_3 + -3'aux13_4 + -1'aux13_5 + -1'aux13_6 + -1'aux13_7 + -2'out1_2 + -2'out1_4 + -1'out2_0 + -1'out2_1 + -3'out2_2 + -1'out2_3 + -3'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 + -2'out3_2 + -2'out3_4 + -1'out4_0 + -1'out4_1 + -3'out4_2 + -1'out4_3 + -3'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 + -2'out5_2 + -2'out5_4 + out6_0 + out6_1 + -1'out6_2 + out6_3 + -1'out6_4 + out6_5 + out6_6 + out6_7 + -2'out7_2 + -2'out7_4 + out8_0 + out8_1 + -1'out8_2 + out8_3 + -1'out8_4 + out8_5 + out8_6 + out8_7 = -40
invariant :aux9_4 + aux10_4 + aux11_4 + aux12_4 + in1_4 + in2_4 + in3_4 + in4_4 + aux8_4 + aux7_4 + aux6_4 + aux5_4 + aux16_4 + aux15_4 + aux14_4 + aux13_4 + out1_4 + out2_4 + out3_4 + out4_4 + out5_4 + out6_4 + out7_4 + out8_4 = 10
invariant :aux9_2 + aux10_2 + aux11_2 + aux12_2 + in1_2 + in2_2 + in3_2 + in4_2 + aux8_2 + aux7_2 + aux6_2 + aux5_2 + aux16_2 + aux15_2 + aux14_2 + aux13_2 + out1_2 + out2_2 + out3_2 + out4_2 + out5_2 + out6_2 + out7_2 + out8_2 = 10
invariant :2'c7_0 + 2'in3_0 + 2'in3_1 + 2'in3_2 + 2'in3_3 + 2'in3_4 + 2'in3_5 + 2'in3_6 + 2'in3_7 + -2'in4_0 + -2'in4_1 + -2'in4_2 + -2'in4_3 + -2'in4_4 + -2'in4_5 + -2'in4_6 + -2'in4_7 + aux5_0 + aux5_1 + aux5_2 + aux5_3 + aux5_4 + aux5_5 + aux5_6 + aux5_7 + -2'c9_0 + -1'c110_0 = 0
invariant :-2'aux9_0 + -2'aux9_1 + -2'aux9_2 + -2'aux9_3 + -2'aux9_4 + 2'aux10_5 + 2'aux10_6 + 2'aux10_7 + 2'aux11_5 + 2'aux11_6 + 2'aux11_7 + 2'aux12_5 + 2'aux12_6 + 2'aux12_7 + 2'in1_5 + 2'in1_6 + 2'in1_7 + -4'c5_0 + 2'in2_5 + 2'in2_6 + 2'in2_7 + 2'in3_5 + 2'in3_6 + 2'in3_7 + 2'in4_5 + 2'in4_6 + 2'in4_7 + 2'aux8_5 + 2'aux8_6 + 2'aux8_7 + 2'aux7_5 + 2'aux7_6 + 2'aux7_7 + 2'aux6_5 + 2'aux6_6 + 2'aux6_7 + -2'aux5_0 + -2'aux5_1 + -2'aux5_2 + -2'aux5_3 + -2'aux5_4 + 2'c110_0 + 2'aux16_5 + 2'aux16_6 + 2'aux16_7 + 2'aux15_5 + 2'aux15_6 + 2'aux15_7 + -1'aux14_0 + -1'aux14_1 + -1'aux14_2 + -1'aux14_3 + -1'aux14_4 + aux14_5 + aux14_6 + aux14_7 + -1'aux13_0 + -1'aux13_1 + -1'aux13_2 + -1'aux13_3 + -1'aux13_4 + aux13_5 + aux13_6 + aux13_7 + 2'out1_5 + 2'out1_6 + 2'out1_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + out2_5 + out2_6 + out2_7 + 2'out3_5 + 2'out3_6 + 2'out3_7 + -1'out4_0 + -1'out4_1 + -1'out4_2 + -1'out4_3 + -1'out4_4 + out4_5 + out4_6 + out4_7 + 2'out5_5 + 2'out5_6 + 2'out5_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + out6_5 + out6_6 + out6_7 + 2'out7_5 + 2'out7_6 + 2'out7_7 + -1'out8_0 + -1'out8_1 + -1'out8_2 + -1'out8_3 + -1'out8_4 + out8_5 + out8_6 + out8_7 = 20
invariant :out1_0 + out1_1 + out1_2 + out1_3 + out1_4 + out1_5 + out1_6 + out1_7 + -1'out2_0 + -1'out2_1 + -1'out2_2 + -1'out2_3 + -1'out2_4 + -1'out2_5 + -1'out2_6 + -1'out2_7 = 0
invariant :out3_0 + out3_1 + out3_2 + out3_3 + out3_4 + out3_5 + out3_6 + out3_7 + -1'out4_0 + -1'out4_1 + -1'out4_2 + -1'out4_3 + -1'out4_4 + -1'out4_5 + -1'out4_6 + -1'out4_7 = 0
invariant :out5_0 + out5_1 + out5_2 + out5_3 + out5_4 + out5_5 + out5_6 + out5_7 + -1'out6_0 + -1'out6_1 + -1'out6_2 + -1'out6_3 + -1'out6_4 + -1'out6_5 + -1'out6_6 + -1'out6_7 = 0
invariant :out7_0 + out7_1 + out7_2 + out7_3 + out7_4 + out7_5 + out7_6 + out7_7 + -1'out8_0 + -1'out8_1 + -1'out8_2 + -1'out8_3 + -1'out8_4 + -1'out8_5 + -1'out8_6 + -1'out8_7 = 0
invariant :-4'c5_0 + 2'in4_0 + 2'in4_1 + 2'in4_2 + 2'in4_3 + 2'in4_4 + 2'in4_5 + 2'in4_6 + 2'in4_7 + aux7_0 + aux7_1 + aux7_2 + aux7_3 + aux7_4 + aux7_5 + aux7_6 + aux7_7 + -2'aux5_0 + -2'aux5_1 + -2'aux5_2 + -2'aux5_3 + -2'aux5_4 + -2'aux5_5 + -2'aux5_6 + -2'aux5_7 + 2'c9_0 + c110_0 = 0
FORMULA PermAdmissibility-COL-10-ReachabilityCardinality-04 FALSE TECHNIQUES SAT_SMT K_INDUCTION(0)
FORMULA PermAdmissibility-COL-10-ReachabilityCardinality-09 TRUE TECHNIQUES SAT_SMT K_INDUCTION(0)
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread failed on error :java.lang.RuntimeException: Could not compile executable .CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 18, 2019 4:30:17 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 18, 2019 4:30:17 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 18, 2019 4:30:17 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
Mar 18, 2019 4:30:42 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 24668 ms
Mar 18, 2019 4:30:42 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 40 places.
Mar 18, 2019 4:30:42 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
Mar 18, 2019 4:30:42 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :input->aux9,aux10,aux11,aux12,in1,in2,in3,in4,aux8,aux7,aux6,aux5,aux16,aux15,aux14,aux13,out1,out2,out3,out4,out5,out6,out7,out8,
Dot->c16,c15,c14,c13,c5,c6,c7,c8,c9,c110,c11,c12,c17,c18,c19,c20,

Mar 18, 2019 4:30:42 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 16 transitions.
Mar 18, 2019 4:30:42 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
Mar 18, 2019 4:30:42 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 5 ms
Mar 18, 2019 4:30:42 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 139 ms
Mar 18, 2019 4:30:44 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 192 ms
Mar 18, 2019 4:30:44 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 206 ms
Mar 18, 2019 4:30:44 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 24 ms
Mar 18, 2019 4:30:44 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
Mar 18, 2019 4:30:44 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 16 transitions. Expanding to a total of 1200 deterministic transitions.
Mar 18, 2019 4:30:44 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 16 transitions. Expanding to a total of 1200 deterministic transitions.
Mar 18, 2019 4:30:44 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 9 ms.
Mar 18, 2019 4:30:44 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 20 ms.
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 1047 ms.
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 31 place invariants in 168 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-00(UNSAT) depth K=0 took 16 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-01(UNSAT) depth K=0 took 15 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-02(UNSAT) depth K=0 took 4 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-03(UNSAT) depth K=0 took 5 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-04(UNSAT) depth K=0 took 16 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-05(UNSAT) depth K=0 took 8 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-06(UNSAT) depth K=0 took 7 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-07(UNSAT) depth K=0 took 9 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-08(UNSAT) depth K=0 took 7 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-09(UNSAT) depth K=0 took 17 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-10(UNSAT) depth K=0 took 12 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 16 transitions. Expanding to a total of 1200 deterministic transitions.
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-11(UNSAT) depth K=0 took 8 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 7 ms.
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-12(UNSAT) depth K=0 took 11 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-13(UNSAT) depth K=0 took 12 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-14(UNSAT) depth K=0 took 20 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-15(UNSAT) depth K=0 took 16 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-00(UNSAT) depth K=1 took 16 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-01(UNSAT) depth K=1 took 16 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-02(UNSAT) depth K=1 took 16 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-03(UNSAT) depth K=1 took 16 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-04(UNSAT) depth K=1 took 16 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-05(UNSAT) depth K=1 took 16 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-06(UNSAT) depth K=1 took 16 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-07(UNSAT) depth K=1 took 16 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-08(UNSAT) depth K=1 took 16 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-09(UNSAT) depth K=1 took 16 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-10(UNSAT) depth K=1 took 16 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-11(UNSAT) depth K=1 took 27 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-12(UNSAT) depth K=1 took 16 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-13(UNSAT) depth K=1 took 16 ms
Mar 18, 2019 4:30:45 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-14(UNSAT) depth K=1 took 16 ms
Mar 18, 2019 4:30:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-15(UNSAT) depth K=1 took 16 ms
Mar 18, 2019 4:30:46 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 31 place invariants in 126 ms
Mar 18, 2019 4:30:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-00(UNSAT) depth K=2 took 152 ms
Mar 18, 2019 4:30:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-01(UNSAT) depth K=2 took 173 ms
Mar 18, 2019 4:30:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-02(UNSAT) depth K=2 took 62 ms
Mar 18, 2019 4:30:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-03(UNSAT) depth K=2 took 161 ms
Mar 18, 2019 4:30:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-04(UNSAT) depth K=2 took 133 ms
Mar 18, 2019 4:30:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-05(UNSAT) depth K=2 took 54 ms
Mar 18, 2019 4:30:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-06(UNSAT) depth K=2 took 84 ms
Mar 18, 2019 4:30:46 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-07(UNSAT) depth K=2 took 136 ms
Mar 18, 2019 4:30:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-08(UNSAT) depth K=2 took 51 ms
Mar 18, 2019 4:30:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-09(UNSAT) depth K=2 took 93 ms
Mar 18, 2019 4:30:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-10(UNSAT) depth K=2 took 185 ms
Mar 18, 2019 4:30:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-11(UNSAT) depth K=2 took 89 ms
Mar 18, 2019 4:30:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-12(UNSAT) depth K=2 took 73 ms
Mar 18, 2019 4:30:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-13(UNSAT) depth K=2 took 81 ms
Mar 18, 2019 4:30:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-14(UNSAT) depth K=2 took 164 ms
Mar 18, 2019 4:30:47 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 208 variables to be positive in 2414 ms
Mar 18, 2019 4:30:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 1024 transitions.
Mar 18, 2019 4:30:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/1024 took 0 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 18, 2019 4:30:47 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-15(UNSAT) depth K=2 took 132 ms
Mar 18, 2019 4:30:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 77 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 18, 2019 4:30:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 1024 transitions.
Mar 18, 2019 4:30:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 47 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 18, 2019 4:30:47 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 208 variables to be positive in 2066 ms
Mar 18, 2019 4:30:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-00(UNSAT) depth K=3 took 1022 ms
Mar 18, 2019 4:30:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-00
Mar 18, 2019 4:30:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-00(SAT) depth K=0 took 3169 ms
Mar 18, 2019 4:30:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-01(UNSAT) depth K=3 took 3079 ms
Mar 18, 2019 4:30:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-02(UNSAT) depth K=3 took 904 ms
Mar 18, 2019 4:30:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-01
Mar 18, 2019 4:30:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-01(SAT) depth K=0 took 6596 ms
Mar 18, 2019 4:31:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-02
Mar 18, 2019 4:31:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-02(SAT) depth K=0 took 4051 ms
Mar 18, 2019 4:31:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-03(UNSAT) depth K=3 took 10881 ms
Mar 18, 2019 4:31:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-03
Mar 18, 2019 4:31:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-03(SAT) depth K=0 took 5802 ms
Mar 18, 2019 4:31:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-04(UNSAT) depth K=3 took 5331 ms
Mar 18, 2019 4:31:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved UNreachability of reachability predicate PermAdmissibility-COL-10-ReachabilityCardinality-04
Mar 18, 2019 4:31:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for PermAdmissibility-COL-10-ReachabilityCardinality-04
Mar 18, 2019 4:31:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-04(FALSE) depth K=0 took 44994 ms
Mar 18, 2019 4:31:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-05
Mar 18, 2019 4:31:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-05(SAT) depth K=0 took 3252 ms
Mar 18, 2019 4:32:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-06
Mar 18, 2019 4:32:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-06(SAT) depth K=0 took 5002 ms
Mar 18, 2019 4:32:09 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-05(UNSAT) depth K=3 took 60352 ms
Mar 18, 2019 4:32:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-07
Mar 18, 2019 4:32:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-07(SAT) depth K=0 took 9662 ms
Mar 18, 2019 4:32:11 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-06(UNSAT) depth K=3 took 2434 ms
Mar 18, 2019 4:32:13 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-07(UNSAT) depth K=3 took 1644 ms
Mar 18, 2019 4:32:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-08(UNSAT) depth K=3 took 14400 ms
Mar 18, 2019 4:32:32 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-09(UNSAT) depth K=3 took 4180 ms
Mar 18, 2019 4:32:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-08
Mar 18, 2019 4:32:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-08(SAT) depth K=0 took 31167 ms
Mar 18, 2019 4:32:55 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-10(UNSAT) depth K=3 took 23322 ms
Mar 18, 2019 4:33:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-11(UNSAT) depth K=3 took 23258 ms
Mar 18, 2019 4:33:26 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-12(UNSAT) depth K=3 took 8299 ms
Mar 18, 2019 4:33:41 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-13(UNSAT) depth K=3 took 14621 ms
Mar 18, 2019 4:33:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-14(UNSAT) depth K=3 took 2201 ms
Mar 18, 2019 4:33:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, proved invariant PermAdmissibility-COL-10-ReachabilityCardinality-09
Mar 18, 2019 4:33:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is UNSAT, successfully proved induction at step 0 for PermAdmissibility-COL-10-ReachabilityCardinality-09
Mar 18, 2019 4:33:48 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-09(TRUE) depth K=0 took 67129 ms
Mar 18, 2019 4:33:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-10
Mar 18, 2019 4:33:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-10(SAT) depth K=0 took 3159 ms
Mar 18, 2019 4:34:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-11
Mar 18, 2019 4:34:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-11(SAT) depth K=0 took 9046 ms
Mar 18, 2019 4:34:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-12
Mar 18, 2019 4:34:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-12(SAT) depth K=0 took 9109 ms
Mar 18, 2019 4:34:25 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-15(UNSAT) depth K=3 took 41644 ms
Mar 18, 2019 4:34:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-13
Mar 18, 2019 4:34:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-13(SAT) depth K=0 took 32334 ms
Mar 18, 2019 4:34:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-14
Mar 18, 2019 4:34:54 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-14(SAT) depth K=0 took 11626 ms
Mar 18, 2019 4:35:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-15
Mar 18, 2019 4:35:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-15(SAT) depth K=0 took 7297 ms
Mar 18, 2019 4:35:46 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 1024 transitions.
Mar 18, 2019 4:36:05 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(0/1024) took 19039 ms. Total solver calls (SAT/UNSAT): 1002(1002/0)
Mar 18, 2019 4:36:10 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-00(UNSAT) depth K=4 took 105394 ms
Mar 18, 2019 4:36:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(1/1024) took 38800 ms. Total solver calls (SAT/UNSAT): 2003(2003/0)
Mar 18, 2019 4:36:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(2/1024) took 58689 ms. Total solver calls (SAT/UNSAT): 3019(3019/0)
Mar 18, 2019 4:37:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(3/1024) took 78014 ms. Total solver calls (SAT/UNSAT): 4021(4021/0)
Mar 18, 2019 4:37:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(4/1024) took 97624 ms. Total solver calls (SAT/UNSAT): 5035(5035/0)
Mar 18, 2019 4:37:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(5/1024) took 118677 ms. Total solver calls (SAT/UNSAT): 6041(6041/0)
Mar 18, 2019 4:38:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(6/1024) took 137829 ms. Total solver calls (SAT/UNSAT): 7046(7046/0)
Mar 18, 2019 4:38:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-01(UNSAT) depth K=4 took 129864 ms
Mar 18, 2019 4:38:24 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(7/1024) took 157701 ms. Total solver calls (SAT/UNSAT): 8044(8044/0)
Mar 18, 2019 4:38:42 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(8/1024) took 176074 ms. Total solver calls (SAT/UNSAT): 9038(9038/0)
Mar 18, 2019 4:39:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(9/1024) took 194274 ms. Total solver calls (SAT/UNSAT): 9988(9988/0)
Mar 18, 2019 4:39:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(10/1024) took 213085 ms. Total solver calls (SAT/UNSAT): 10996(10996/0)
Mar 18, 2019 4:39:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(11/1024) took 230910 ms. Total solver calls (SAT/UNSAT): 11948(11948/0)
Mar 18, 2019 4:39:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(12/1024) took 250832 ms. Total solver calls (SAT/UNSAT): 12954(12954/0)
Mar 18, 2019 4:40:16 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(13/1024) took 269767 ms. Total solver calls (SAT/UNSAT): 13912(13912/0)
Mar 18, 2019 4:40:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(14/1024) took 288273 ms. Total solver calls (SAT/UNSAT): 14869(14869/0)
Mar 18, 2019 4:40:44 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-02(UNSAT) depth K=4 took 143407 ms
Mar 18, 2019 4:40:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(15/1024) took 306540 ms. Total solver calls (SAT/UNSAT): 15817(15817/0)
Mar 18, 2019 4:41:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(16/1024) took 326691 ms. Total solver calls (SAT/UNSAT): 16819(16819/0)
Mar 18, 2019 4:41:30 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-03(UNSAT) depth K=4 took 46855 ms
Mar 18, 2019 4:41:31 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(17/1024) took 345580 ms. Total solver calls (SAT/UNSAT): 17820(17820/0)
Mar 18, 2019 4:41:51 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(18/1024) took 365571 ms. Total solver calls (SAT/UNSAT): 18820(18820/0)
Mar 18, 2019 4:42:10 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(19/1024) took 384396 ms. Total solver calls (SAT/UNSAT): 19820(19820/0)
SMT solver raised 'unknown', retrying with same input.
SMT solver raised 'unknown', retrying with same input.
Mar 18, 2019 4:42:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(20/1024) took 405820 ms. Total solver calls (SAT/UNSAT): 20822(20822/0)
Mar 18, 2019 4:42:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(21/1024) took 428198 ms. Total solver calls (SAT/UNSAT): 21822(21822/0)
SMT solver raised 'unknown', retrying with same input.
Mar 18, 2019 4:43:17 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(22/1024) took 451165 ms. Total solver calls (SAT/UNSAT): 22821(22821/0)
Mar 18, 2019 4:43:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(23/1024) took 470956 ms. Total solver calls (SAT/UNSAT): 23817(23817/0)
Mar 18, 2019 4:43:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(24/1024) took 490734 ms. Total solver calls (SAT/UNSAT): 24795(24795/0)
Mar 18, 2019 4:44:07 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(25/1024) took 501517 ms. Total solver calls (SAT/UNSAT): 25352(25352/0)
Mar 18, 2019 4:44:23 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-05(UNSAT) depth K=4 took 172327 ms
Mar 18, 2019 4:44:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(26/1024) took 520199 ms. Total solver calls (SAT/UNSAT): 26344(26344/0)
Mar 18, 2019 4:44:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(27/1024) took 538823 ms. Total solver calls (SAT/UNSAT): 27280(27280/0)
Mar 18, 2019 4:45:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(28/1024) took 557953 ms. Total solver calls (SAT/UNSAT): 28270(28270/0)
SMT solver raised 'unknown', retrying with same input.
Mar 18, 2019 4:45:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(29/1024) took 576664 ms. Total solver calls (SAT/UNSAT): 29212(29212/0)
Mar 18, 2019 4:45:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(30/1024) took 595603 ms. Total solver calls (SAT/UNSAT): 30153(30153/0)
Mar 18, 2019 4:45:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-00
Mar 18, 2019 4:45:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-00(SAT) depth K=1 took 658040 ms
Mar 18, 2019 4:45:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(31/1024) took 613530 ms. Total solver calls (SAT/UNSAT): 31085(31085/0)
Mar 18, 2019 4:46:19 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(32/1024) took 633211 ms. Total solver calls (SAT/UNSAT): 32071(32071/0)
Mar 18, 2019 4:46:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(33/1024) took 652136 ms. Total solver calls (SAT/UNSAT): 33056(33056/0)
Mar 18, 2019 4:47:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(34/1024) took 673921 ms. Total solver calls (SAT/UNSAT): 34044(34044/0)
Mar 18, 2019 4:47:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(35/1024) took 692635 ms. Total solver calls (SAT/UNSAT): 35028(35028/0)
Mar 18, 2019 4:47:38 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(36/1024) took 712202 ms. Total solver calls (SAT/UNSAT): 36010(36010/0)
Mar 18, 2019 4:48:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(37/1024) took 737295 ms. Total solver calls (SAT/UNSAT): 36994(36994/0)
Mar 18, 2019 4:48:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-06(UNSAT) depth K=4 took 222716 ms
Mar 18, 2019 4:48:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(38/1024) took 768707 ms. Total solver calls (SAT/UNSAT): 37977(37977/0)
Mar 18, 2019 4:48:38 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-07(UNSAT) depth K=4 took 32011 ms
Mar 18, 2019 4:48:59 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(39/1024) took 793256 ms. Total solver calls (SAT/UNSAT): 38957(38957/0)
Mar 18, 2019 4:49:22 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(40/1024) took 816530 ms. Total solver calls (SAT/UNSAT): 39920(39920/0)
Mar 18, 2019 4:49:45 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(41/1024) took 839220 ms. Total solver calls (SAT/UNSAT): 40767(40767/0)
Mar 18, 2019 4:50:13 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(42/1024) took 866740 ms. Total solver calls (SAT/UNSAT): 41738(41738/0)
SMT solver raised 'unknown', retrying with same input.
Mar 18, 2019 4:50:37 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(43/1024) took 890777 ms. Total solver calls (SAT/UNSAT): 42666(42666/0)
Mar 18, 2019 4:51:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-01
Mar 18, 2019 4:51:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-01(SAT) depth K=1 took 302399 ms
Mar 18, 2019 4:51:03 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(44/1024) took 917502 ms. Total solver calls (SAT/UNSAT): 43635(43635/0)
Mar 18, 2019 4:51:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-02
Mar 18, 2019 4:51:17 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-02(SAT) depth K=1 took 15743 ms
Mar 18, 2019 4:51:23 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(45/1024) took 937055 ms. Total solver calls (SAT/UNSAT): 44561(44561/0)
Mar 18, 2019 4:51:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-03
Mar 18, 2019 4:51:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-03(SAT) depth K=1 took 18975 ms
Mar 18, 2019 4:51:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(46/1024) took 955637 ms. Total solver calls (SAT/UNSAT): 45490(45490/0)
Mar 18, 2019 4:52:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(47/1024) took 973882 ms. Total solver calls (SAT/UNSAT): 46414(46414/0)
Mar 18, 2019 4:52:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(48/1024) took 992080 ms. Total solver calls (SAT/UNSAT): 47369(47369/0)
Mar 18, 2019 4:52:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(49/1024) took 1009117 ms. Total solver calls (SAT/UNSAT): 48208(48208/0)
SMT solver raised 'unknown', retrying with same input.
Mar 18, 2019 4:52:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(50/1024) took 1029308 ms. Total solver calls (SAT/UNSAT): 49171(49171/0)
Mar 18, 2019 4:53:14 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(51/1024) took 1047699 ms. Total solver calls (SAT/UNSAT): 50091(50091/0)
Mar 18, 2019 4:53:34 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(52/1024) took 1067950 ms. Total solver calls (SAT/UNSAT): 51052(51052/0)
Mar 18, 2019 4:53:43 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-08(UNSAT) depth K=4 took 305222 ms
Mar 18, 2019 4:53:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-05
Mar 18, 2019 4:53:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-05(SAT) depth K=1 took 133263 ms
Mar 18, 2019 4:53:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(53/1024) took 1088052 ms. Total solver calls (SAT/UNSAT): 51974(51974/0)
Mar 18, 2019 4:54:11 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(54/1024) took 1105534 ms. Total solver calls (SAT/UNSAT): 52891(52891/0)
SMT solver raised 'unknown', retrying with same input.
Mar 18, 2019 4:54:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(55/1024) took 1123694 ms. Total solver calls (SAT/UNSAT): 53807(53807/0)
Mar 18, 2019 4:54:49 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(56/1024) took 1142728 ms. Total solver calls (SAT/UNSAT): 54748(54748/0)
Mar 18, 2019 4:54:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-06
Mar 18, 2019 4:54:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-06(SAT) depth K=1 took 59850 ms
Mar 18, 2019 4:54:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-07
Mar 18, 2019 4:54:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-07(SAT) depth K=1 took 7339 ms
Mar 18, 2019 4:55:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(57/1024) took 1158383 ms. Total solver calls (SAT/UNSAT): 55559(55559/0)
Skipping mayMatrices nes/nds SMT solver raised an exception or timeout.
java.lang.RuntimeException: SMT solver raised an exception or timeout.
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.computeCoEnablingMatrix(NecessaryEnablingsolver.java:480)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:530)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Mar 18, 2019 4:55:12 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 1468171ms conformant to PINS in folder :/home/mcc/execution

cc1: out of memory allocating 131072 bytes after a total of 4616192 bytes
java.lang.RuntimeException: Could not compile executable .CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
at fr.lip6.move.gal.application.LTSminRunner.compilePINS(LTSminRunner.java:241)
at fr.lip6.move.gal.application.LTSminRunner.access$6(LTSminRunner.java:224)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:75)
at java.lang.Thread.run(Thread.java:748)
ITS-tools command line returned an error code 137
Mar 18, 2019 4:55:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-10(UNSAT) depth K=4 took 128426 ms
Mar 18, 2019 4:56:39 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-11(UNSAT) depth K=4 took 47583 ms
Mar 18, 2019 4:58:06 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-12(UNSAT) depth K=4 took 87098 ms
Mar 18, 2019 4:58:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-08
Mar 18, 2019 4:58:18 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-08(SAT) depth K=1 took 201227 ms
Mar 18, 2019 4:59:03 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-13(UNSAT) depth K=4 took 57344 ms
Mar 18, 2019 5:00:21 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-14(UNSAT) depth K=4 took 77718 ms
Mar 18, 2019 5:00:51 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-15(UNSAT) depth K=4 took 29811 ms
Mar 18, 2019 5:01:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-10
Mar 18, 2019 5:01:20 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-10(SAT) depth K=1 took 182146 ms
Mar 18, 2019 5:01:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-11
Mar 18, 2019 5:01:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-11(SAT) depth K=1 took 20346 ms
Mar 18, 2019 5:03:36 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-00(UNSAT) depth K=5 took 165170 ms
Mar 18, 2019 5:05:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-01(UNSAT) depth K=5 took 140807 ms
Mar 18, 2019 5:05:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-12
Mar 18, 2019 5:05:57 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-12(SAT) depth K=1 took 257072 ms
Mar 18, 2019 5:07:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-13
Mar 18, 2019 5:07:14 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-13(SAT) depth K=1 took 76893 ms
Mar 18, 2019 5:09:15 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-02(UNSAT) depth K=5 took 198524 ms
Mar 18, 2019 5:09:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-14
Mar 18, 2019 5:09:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-14(SAT) depth K=1 took 147953 ms
Mar 18, 2019 5:10:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-15
Mar 18, 2019 5:10:40 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-15(SAT) depth K=1 took 58035 ms
Mar 18, 2019 5:10:52 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-03(UNSAT) depth K=5 took 96956 ms
Mar 18, 2019 5:14:04 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-05(UNSAT) depth K=5 took 192030 ms
Mar 18, 2019 5:17:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-00
Mar 18, 2019 5:17:42 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-00(SAT) depth K=2 took 421333 ms
Mar 18, 2019 5:18:59 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-06(UNSAT) depth K=5 took 294463 ms
Mar 18, 2019 5:21:49 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-07(UNSAT) depth K=5 took 170591 ms
Mar 18, 2019 5:24:27 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-08(UNSAT) depth K=5 took 157633 ms
Mar 18, 2019 5:25:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-01
Mar 18, 2019 5:25:35 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-01(SAT) depth K=2 took 473069 ms
Mar 18, 2019 5:28:07 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property PermAdmissibility-COL-10-ReachabilityCardinality-10(UNSAT) depth K=5 took 220505 ms
Mar 18, 2019 5:30:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: Induction result is SAT, non conclusive we might be starting from unreachable statesPermAdmissibility-COL-10-ReachabilityCardinality-02
Mar 18, 2019 5:30:08 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runKInduction
INFO: KInduction solution for property PermAdmissibility-COL-10-ReachabilityCardinality-02(SAT) depth K=2 took 273112 ms

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-COL-10"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is PermAdmissibility-COL-10, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r107-oct2-155272230900395"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-COL-10.tgz
mv PermAdmissibility-COL-10 execution
cd execution
if [ "ReachabilityCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;