fond
Model Checking Contest 2019
9th edition, Prague, Czech Republic, April 7, 2019 (TOOLympics)
Execution of r107-oct2-155272230700372
Last Updated
Apr 15, 2019

About the Execution of ITS-Tools for PermAdmissibility-COL-02

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
6869.970 506727.00 1308792.00 257.40 T normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2019-input.r107-oct2-155272230700372.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2019-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is PermAdmissibility-COL-02, examination is GlobalProperties
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r107-oct2-155272230700372
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 212K
-rw-r--r-- 1 mcc users 3.6K Feb 12 04:10 CTLCardinality.txt
-rw-r--r-- 1 mcc users 21K Feb 12 04:10 CTLCardinality.xml
-rw-r--r-- 1 mcc users 2.6K Feb 8 03:11 CTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 8 03:11 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 111 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 349 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.2K Feb 5 00:22 LTLCardinality.txt
-rw-r--r-- 1 mcc users 8.3K Feb 5 00:22 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.0K Feb 4 22:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 8.7K Feb 4 22:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Feb 4 07:56 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 20K Feb 4 07:56 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 1 02:08 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 14K Feb 1 02:08 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 4 22:22 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 4 22:22 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 equiv_pt

-rw-r--r-- 1 mcc users 3 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 5 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 54K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PermAdmissibility-COL-02-GlobalProperties-0

=== Now, execution of the tool begins

BK_START 1552924430099

15:54:15.941 [main] ERROR PNML validation - The rng grammar file can't be accessed : www.pnml.org
15:54:15.946 [main] ERROR import - Grammar file errors have been raised, the validation can't be done, process will continue without Grammar validation
Working with output stream class java.io.PrintStream
Flatten gal took : 511 ms
Constant places removed 88 places and 240 transitions.
Iterating post reduction 0 with 88 rules applied. Total rules applied 88 place count 120 transition count 784
Constant places removed 16 places and 192 transitions.
Iterating post reduction 1 with 16 rules applied. Total rules applied 104 place count 104 transition count 592
Symmetric choice reduction at 2 with 28 rule applications. Total rules 132 place count 104 transition count 592
Constant places removed 28 places and 252 transitions.
Iterating post reduction 2 with 28 rules applied. Total rules applied 160 place count 76 transition count 340
Applied a total of 160 rules in 22 ms. Remains 76 /208 variables (removed 132) and now considering 340/1024 (removed 684) transitions.
// Phase 1: matrix 340 rows 76 cols
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 340 rows 76 cols
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ctl-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/GlobalProperties.pnml.gal, -t, CGAL, -ctl, DEADLOCK], workingDir=/home/mcc/execution]

its-ctl command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-ctl-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/GlobalProperties.pnml.gal -t CGAL -ctl DEADLOCK
No direction supplied, using forward translation only.
built 200 ordering constraints for composite.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
Compilation finished in 4977 ms.
Running link step : CommandLine [args=[gcc, -shared, -o, gal.so, model.o], workingDir=/home/mcc/execution]
Link finished in 63 ms.
Running LTSmin : CommandLine [args=[/home/mcc/BenchKit//lts_install_dir//bin/pins2lts-mc, ./gal.so, --threads=8, -p, --pins-guards, --when, -d], workingDir=/home/mcc/execution]
LTSmin run took 29533 ms.
FORMULA PermAdmissibility-COL-02-GlobalProperties-0 TRUE TECHNIQUES PARTIAL_ORDER EXPLICIT LTSMIN SAT_SMT
ITS tools runner thread asked to quit. Dying gracefully.

BK_STOP 1552924936826

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ GlobalProperties = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution GlobalProperties -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination GlobalProperties -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 18, 2019 3:53:51 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, GlobalProperties, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 18, 2019 3:53:51 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 18, 2019 3:53:51 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
Mar 18, 2019 3:54:16 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Load time of PNML (colored model parsed with PNMLFW) : 24757 ms
Mar 18, 2019 3:54:16 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 40 places.
Mar 18, 2019 3:54:16 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Computed order using colors.
Mar 18, 2019 3:54:16 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: sort/places :input->out8,out7,out6,out5,out4,out3,out2,out1,aux13,aux15,aux14,aux16,aux5,aux8,aux6,aux7,in4,in3,in2,in1,aux12,aux9,aux10,aux11,
Dot->c20,c18,c19,c17,c12,c110,c11,c9,c8,c7,c6,c5,c13,c16,c15,c14,

Mar 18, 2019 3:54:16 PM fr.lip6.move.gal.pnml.togal.HLGALTransformer handlePage
INFO: Transformed 16 transitions.
Mar 18, 2019 3:54:16 PM fr.lip6.move.gal.pnml.togal.PnmlToGalTransformer transform
INFO: Computed order based on color domains.
Mar 18, 2019 3:54:16 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 6 ms
Mar 18, 2019 3:54:16 PM fr.lip6.move.gal.instantiate.PropertySimplifier evalInInitialState
WARNING: Unexpected boolean logic operator in evalInInitialState fr.lip6.move.gal.impl.EXImpl
Mar 18, 2019 3:54:16 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property PermAdmissibility-COL-02-GlobalProperties-0 is trivially true : it is verified in initial state.
Mar 18, 2019 3:54:16 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 161 ms
Mar 18, 2019 3:54:16 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.simple.gal : 26 ms
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was not deterministic with 16 transitions. Expanding to a total of 1200 deterministic transitions.
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Determinization took 7 ms.
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.application.MccTranslator applyOrder
INFO: Applying decomposition
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 340 transitions.
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property PermAdmissibility-COL-02-GlobalProperties-0 is trivially true : it is verified in initial state.
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 86 ms
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property PermAdmissibility-COL-02-GlobalProperties-0 is trivially true : it is verified in initial state.
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 61 ms
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.CompositeBuilder decomposeWithOrder
INFO: Decomposing Gal with order
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.CompositeBuilder rewriteArraysToAllowPartition
INFO: Rewriting arrays to variables to allow decomposition.
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 0 place invariants in 18 ms
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 68 events :t808,t808,t773,t773,t813,t773,t773,t773,t773,t773,t808,t808,t808,t808,t808,t837,t837,t872,t872,t877,t872,t872,t872,t872,t872,t837,t837,t837,t837,t837,t837,t837,t872,t872,t872,t872,t872,t872,t837,t837,t837,t837,t773,t773,t808,t808,t808,t808,t808,t808,t773,t773,t773,t773,t744,t616,t469,t469,t469,t405,t405,t405,t362,t362,t362,t298,t298,t298,
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 126 events :t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 68 events :t831,t775,t775,t775,t775,t775,t775,t775,t824,t824,t824,t824,t824,t824,t824,t895,t888,t888,t888,t888,t888,t888,t888,t839,t839,t839,t839,t839,t839,t839,t888,t888,t888,t888,t888,t888,t839,t839,t839,t839,t839,t839,t824,t824,t824,t824,t824,t824,t775,t775,t775,t775,t775,t775,t663,t535,t504,t504,t504,t440,t440,t440,t327,t327,t327,t263,t263,t263,
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 68 events :t800,t800,t800,t772,t772,t772,t804,t772,t772,t772,t772,t800,t800,t800,t800,t836,t836,t836,t864,t864,t864,t868,t864,t864,t864,t864,t836,t836,t836,t836,t836,t836,t836,t864,t864,t864,t864,t864,t864,t836,t836,t836,t772,t772,t772,t800,t800,t800,t800,t800,t800,t772,t772,t772,t736,t608,t468,t468,t468,t404,t404,t404,t354,t354,t354,t290,t290,t290,
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 30 events :t400,t400,t400,t400,t400,t400,t400,t400,t400,t400,t400,t400,t400,t400,t400,t258,t258,t258,t258,t258,t258,t258,t258,t258,t258,t258,t258,t258,t258,t258,
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 30 events :t464,t464,t464,t464,t464,t464,t464,t464,t464,t464,t464,t464,t464,t464,t464,t322,t322,t322,t322,t322,t322,t322,t322,t322,t322,t322,t322,t322,t322,t322,
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 68 events :t792,t792,t792,t792,t771,t771,t771,t771,t795,t771,t771,t771,t792,t792,t792,t835,t835,t835,t835,t856,t856,t856,t856,t859,t856,t856,t856,t835,t835,t835,t835,t835,t835,t835,t856,t856,t856,t856,t856,t856,t835,t835,t771,t771,t771,t771,t792,t792,t792,t792,t792,t792,t771,t771,t670,t542,t472,t472,t472,t408,t408,t408,t323,t323,t323,t259,t259,t259,
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 252 events :t969,t970,t970,t970,t970,t970,t970,t968,t970,t969,t970,t970,t970,t970,t970,t968,t970,t970,t969,t970,t970,t970,t970,t968,t970,t970,t970,t969,t970,t970,t970,t968,t970,t970,t970,t970,t969,t970,t970,t968,t970,t970,t970,t970,t970,t969,t970,t968,t970,t970,t970,t970,t970,t961,t961,t961,t961,t961,t961,t905,t906,t906,t906,t906,t906,t906,t904,t906,t905,t906,t906,t906,t906,t906,t904,t906,t906,t905,t906,t906,t906,t906,t904,t906,t906,t906,t905,t906,t906,t906,t904,t906,t906,t906,t906,t905,t906,t906,t904,t906,t906,t906,t906,t906,t905,t906,t904,t906,t906,t906,t906,t906,t897,t897,t897,t897,t897,t897,t841,t842,t842,t842,t842,t842,t842,t840,t842,t841,t842,t842,t842,t842,t842,t840,t842,t842,t841,t842,t842,t842,t842,t840,t842,t842,t842,t841,t842,t842,t842,t840,t842,t842,t842,t842,t841,t842,t842,t840,t842,t842,t842,t842,t842,t841,t842,t840,t842,t842,t842,t842,t842,t833,t833,t833,t833,t833,t833,t777,t778,t778,t778,t778,t778,t778,t776,t778,t777,t778,t778,t778,t778,t778,t776,t778,t778,t777,t778,t778,t778,t778,t776,t778,t778,t778,t777,t778,t778,t778,t776,t778,t778,t778,t778,t777,t778,t778,t776,t778,t778,t778,t778,t778,t777,t778,t776,t778,t778,t778,t778,t778,t769,t769,t769,t769,t769,t769,t736,t608,t464,t464,t464,t400,t400,t400,t322,t322,t322,t258,t258,t258,t128,t0,
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 6 events :t736,t736,t736,t608,t608,t608,
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 68 events :t784,t784,t784,t784,t784,t770,t770,t770,t770,t770,t786,t770,t770,t784,t784,t834,t834,t834,t834,t834,t848,t848,t848,t848,t848,t850,t848,t848,t834,t834,t834,t834,t834,t834,t834,t848,t848,t848,t848,t848,t848,t834,t770,t770,t770,t770,t770,t784,t784,t784,t784,t784,t784,t770,t662,t534,t464,t464,t464,t400,t400,t400,t322,t322,t322,t258,t258,t258,
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 3 events :t608,t608,t608,
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 18 events :t534,t534,t534,t464,t464,t464,t464,t464,t464,t464,t464,t464,t464,t464,t464,t464,t464,t464,
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 78 events :t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t258,t258,t258,t258,t258,t258,t258,t258,t258,t258,t258,t258,t258,t258,t258,
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 126 events :t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t960,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,t768,
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 6 events :t662,t662,t662,t534,t534,t534,
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 30 events :t400,t400,t400,t400,t400,t400,t400,t400,t400,t400,t400,t400,t400,t400,t400,t322,t322,t322,t322,t322,t322,t322,t322,t322,t322,t322,t322,t322,t322,t322,
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 68 events :t816,t774,t822,t774,t774,t774,t774,t774,t774,t816,t816,t816,t816,t816,t816,t838,t880,t886,t880,t880,t880,t880,t880,t880,t838,t838,t838,t838,t838,t838,t838,t880,t880,t880,t880,t880,t880,t838,t838,t838,t838,t838,t774,t816,t816,t816,t816,t816,t816,t774,t774,t774,t774,t774,t662,t534,t496,t496,t496,t432,t432,t432,t326,t326,t326,t262,t262,t262,
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 126 events :t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t896,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 6 events :t736,t736,t736,t662,t662,t662,
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 63 events :t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,t832,
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.Instantiator dropEvents
INFO: Dropping 68 events :t776,t776,t776,t776,t776,t776,t769,t769,t769,t769,t769,t769,t777,t769,t776,t833,t833,t833,t833,t833,t833,t840,t840,t840,t840,t840,t840,t841,t840,t833,t833,t833,t833,t833,t833,t833,t840,t840,t840,t840,t840,t840,t769,t769,t769,t769,t769,t769,t776,t776,t776,t776,t776,t776,t737,t609,t465,t465,t465,t401,t401,t401,t330,t330,t330,t266,t266,t266,
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.Instantiator fuseIsomorphicEffects
INFO: Removed a total of 1376 redundant transitions.
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.PropertySimplifier rewriteWithInitialState
INFO: Reachable property PermAdmissibility-COL-02-GlobalProperties-0 is trivially true : it is verified in initial state.
Mar 18, 2019 3:54:17 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 175 ms
Mar 18, 2019 3:54:17 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/GlobalProperties.pnml.gal : 5 ms
Mar 18, 2019 3:54:18 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver init
INFO: Proved 76 variables to be positive in 633 ms
Mar 18, 2019 3:54:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may disable matrix : 340 transitions.
Mar 18, 2019 3:54:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of disable matrix completed :0/340 took 14 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 18, 2019 3:54:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete disable matrix. took 94 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 18, 2019 3:54:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeAblingMatrix
INFO: Computing symmetric may enable matrix : 340 transitions.
Mar 18, 2019 3:54:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Complete enable matrix. took 19 ms. Total solver calls (SAT/UNSAT): 0(0/0)
Mar 18, 2019 3:54:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeCoEnablingMatrix
INFO: Computing symmetric co enabling matrix : 340 transitions.
Mar 18, 2019 3:54:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(24/340) took 3007 ms. Total solver calls (SAT/UNSAT): 334(334/0)
Mar 18, 2019 3:54:26 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(91/340) took 7993 ms. Total solver calls (SAT/UNSAT): 1350(1350/0)
Mar 18, 2019 3:54:30 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(100/340) took 11805 ms. Total solver calls (SAT/UNSAT): 1944(1944/0)
Mar 18, 2019 3:54:33 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(106/340) took 14961 ms. Total solver calls (SAT/UNSAT): 2295(2295/0)
Mar 18, 2019 3:54:36 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(110/340) took 18309 ms. Total solver calls (SAT/UNSAT): 2509(2509/0)
Mar 18, 2019 3:54:40 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(115/340) took 22361 ms. Total solver calls (SAT/UNSAT): 2754(2754/0)
Mar 18, 2019 3:54:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(129/340) took 26337 ms. Total solver calls (SAT/UNSAT): 3307(3307/0)
Mar 18, 2019 3:54:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(139/340) took 29418 ms. Total solver calls (SAT/UNSAT): 3582(3582/0)
Mar 18, 2019 3:54:50 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(147/340) took 32459 ms. Total solver calls (SAT/UNSAT): 3730(3730/0)
Mar 18, 2019 3:54:54 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(152/340) took 35912 ms. Total solver calls (SAT/UNSAT): 4110(4110/0)
Mar 18, 2019 3:54:57 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(155/340) took 39385 ms. Total solver calls (SAT/UNSAT): 4326(4326/0)
Mar 18, 2019 3:55:00 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(162/340) took 42656 ms. Total solver calls (SAT/UNSAT): 4795(4795/0)
Mar 18, 2019 3:55:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(166/340) took 45965 ms. Total solver calls (SAT/UNSAT): 5041(5041/0)
Mar 18, 2019 3:55:08 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(173/340) took 50494 ms. Total solver calls (SAT/UNSAT): 5433(5433/0)
Mar 18, 2019 3:55:12 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(176/340) took 53845 ms. Total solver calls (SAT/UNSAT): 5586(5586/0)
Mar 18, 2019 3:55:15 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(195/340) took 56987 ms. Total solver calls (SAT/UNSAT): 6346(6346/0)
Mar 18, 2019 3:55:18 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(202/340) took 60321 ms. Total solver calls (SAT/UNSAT): 6535(6535/0)
Mar 18, 2019 3:55:21 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(210/340) took 63639 ms. Total solver calls (SAT/UNSAT): 6691(6691/0)
Mar 18, 2019 3:55:25 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(214/340) took 67528 ms. Total solver calls (SAT/UNSAT): 6892(6892/0)
Mar 18, 2019 3:55:29 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(232/340) took 70886 ms. Total solver calls (SAT/UNSAT): 7819(7819/0)
Mar 18, 2019 3:55:32 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(244/340) took 74140 ms. Total solver calls (SAT/UNSAT): 8257(8257/0)
Mar 18, 2019 3:55:35 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(267/340) took 77166 ms. Total solver calls (SAT/UNSAT): 8694(8694/0)
Mar 18, 2019 3:55:39 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(285/340) took 81634 ms. Total solver calls (SAT/UNSAT): 9307(9307/0)
Mar 18, 2019 3:55:44 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(288/340) took 85766 ms. Total solver calls (SAT/UNSAT): 9463(9463/0)
Mar 18, 2019 3:55:47 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(293/340) took 89588 ms. Total solver calls (SAT/UNSAT): 9703(9703/0)
Mar 18, 2019 3:55:52 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(296/340) took 93818 ms. Total solver calls (SAT/UNSAT): 9835(9835/0)
Mar 18, 2019 3:55:55 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(299/340) took 96848 ms. Total solver calls (SAT/UNSAT): 9958(9958/0)
Mar 18, 2019 3:55:58 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(304/340) took 100342 ms. Total solver calls (SAT/UNSAT): 10143(10143/0)
Mar 18, 2019 3:56:01 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(308/340) took 103455 ms. Total solver calls (SAT/UNSAT): 10273(10273/0)
Mar 18, 2019 3:56:04 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of co-enabling matrix(315/340) took 106698 ms. Total solver calls (SAT/UNSAT): 10462(10462/0)
Mar 18, 2019 3:56:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Finished co-enabling matrix. took 108423 ms. Total solver calls (SAT/UNSAT): 10738(10738/0)
Mar 18, 2019 3:56:06 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver computeDoNotAccord
INFO: Computing Do-Not-Accords matrix : 340 transitions.
Mar 18, 2019 4:01:41 PM fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver printStats
INFO: Computation of Completed DNA matrix. took 334769 ms. Total solver calls (SAT/UNSAT): 14905(0/14905)
Mar 18, 2019 4:01:41 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 444257ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-COL-02"
export BK_EXAMINATION="GlobalProperties"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is PermAdmissibility-COL-02, examination is GlobalProperties"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r107-oct2-155272230700372"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-COL-02.tgz
mv PermAdmissibility-COL-02 execution
cd execution
if [ "GlobalProperties" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "GlobalProperties" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "GlobalProperties" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "GlobalProperties" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "GlobalProperties.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property GlobalProperties.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "GlobalProperties.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' GlobalProperties.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;