Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fko/mcc2019-input.r107-oct2-155272230500260.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fko/mcc2019-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...............................................................
=====================================================================
Generated by BenchKit 2-3954
Executing tool itstools
Input is ParamProductionCell-PT-0, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r107-oct2-155272230500260
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 308K
-rw-r--r-- 1 mcc users 3.9K Feb 12 03:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 19K Feb 12 03:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 3.3K Feb 8 02:14 CTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 8 02:14 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.0K Mar 10 17:31 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.8K Mar 10 17:31 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 111 Feb 24 15:05 GlobalProperties.txt
-rw-r--r-- 1 mcc users 349 Feb 24 15:05 GlobalProperties.xml
-rw-r--r-- 1 mcc users 2.8K Feb 5 00:20 LTLCardinality.txt
-rw-r--r-- 1 mcc users 11K Feb 5 00:20 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 4 22:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 9.3K Feb 4 22:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 3.8K Feb 4 07:17 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 16K Feb 4 07:17 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 3.6K Feb 1 01:25 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 1 01:25 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 4 22:22 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 4 22:22 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 equiv_col
-rw-r--r-- 1 mcc users 2 Jan 29 09:34 instance
-rw-r--r-- 1 mcc users 6 Jan 29 09:34 iscolored
-rw-r--r-- 1 mcc users 144K Mar 10 17:31 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ParamProductionCell-PT-0-ReachabilityCardinality-00
FORMULA_NAME ParamProductionCell-PT-0-ReachabilityCardinality-01
FORMULA_NAME ParamProductionCell-PT-0-ReachabilityCardinality-02
FORMULA_NAME ParamProductionCell-PT-0-ReachabilityCardinality-03
FORMULA_NAME ParamProductionCell-PT-0-ReachabilityCardinality-04
FORMULA_NAME ParamProductionCell-PT-0-ReachabilityCardinality-05
FORMULA_NAME ParamProductionCell-PT-0-ReachabilityCardinality-06
FORMULA_NAME ParamProductionCell-PT-0-ReachabilityCardinality-07
FORMULA_NAME ParamProductionCell-PT-0-ReachabilityCardinality-08
FORMULA_NAME ParamProductionCell-PT-0-ReachabilityCardinality-09
FORMULA_NAME ParamProductionCell-PT-0-ReachabilityCardinality-10
FORMULA_NAME ParamProductionCell-PT-0-ReachabilityCardinality-11
FORMULA_NAME ParamProductionCell-PT-0-ReachabilityCardinality-12
FORMULA_NAME ParamProductionCell-PT-0-ReachabilityCardinality-13
FORMULA_NAME ParamProductionCell-PT-0-ReachabilityCardinality-14
FORMULA_NAME ParamProductionCell-PT-0-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1552922396474

Working with output stream class java.io.PrintStream
Using solver Z3 to compute partial order matrices.
Built C files in :
/home/mcc/execution
Invoking ITS tools like this :CommandLine [args=[/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-reach-linux64, --gc-threshold, 2000000, --quiet, -i, /home/mcc/execution/ReachabilityCardinality.pnml.gal, -t, CGAL, -reachable-file, ReachabilityCardinality.prop, --nowitness], workingDir=/home/mcc/execution]

its-reach command run as :

/home/mcc/BenchKit/itstools/plugins/fr.lip6.move.gal.itstools.binaries_1.0.0.201903111103/bin/its-reach-linux64 --gc-threshold 2000000 --quiet -i /home/mcc/execution/ReachabilityCardinality.pnml.gal -t CGAL -reachable-file ReachabilityCardinality.prop --nowitness
Loading property file ReachabilityCardinality.prop.
Read [reachable] property : ParamProductionCell-PT-0-ReachabilityCardinality-00 with value :(FB_trans_rs>=2)
Read [reachable] property : ParamProductionCell-PT-0-ReachabilityCardinality-01 with value :((((press_at_lower_pos>=1)||(A2U_rot1_run<=arm2_waiting_for_swivel_1))&&((TL_out>=3)&&(belt2_light_barrier_false<=PU_out)))&&(!((A1L_rot1_run>=3)&&(PL_out>=2))))
Read [reachable] property : ParamProductionCell-PT-0-ReachabilityCardinality-02 with value :(((!(A2L_rot2_in<=A1U_rot1_rs))&&(!(FB_out<=ch_PA2_full)))&&(!((table_at_unload_angle>=2)||(table_ready_for_unloading<=A2U_unloaded))))
Read [invariant] property : ParamProductionCell-PT-0-ReachabilityCardinality-03 with value :(!(arm2_magnet_off<=PL_out))
Read [reachable] property : ParamProductionCell-PT-0-ReachabilityCardinality-04 with value :(arm1_magnet_off>=2)
Read [reachable] property : ParamProductionCell-PT-0-ReachabilityCardinality-05 with value :((((A1U_ext_rs>=3)||(arm2_storing<=ch_A1P_free))&&(A1U_rot1_run<=A2U_ret_run))&&(((table_at_unload_angle<=table_bottom_pos)&&(arm2_having_swivel_1>=1))&&(!(arm2_forward<=PU_lower_run))))
Read [reachable] property : ParamProductionCell-PT-0-ReachabilityCardinality-06 with value :((!((A1U_ret_rs<=arm1_release_angle)||(FB_in>=3)))&&(!((A2L_ret_rs<=arm2_pick_up_angle)&&(ch_TA1_free<=TL_lower_rs))))
Read [reachable] property : ParamProductionCell-PT-0-ReachabilityCardinality-07 with value :((arm2_waiting_for_swivel_1>=1)&&(PU_out<=forge_run))
Read [reachable] property : ParamProductionCell-PT-0-ReachabilityCardinality-08 with value :(belt2_stop>=3)
Read [invariant] property : ParamProductionCell-PT-0-ReachabilityCardinality-09 with value :(A2U_rot2_in<=forge_run)
Read [invariant] property : ParamProductionCell-PT-0-ReachabilityCardinality-10 with value :(!(arm1_magnet_on>=2))
Read [invariant] property : ParamProductionCell-PT-0-ReachabilityCardinality-11 with value :((feed_belt_empty<=arm1_storing)||((!(DB_out>=3))||((arm1_pick_up_angle>=2)&&(robot_left>=1))))
Read [reachable] property : ParamProductionCell-PT-0-ReachabilityCardinality-12 with value :(!(press_up<=arm1_pick_up_ext))
Read [reachable] property : ParamProductionCell-PT-0-ReachabilityCardinality-13 with value :(DB_in>=3)
Read [reachable] property : ParamProductionCell-PT-0-ReachabilityCardinality-14 with value :((table_load_angle>=3)&&((A2U_ext_run>=3)||(!(DB_out<=A2U_extended))))
Read [reachable] property : ParamProductionCell-PT-0-ReachabilityCardinality-15 with value :(((!(TL_rot_rs>=3))||(A1L_out>=1))&&(A1U_rot2_run>=2))
Presburger conditions satisfied. Using coverability to approximate state space in K-Induction.
// Phase 1: matrix 176 rows 198 cols
invariant :arm2_stop + A2U_ext_rs + A2U_ext_run + A2U_ret_rs + A2U_ret_run + A2L_ext_rs + A2L_ext_run + A2L_ret_rs + A2L_ret_run = 1
invariant :arm2_magnet_off + arm2_magnet_on = 1
invariant :press_stop + PU_lower_rs + PU_lower_run + forge_rs + forge_run + PL_lower_rs + PL_lower_run = 1
invariant :arm2_backward + -1'A2U_ret_rs + -1'A2U_ret_run + -1'A2L_ret_rs + -1'A2L_ret_run = 0
invariant :table_upward + -1'TL_lower_rs + -1'TL_lower_run + -1'TU_lift_rs + -1'TU_lift_run = 0
invariant :robot_stop + A2U_rot1_rs + A2U_rot1_run + A2U_rot2_rs + A2U_rot2_run + A2U_rot3_rs + A2U_rot3_run + A2L_rot1_rs + A2L_rot1_run + A2L_rot2_rs + A2L_rot2_run + A2L_rot3_rs + A2L_rot3_run + A1L_rot1_rs + A1L_rot1_run + A1L_rot2_rs + A1L_rot2_run + A1L_rot3_rs + A1L_rot3_run + A1U_rot1_rs + A1U_rot1_run + A1U_rot2_rs + A1U_rot2_run + A1U_rot3_rs + A1U_rot3_run = 1
invariant :belt1_light_barrier_true + belt1_light_barrier_false = 1
invariant :deposit_belt_idle + deposit_belt_occupied + deposit_belt_empty + DB_in + DB_at_end + DB_out + DB_trans_rs + DB_trans_run + DB_deliver_rs + DB_deliver_run = 1
invariant :arm2_storing + arm2_having_swivel_1 + arm2_waiting_for_swivel_2 + A2U_rotated + A2U_in + A2U_rot1_in + A2U_rot2_in + A2U_rot3_in + A2U_rot1_rs + A2U_rot1_run + A2U_rot2_rs + A2U_rot2_run + A2U_rot3_rs + A2U_rot3_run + A2U_extended + -1'arm2_magnet_on + A2U_ext_rs + A2U_ext_run + A2L_out + A2L_loaded + A2L_ret_rs + A2L_ret_run = 0
invariant :press_upward + -1'forge_rs + -1'forge_run = 0
invariant :arm1_storing + arm1_having_swivel_1 + arm1_waiting_for_swivel_2 + A1L_out + A1L_loaded + arm1_magnet_off + A1L_ret_rs + A1L_ret_run + A1U_rotated + A1U_in + A1U_rot1_in + A1U_rot2_in + A1U_rot3_in + A1U_rot1_rs + A1U_rot1_run + A1U_rot2_rs + A1U_rot2_run + A1U_rot3_rs + A1U_rot3_run + A1U_extendet + A1U_ext_rs + A1U_ext_run = 1
invariant :belt2_start + -1'DB_trans_rs + -1'DB_trans_run + -1'DB_deliver_rs + -1'DB_deliver_run = 0
invariant :c_p2 + c_p1 = 1
invariant :ch_FT_free + ch_FT_full + table_ready_for_unloading + TL_out + TL_in + table_at_load_angle + TL_rot_rs + TL_rot_run + TL_lower_rs + TL_lower_run + TU_in + TU_out + table_at_unload_angle + TU_lift_rs + TU_lift_run + TU_rot_rs + TU_rot_run + FB_in + FB_at_end + FB_out + FB_trans_rs + FB_trans_run + FB_deliver_rs + FB_deliver_run = 1
invariant :p_p2 + p_p1 = 1
invariant :press_up + -1'PL_lower_rs + -1'PL_lower_run = 0
invariant :arm2_release_ext + arm2_retract_ext + arm2_pick_up_ext = 1
invariant :ch_TA1_full + ch_TA1_free + -1'table_ready_for_unloading + -1'arm1_store_free + -1'arm1_having_swivel_2 + A1L_out + A1L_loaded + arm1_magnet_off + A1L_ret_rs + A1L_ret_run + -1'A1U_out + -1'A1U_unloadet + -1'A1U_ret_rs + -1'A1U_ret_run = 0
invariant :belt1_stop + FB_trans_rs + FB_trans_run + FB_deliver_rs + FB_deliver_run = 1
invariant :arm2_forward + -1'A2U_ext_rs + -1'A2U_ext_run + -1'A2L_ext_rs + -1'A2L_ext_run = 0
invariant :ch_CF_free + ch_CF_full + feed_belt_occupied + feed_belt_empty + FB_in + FB_at_end + FB_out + FB_trans_rs + FB_trans_run + FB_deliver_rs + FB_deliver_run = 1
invariant :arm1_magnet_on + arm1_magnet_off = 1
invariant :table_bottom_pos + table_top_pos = 1
invariant :robot_left + -1'A2U_rot2_rs + -1'A2U_rot2_run + -1'A2L_rot1_rs + -1'A2L_rot1_run + -1'A2L_rot2_rs + -1'A2L_rot2_run + -1'A2L_rot3_rs + -1'A2L_rot3_run + -1'A1L_rot1_rs + -1'A1L_rot1_run + -1'A1L_rot2_rs + -1'A1L_rot2_run + -1'A1L_rot3_rs + -1'A1L_rot3_run + -1'A1U_rot3_rs + -1'A1U_rot3_run = 0
invariant :arm1_store_free + arm1_waiting_for_swivel_1 + arm1_having_swivel_2 + A1L_rotated + A1L_in + A1L_rot1_in + A1L_rot2_in + A1L_rot3_in + A1L_rot1_rs + A1L_rot1_run + A1L_rot2_rs + A1L_rot2_run + A1L_rot3_rs + A1L_rot3_run + A1_extended + -1'arm1_magnet_off + A1L_ext_rs + A1L_ext_run + A1U_out + A1U_unloadet + A1U_ret_rs + A1U_ret_run = 0
invariant :arm1_forward + -1'A1L_ext_rs + -1'A1L_ext_run + -1'A1U_ext_rs + -1'A1U_ext_run = 0
invariant :table_ready_for_loading + table_ready_for_unloading + TL_out + TL_in + table_at_load_angle + TL_rot_rs + TL_rot_run + TL_lower_rs + TL_lower_run + TU_in + TU_out + table_at_unload_angle + TU_lift_rs + TU_lift_run + TU_rot_rs + TU_rot_run = 1
invariant :arm2_release_angle + arm1_pick_up_angle + arm1_release_angle + arm2_pick_up_angle = 1
invariant :table_load_angle + table_unload_angle = 1
invariant :arm1_pick_up_ext + arm1_retract_ext + arm1_release_ext = 1
invariant :ch_A1P_full + ch_A1P_free + press_ready_for_unloading + PU_out + blank_forged + PU_in + PU_lower_rs + PU_lower_run + forge_rs + forge_run + PL_in + PL_out + PL_lower_rs + PL_lower_run + -1'arm1_storing + -1'arm1_having_swivel_1 + -1'A1L_out + -1'A1L_loaded + -1'arm1_magnet_off + -1'A1L_ret_rs + -1'A1L_ret_run + A1U_out + A1U_unloadet + A1U_ret_rs + A1U_ret_run = 0
invariant :table_stop_v + TL_lower_rs + TL_lower_run + TU_lift_rs + TU_lift_run = 1
invariant :belt1_start + -1'FB_trans_rs + -1'FB_trans_run + -1'FB_deliver_rs + -1'FB_deliver_run = 0
invariant :press_at_upper_pos + press_at_lower_pos + press_at_middle_pos = 1
invariant :belt2_stop + DB_trans_rs + DB_trans_run + DB_deliver_rs + DB_deliver_run = 1
invariant :ch_A2D_full + ch_A2D_free + deposit_belt_occupied + deposit_belt_empty + DB_in + DB_at_end + DB_out + DB_trans_rs + DB_trans_run + DB_deliver_rs + DB_deliver_run + -1'arm2_storing + -1'arm2_having_swivel_1 + A2U_out + A2U_unloaded + arm2_magnet_on + A2U_ret_rs + A2U_ret_run + -1'A2L_out + -1'A2L_loaded + -1'A2L_ret_rs + -1'A2L_ret_run = 1
invariant :table_stop_h + TL_rot_rs + TL_rot_run + TU_rot_rs + TU_rot_run = 1
invariant :table_right + -1'TL_rot_rs + -1'TL_rot_run + -1'TU_rot_rs + -1'TU_rot_run = 0
invariant :arm1_backward + -1'A1L_ret_rs + -1'A1L_ret_run + -1'A1U_ret_rs + -1'A1U_ret_run = 0
invariant :swivel + -1'arm2_store_free + -1'arm2_waiting_for_swivel_1 + -1'arm2_storing + -1'arm2_waiting_for_swivel_2 + -1'arm1_store_free + -1'arm1_waiting_for_swivel_1 + -1'arm1_storing + -1'arm1_waiting_for_swivel_2 = -1
invariant :ch_DC_full + ch_DC_free + DB_in + DB_at_end + DB_out + DB_trans_rs + DB_trans_run + DB_deliver_rs + DB_deliver_run = 1
invariant :arm1_stop + A1L_ext_rs + A1L_ext_run + A1L_ret_rs + A1L_ret_run + A1U_ext_rs + A1U_ext_run + A1U_ret_rs + A1U_ret_run = 1
invariant :feed_belt_idle + feed_belt_occupied + feed_belt_empty + FB_in + FB_at_end + FB_out + FB_trans_rs + FB_trans_run + FB_deliver_rs + FB_deliver_run = 1
invariant :press_down + -1'PU_lower_rs + -1'PU_lower_run = 0
invariant :robot_right + -1'A2U_rot1_rs + -1'A2U_rot1_run + -1'A2U_rot3_rs + -1'A2U_rot3_run + -1'A1U_rot1_rs + -1'A1U_rot1_run + -1'A1U_rot2_rs + -1'A1U_rot2_run = 0
invariant :belt2_light_barrier_true + belt2_light_barrier_false = 1
invariant :arm2_store_free + arm2_waiting_for_swivel_1 + arm2_having_swivel_2 + A2U_out + A2U_unloaded + arm2_magnet_on + A2U_ret_rs + A2U_ret_run + A2L_rotated + A2L_in + A2L_rot1_in + A2L_rot2_in + A2L_rot3_in + A2L_rot1_rs + A2L_rot1_run + A2L_rot2_rs + A2L_rot2_run + A2L_rot3_rs + A2L_rot3_run + A2L_extended + A2L_ext_rs + A2L_ext_run = 1
invariant :ch_PA2_free + ch_PA2_full + -1'press_ready_for_unloading + -1'arm2_store_free + -1'arm2_having_swivel_2 + -1'A2U_out + -1'A2U_unloaded + -1'arm2_magnet_on + -1'A2U_ret_rs + -1'A2U_ret_run + A2L_out + A2L_loaded + A2L_ret_rs + A2L_ret_run = -1
invariant :press_ready_for_loading + press_ready_for_unloading + PU_out + blank_forged + PU_in + PU_lower_rs + PU_lower_run + forge_rs + forge_run + PL_in + PL_out + PL_lower_rs + PL_lower_run = 1
Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ParamProductionCell\_PT\_0\_flat\_flat,2.77694e+06,1.70998,28328,2,8595,5,100123,6,0,971,87021,0
Total reachable state count : 2776936

Verifying 16 reachability properties.
Reachability property ParamProductionCell-PT-0-ReachabilityCardinality-00 does not hold.
FORMULA ParamProductionCell-PT-0-ReachabilityCardinality-00 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : ParamProductionCell-PT-0-ReachabilityCardinality-00

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ParamProductionCell-PT-0-ReachabilityCardinality-00,0,1.71507,28496,1,0,5,100123,7,0,973,87021,0
Reachability property ParamProductionCell-PT-0-ReachabilityCardinality-01 does not hold.
FORMULA ParamProductionCell-PT-0-ReachabilityCardinality-01 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : ParamProductionCell-PT-0-ReachabilityCardinality-01

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ParamProductionCell-PT-0-ReachabilityCardinality-01,0,1.71597,28608,1,0,5,100123,8,0,981,87021,0
Reachability property ParamProductionCell-PT-0-ReachabilityCardinality-02 does not hold.
FORMULA ParamProductionCell-PT-0-ReachabilityCardinality-02 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : ParamProductionCell-PT-0-ReachabilityCardinality-02

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ParamProductionCell-PT-0-ReachabilityCardinality-02,0,1.71865,28736,1,0,5,100123,9,0,994,87021,0
Invariant property ParamProductionCell-PT-0-ReachabilityCardinality-03 does not hold.
FORMULA ParamProductionCell-PT-0-ReachabilityCardinality-03 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ParamProductionCell-PT-0-ReachabilityCardinality-03,84,1.72932,28736,2,381,6,100123,10,0,998,87021,0
Reachability property ParamProductionCell-PT-0-ReachabilityCardinality-04 does not hold.
FORMULA ParamProductionCell-PT-0-ReachabilityCardinality-04 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : ParamProductionCell-PT-0-ReachabilityCardinality-04

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ParamProductionCell-PT-0-ReachabilityCardinality-04,0,1.73406,28736,1,0,6,100123,11,0,999,87021,0
Reachability property ParamProductionCell-PT-0-ReachabilityCardinality-05 does not hold.
FORMULA ParamProductionCell-PT-0-ReachabilityCardinality-05 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : ParamProductionCell-PT-0-ReachabilityCardinality-05

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ParamProductionCell-PT-0-ReachabilityCardinality-05,0,1.74524,28736,1,0,6,100123,12,0,1027,87021,0
Reachability property ParamProductionCell-PT-0-ReachabilityCardinality-06 does not hold.
FORMULA ParamProductionCell-PT-0-ReachabilityCardinality-06 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : ParamProductionCell-PT-0-ReachabilityCardinality-06

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ParamProductionCell-PT-0-ReachabilityCardinality-06,0,1.76793,28736,1,0,6,100123,13,0,1047,87021,0
Reachability property ParamProductionCell-PT-0-ReachabilityCardinality-07 is true.
FORMULA ParamProductionCell-PT-0-ReachabilityCardinality-07 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ParamProductionCell-PT-0-ReachabilityCardinality-07,4,1.76878,28736,2,303,7,100123,14,0,1053,87021,0
Reachability property ParamProductionCell-PT-0-ReachabilityCardinality-08 does not hold.
FORMULA ParamProductionCell-PT-0-ReachabilityCardinality-08 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : ParamProductionCell-PT-0-ReachabilityCardinality-08

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ParamProductionCell-PT-0-ReachabilityCardinality-08,0,1.7693,28736,1,0,7,100123,15,0,1054,87021,0
Invariant property ParamProductionCell-PT-0-ReachabilityCardinality-09 does not hold.
FORMULA ParamProductionCell-PT-0-ReachabilityCardinality-09 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ParamProductionCell-PT-0-ReachabilityCardinality-09,64,1.76999,28736,2,269,8,100123,16,0,1058,87021,0
Invariant property ParamProductionCell-PT-0-ReachabilityCardinality-10 is true.
FORMULA ParamProductionCell-PT-0-ReachabilityCardinality-10 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ParamProductionCell-PT-0-ReachabilityCardinality-10,0,1.79318,28736,1,0,8,100123,17,0,1059,87021,0
Invariant property ParamProductionCell-PT-0-ReachabilityCardinality-11 is true.
FORMULA ParamProductionCell-PT-0-ReachabilityCardinality-11 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ParamProductionCell-PT-0-ReachabilityCardinality-11,0,1.80908,28736,1,0,8,100123,18,0,1071,87021,0
Reachability property ParamProductionCell-PT-0-ReachabilityCardinality-12 is true.
FORMULA ParamProductionCell-PT-0-ReachabilityCardinality-12 TRUE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ParamProductionCell-PT-0-ReachabilityCardinality-12,4512,1.81053,28736,2,1102,9,100123,19,0,1075,87021,0
Reachability property ParamProductionCell-PT-0-ReachabilityCardinality-13 does not hold.
FORMULA ParamProductionCell-PT-0-ReachabilityCardinality-13 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : ParamProductionCell-PT-0-ReachabilityCardinality-13

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ParamProductionCell-PT-0-ReachabilityCardinality-13,0,1.81119,28736,1,0,9,100123,20,0,1076,87021,0
Reachability property ParamProductionCell-PT-0-ReachabilityCardinality-14 does not hold.
FORMULA ParamProductionCell-PT-0-ReachabilityCardinality-14 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : ParamProductionCell-PT-0-ReachabilityCardinality-14

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ParamProductionCell-PT-0-ReachabilityCardinality-14,0,1.82286,28736,1,0,9,100123,21,0,1086,87021,0
Reachability property ParamProductionCell-PT-0-ReachabilityCardinality-15 does not hold.
FORMULA ParamProductionCell-PT-0-ReachabilityCardinality-15 FALSE TECHNIQUES DECISION_DIAGRAMS TOPOLOGICAL COLLATERAL_PROCESSING
No reachable states exhibit your property : ParamProductionCell-PT-0-ReachabilityCardinality-15

Model ,|S| ,Time ,Mem(kb) ,fin. SDD ,fin. DDD ,peak SDD ,peak DDD ,SDD Hom ,SDD cache peak ,DDD Hom ,DDD cachepeak ,SHom cache
ParamProductionCell-PT-0-ReachabilityCardinality-15,0,1.82653,28736,1,0,9,100123,22,0,1090,87021,0
ITS tools runner thread asked to quit. Dying gracefully.
Running compilation step : CommandLine [args=[gcc, -c, -I/home/mcc/BenchKit//lts_install_dir//include, -I., -std=c99, -fPIC, -O2, model.c], workingDir=/home/mcc/execution]
WARNING : LTS min runner thread was asked to interrupt. Dying gracefully.

BK_STOP 1552922401499

--------------------
content from stderr:

+ export BINDIR=/home/mcc/BenchKit/
+ BINDIR=/home/mcc/BenchKit/
++ pwd
+ export MODEL=/home/mcc/execution
+ MODEL=/home/mcc/execution
+ [[ ReachabilityCardinality = StateSpace ]]
+ /home/mcc/BenchKit//runeclipse.sh /home/mcc/execution ReachabilityCardinality -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ /home/mcc/BenchKit//itstools/its-tools -data /home/mcc/execution/workspace -pnfolder /home/mcc/execution -examination ReachabilityCardinality -z3path /home/mcc/BenchKit//z3/bin/z3 -yices2path /home/mcc/BenchKit//yices/bin/yices -its -ltsminpath /home/mcc/BenchKit//lts_install_dir/ -smt -vmargs -Dosgi.locking=none -Declipse.stateSaveDelayInterval=-1 -Dosgi.configuration.area=/tmp/.eclipse -Xss8m -Xms40m -Xmx8192m -Dfile.encoding=UTF-8 -Dosgi.requiredJavaVersion=1.6
Mar 18, 2019 3:19:58 PM fr.lip6.move.gal.application.Application start
INFO: Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -z3path, /home/mcc/BenchKit//z3/bin/z3, -yices2path, /home/mcc/BenchKit//yices/bin/yices, -its, -ltsminpath, /home/mcc/BenchKit//lts_install_dir/, -smt]
Mar 18, 2019 3:19:58 PM fr.lip6.move.gal.application.MccTranslator transformPNML
INFO: Parsing pnml file : /home/mcc/execution/model.pnml
Mar 18, 2019 3:19:58 PM fr.lip6.move.gal.nupn.PTNetReader loadFromXML
INFO: Load time of PNML (sax parser for PT used): 68 ms
Mar 18, 2019 3:19:58 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 198 places.
Mar 18, 2019 3:19:58 PM fr.lip6.move.gal.pnml.togal.PTGALTransformer handlePage
INFO: Transformed 176 transitions.
Mar 18, 2019 3:19:58 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/model.pnml.img.gal : 18 ms
Mar 18, 2019 3:19:58 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 111 ms
Mar 18, 2019 3:19:58 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 34 ms
Mar 18, 2019 3:19:58 PM fr.lip6.move.serialization.SerializationUtil systemToFile
INFO: Time to serialize gal into /home/mcc/execution/ReachabilityCardinality.pnml.gal : 12 ms
Mar 18, 2019 3:19:59 PM fr.lip6.move.serialization.SerializationUtil serializePropertiesForITSTools
INFO: Time to serialize properties into /home/mcc/execution/ReachabilityCardinality.prop : 1 ms
Mar 18, 2019 3:19:59 PM fr.lip6.move.gal.instantiate.GALRewriter flatten
INFO: Flatten gal took : 48 ms
Mar 18, 2019 3:19:59 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 176 transitions.
Mar 18, 2019 3:19:59 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 176 transitions.
Mar 18, 2019 3:20:00 PM fr.lip6.move.gal.gal2smt.bmc.KInductionSolver computeAndDeclareInvariants
INFO: Computed 49 place invariants in 63 ms
Mar 18, 2019 3:20:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
INFO: Ran tautology test, simplified 0 / 16 in 1806 ms.
Mar 18, 2019 3:20:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-0-ReachabilityCardinality-00(UNSAT) depth K=0 took 28 ms
Mar 18, 2019 3:20:00 PM fr.lip6.move.gal.semantics.DeterministicNextBuilder getDeterministicNext
INFO: Input system was already deterministic with 176 transitions.
Mar 18, 2019 3:20:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-0-ReachabilityCardinality-01(UNSAT) depth K=0 took 10 ms
Mar 18, 2019 3:20:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-0-ReachabilityCardinality-02(UNSAT) depth K=0 took 37 ms
Mar 18, 2019 3:20:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd checkProperties
WARNING: Interrupting SMT solver.
Mar 18, 2019 3:20:00 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solution for property ParamProductionCell-PT-0-ReachabilityCardinality-03(UNSAT) depth K=0 took 11 ms
Skipping mayMatrices nes/nds SMT assertion produced unexpected response (error "Failed to assert expression: java.io.IOException: Broken pipe (>= (select (select s 0) 11) 0)")
java.lang.RuntimeException: SMT assertion produced unexpected response (error "Failed to assert expression: java.io.IOException: Broken pipe (>= (select (select s 0) 11) 0)")
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:102)
at fr.lip6.move.gal.gal2smt.bmc.NecessaryEnablingsolver.init(NecessaryEnablingsolver.java:71)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printLabels(Gal2PinsTransformerNext.java:471)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.printDependencyMatrix(Gal2PinsTransformerNext.java:209)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.buildBodyFile(Gal2PinsTransformerNext.java:85)
at fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext.transform(Gal2PinsTransformerNext.java:830)
at fr.lip6.move.gal.application.LTSminRunner$1.run(LTSminRunner.java:71)
at java.lang.Thread.run(Thread.java:748)
Mar 18, 2019 3:20:01 PM org.smtlib.impl.Script execute
WARNING: Script execution failed on command (define-fun _enabled__0 ((step Int)) Bool (_enabledsrc__0 (select s step))) with error
Mar 18, 2019 3:20:01 PM org.smtlib.impl.Script execute
WARNING: Script execution failed on command (define-fun trsrc0 ((src (Array Int Int))(dst (Array Int Int))) Bool (and (_enabledsrc__0 src) (= (store (store (store src 15 (- (select src 15) 1)) 23 (+ (select src 23) 1)) 4 (- (select src 4) 1)) dst))) with error (error "Error writing to Z3 solver: java.io.IOException: Broken pipe")
java.lang.RuntimeException: Assertion failed : SMT solver produced unexpected response (error "Failed to assert expression: java.io.IOException: Broken pipe (<= 2 (select (select s 0) 170))")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:450)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Exception in thread "Thread-8" java.lang.RuntimeException: Error when declaring system variables to SMT solver.(error "Error writing to Z3 solver: java.io.IOException: Broken pipe")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.init(NextBMCSolver.java:93)
at fr.lip6.move.gal.gal2smt.bmc.KInductionSolver.init(KInductionSolver.java:59)
at fr.lip6.move.gal.gal2smt.smt.ISMTSolver.init(ISMTSolver.java:17)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runKInduction(Gal2SMTFrontEnd.java:278)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$1(Gal2SMTFrontEnd.java:274)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$2.run(Gal2SMTFrontEnd.java:166)
at java.lang.Thread.run(Thread.java:748)
Mar 18, 2019 3:20:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
WARNING: Unexpected error occurred while running SMT. Was verifying ParamProductionCell-PT-0-ReachabilityCardinality-04 SMT depth 0
java.lang.RuntimeException: java.lang.RuntimeException: Assertion failed : SMT solver produced unexpected response (error "Failed to assert expression: java.io.IOException: Broken pipe (<= 2 (select (select s 0) 170))")
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:404)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.access$0(Gal2SMTFrontEnd.java:350)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd$1.run(Gal2SMTFrontEnd.java:159)
at java.lang.Thread.run(Thread.java:748)
Caused by: java.lang.RuntimeException: Assertion failed : SMT solver produced unexpected response (error "Failed to assert expression: java.io.IOException: Broken pipe (<= 2 (select (select s 0) 170))")
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verifyAssertion(NextBMCSolver.java:450)
at fr.lip6.move.gal.gal2smt.bmc.NextBMCSolver.verify(NextBMCSolver.java:435)
at fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd.runBMC(Gal2SMTFrontEnd.java:378)
... 3 more
Mar 18, 2019 3:20:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: During BMC, SMT solver timed out at depth 0
Mar 18, 2019 3:20:01 PM fr.lip6.move.gal.gal2smt.Gal2SMTFrontEnd runBMC
INFO: BMC solving timed out (3600000 secs) at depth 0
Mar 18, 2019 3:20:01 PM fr.lip6.move.gal.application.SMTRunner$2 run
INFO: SMT solved 0/ 16 properties. Interrupting other analysis methods.
Mar 18, 2019 3:20:01 PM fr.lip6.move.gal.gal2pins.Gal2PinsTransformerNext transform
INFO: Built C files in 1852ms conformant to PINS in folder :/home/mcc/execution

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ParamProductionCell-PT-0"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="itstools"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-3954"
echo " Executing tool itstools"
echo " Input is ParamProductionCell-PT-0, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r107-oct2-155272230500260"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ParamProductionCell-PT-0.tgz
mv ParamProductionCell-PT-0 execution
cd execution
if [ "ReachabilityCardinality" = "GlobalProperties" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;